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From: Johan Hovold <johan@kernel.org>
To: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, jingoohan1@gmail.com,
	mani@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org,
	bhelgaas@google.com, johan+linaro@kernel.org, vkoul@kernel.org,
	kishon@kernel.org, neil.armstrong@linaro.org,
	abel.vesa@linaro.org, kw@linux.com,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-phy@lists.infradead.org, qiang.yu@oss.qualcomm.com,
	quic_krichai@quicinc.com, quic_vbadigan@quicinc.com
Subject: Re: [PATCH v7 2/3] arm64: dts: qcom: sa8775p: remove aux clock from pcie phy
Date: Wed, 30 Jul 2025 11:53:06 +0200	[thread overview]
Message-ID: <aInrgnGsBSVpxrWE@hovoldconsulting.com> (raw)
In-Reply-To: <20250725102231.3608298-3-ziyue.zhang@oss.qualcomm.com>

On Fri, Jul 25, 2025 at 06:22:30PM +0800, Ziyue Zhang wrote:
> The gcc_aux_clk is used by the PCIe Root Complex (RC) and is not required
> by the PHY. The correct clock for the PHY is gcc_phy_aux_clk, which this
> patch uses to replace the incorrect reference.
> 
> The distinction between AUX_CLK and PHY_AUX_CLK is important: AUX_CLK is
> typically used by the controller, while PHY_AUX_CLK is required by certain
> PHYs—particularly Gen4 QMP PHYs—for internal operations such as clock
> gating and power management. Some non-Gen4 Qualcomm PHYs also use
> PHY_AUX_CLK, but they do not require AUX_CLK.
> 
> This change ensures proper clock configuration and avoids unnecessary
> dependencies.
> 
> Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>

With the fixes tag added (Konrad's comment should be picked up by the
maintainer/tooling, no need to resend for that):

Reviewed-by: Johan Hovold <johan+linaro@kernel.org>

WARNING: multiple messages have this Message-ID (diff)
From: Johan Hovold <johan@kernel.org>
To: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, jingoohan1@gmail.com,
	mani@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org,
	bhelgaas@google.com, johan+linaro@kernel.org, vkoul@kernel.org,
	kishon@kernel.org, neil.armstrong@linaro.org,
	abel.vesa@linaro.org, kw@linux.com,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-phy@lists.infradead.org, qiang.yu@oss.qualcomm.com,
	quic_krichai@quicinc.com, quic_vbadigan@quicinc.com
Subject: Re: [PATCH v7 2/3] arm64: dts: qcom: sa8775p: remove aux clock from pcie phy
Date: Wed, 30 Jul 2025 11:53:06 +0200	[thread overview]
Message-ID: <aInrgnGsBSVpxrWE@hovoldconsulting.com> (raw)
In-Reply-To: <20250725102231.3608298-3-ziyue.zhang@oss.qualcomm.com>

On Fri, Jul 25, 2025 at 06:22:30PM +0800, Ziyue Zhang wrote:
> The gcc_aux_clk is used by the PCIe Root Complex (RC) and is not required
> by the PHY. The correct clock for the PHY is gcc_phy_aux_clk, which this
> patch uses to replace the incorrect reference.
> 
> The distinction between AUX_CLK and PHY_AUX_CLK is important: AUX_CLK is
> typically used by the controller, while PHY_AUX_CLK is required by certain
> PHYs—particularly Gen4 QMP PHYs—for internal operations such as clock
> gating and power management. Some non-Gen4 Qualcomm PHYs also use
> PHY_AUX_CLK, but they do not require AUX_CLK.
> 
> This change ensures proper clock configuration and avoids unnecessary
> dependencies.
> 
> Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>

With the fixes tag added (Konrad's comment should be picked up by the
maintainer/tooling, no need to resend for that):

Reviewed-by: Johan Hovold <johan+linaro@kernel.org>

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

  parent reply	other threads:[~2025-07-30  9:53 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-25 10:22 [PATCH v7 0/3] pci: qcom: drop unrelated clock and add link_down reset for sa8775p Ziyue Zhang
2025-07-25 10:22 ` Ziyue Zhang
2025-07-25 10:22 ` [PATCH v7 1/3] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings Ziyue Zhang
2025-07-25 10:22   ` Ziyue Zhang
2025-07-30  9:51   ` Johan Hovold
2025-07-30  9:51     ` Johan Hovold
2025-08-12  8:31   ` Ziyue Zhang
2025-08-12  8:31     ` Ziyue Zhang
2025-07-25 10:22 ` [PATCH v7 2/3] arm64: dts: qcom: sa8775p: remove aux clock from pcie phy Ziyue Zhang
2025-07-25 10:22   ` Ziyue Zhang
2025-07-29 13:32   ` Konrad Dybcio
2025-07-29 13:32     ` Konrad Dybcio
2025-07-29 13:32   ` Konrad Dybcio
2025-07-29 13:32     ` Konrad Dybcio
2025-07-30  9:53   ` Johan Hovold [this message]
2025-07-30  9:53     ` Johan Hovold
2025-07-25 10:22 ` [PATCH v7 3/3] arm64: dts: qcom: sa8775p: add link_down reset for pcie Ziyue Zhang
2025-07-25 10:22   ` Ziyue Zhang
2025-08-12  3:04 ` (subset) [PATCH v7 0/3] pci: qcom: drop unrelated clock and add link_down reset for sa8775p Bjorn Andersson
2025-08-12  3:04   ` Bjorn Andersson
2025-08-12 16:40 ` Vinod Koul
2025-08-12 16:40   ` Vinod Koul

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