From: "Ahmed S. Darwish" <darwi@linutronix.de>
To: Borislav Petkov <bp@alien8.de>, Ingo Molnar <mingo@redhat.com>,
Dave Hansen <dave.hansen@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Sean Christopherson <seanjc@google.com>,
David Woodhouse <dwmw2@infradead.org>,
"H. Peter Anvin" <hpa@zytor.com>,
Peter Zijlstra <peterz@infradead.org>,
Sohil Mehta <sohil.mehta@intel.com>,
John Ogness <john.ogness@linutronix.de>,
x86@kernel.org, x86-cpuid@lists.linux.dev,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 00/35] x86: Introduce a centralized CPUID data model
Date: Fri, 5 Sep 2025 14:52:50 +0200 [thread overview]
Message-ID: <aLrdImDdg5utz2ZF@lx-t490> (raw)
In-Reply-To: <20250905121515.192792-1-darwi@linutronix.de>
Hi,
On Fri, 05 Sep 2025, Ahmed S. Darwish wrote:
>
> /*
> * Compile-time failure: Requested subleaf > max dynamic subleaf
> * CPUID(0xd).n, n > 62
> */
>
> cpuid_subleaf_n(&boot_cpu_data, 0xd, 63);
>
Sorry, this actually is:
/*
* Compile-time failure: Requested subleaf > max dynamic subleaf
* CPUID(0xd).n, n > 63
*/
cpuid_subleaf_n(&boot_cpu_data, 0xd, 64);
which is the correct thing, as per the Intel SDM manuals: n <= 63.
That false upper-bound snippet was a left over from a previous cover
letter draft. That is, before the x86-cpuid-db commit:
https://gitlab.com/x86-cpuid.org/x86-cpuid-db/-/commit/f3d9bc48b4a
Thanks!
--
Ahmed S. Darwish
Linutronix GmbH
prev parent reply other threads:[~2025-09-05 12:52 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-05 12:14 [PATCH v5 00/35] x86: Introduce a centralized CPUID data model Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 01/35] ASoC: Intel: avs: Include CPUID header at file scope Ahmed S. Darwish
2025-10-16 10:57 ` Borislav Petkov
2025-10-16 19:21 ` Ahmed S. Darwish
2026-03-20 12:39 ` Borislav Petkov
2025-09-05 12:14 ` [PATCH v5 02/35] treewide: Explicitly include the x86 CPUID headers Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 03/35] x86/cpu: <asm/processor.h>: Do not include the CPUID API header Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 04/35] x86/cpuid: Rename cpuid_leaf()/cpuid_subleaf() APIs Ahmed S. Darwish
2025-10-28 17:50 ` Borislav Petkov
2025-09-05 12:14 ` [PATCH v5 05/35] x86/cpu/cacheinfo: Simplify cacheinfo_amd_init_llc_id() using _cpuid4_info Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 06/35] x86/cpuid: Introduce <asm/cpuid/leaf_types.h> Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 07/35] x86: Introduce a centralized CPUID data model Ahmed S. Darwish
2026-01-16 20:31 ` Borislav Petkov
2026-01-26 13:04 ` Ahmed S. Darwish
2026-01-29 16:07 ` Borislav Petkov
2026-01-29 17:16 ` Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 08/35] x86/cpuid: Introduce a centralized CPUID parser Ahmed S. Darwish
2025-09-18 13:15 ` Ahmed S. Darwish
2026-01-21 21:45 ` Borislav Petkov
2026-01-26 13:14 ` Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 09/35] x86/cpu: Use parsed CPUID(0x0) Ahmed S. Darwish
2026-03-04 14:58 ` Borislav Petkov
2025-09-05 12:14 ` [PATCH v5 10/35] x86/lib: Add CPUID(0x1) CPU family and model calculation Ahmed S. Darwish
2026-03-04 19:43 ` Borislav Petkov
2026-03-05 8:24 ` Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 11/35] x86/cpu: Use parsed CPUID(0x1) Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 12/35] x86/cpuid: Parse CPUID(0x80000000) Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 13/35] x86/cpu: Use parsed CPUID(0x80000000) Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 14/35] x86/cpuid: Parse CPUID(0x80000002) to CPUID(0x80000004) Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 15/35] x86/cpu: Use parsed CPUID(0x80000002)..CPUID(0x80000004) Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 16/35] x86/cpuid: Introduce a parser leaf x86 vendor table Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 17/35] x86/cpuid: Introduce a parser debugfs interface Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 18/35] x86/cpuid: Parse CPUID(0x2) Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 19/35] x86/cpuid: Warn once on invalid CPUID(0x2) iteration count Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 20/35] x86/cpuid: Introduce parsed CPUID(0x2) API Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 21/35] x86/cpu: Use parsed CPUID(0x2) Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 22/35] x86/cacheinfo: " Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 23/35] x86/cpuid: Remove direct CPUID(0x2) query API Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 24/35] x86/cpuid: Parse 'deterministic cache parameters' CPUID leaves Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 25/35] x86/cacheinfo: Pass a 'struct cpuinfo_x86' refrence to CPUID(0x4) code Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 26/35] x86/cacheinfo: Use parsed CPUID(0x4) Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 27/35] x86/cacheinfo: Use parsed CPUID(0x8000001d) Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 28/35] x86/cpuid: Parse CPUID(0x80000005) and CPUID(0x80000006) Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 29/35] x86/cacheinfo: Use auto-generated data types Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 30/35] x86/cacheinfo: Use parsed CPUID(0x80000005) and CPUID(0x80000006) Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 31/35] x86/cacheinfo: Use parsed CPUID(0x80000006) Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 32/35] x86/cpu: Rescan CPUID table after PSN disable Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 33/35] x86/cpu: Rescan CPUID table after unlocking full CPUID range Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 34/35] x86/cpuid: Parse CPUID(0x16) Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 35/35] x86/tsc: Use parsed CPUID(0x16) Ahmed S. Darwish
2025-09-05 12:52 ` Ahmed S. Darwish [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aLrdImDdg5utz2ZF@lx-t490 \
--to=darwi@linutronix.de \
--cc=andrew.cooper3@citrix.com \
--cc=bp@alien8.de \
--cc=dave.hansen@linux.intel.com \
--cc=dwmw2@infradead.org \
--cc=hpa@zytor.com \
--cc=john.ogness@linutronix.de \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=peterz@infradead.org \
--cc=seanjc@google.com \
--cc=sohil.mehta@intel.com \
--cc=tglx@linutronix.de \
--cc=x86-cpuid@lists.linux.dev \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.