From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Subject: Re: [PATCH 8/9] drm/i915/reg_defs: Add REG_FIELD_MAX wrapper for FIELD_MAX()
Date: Tue, 23 Sep 2025 20:27:54 +0300 [thread overview]
Message-ID: <aNLYmszqVyjSId7O@intel.com> (raw)
In-Reply-To: <20250923131043.2628282-9-ankit.k.nautiyal@intel.com>
On Tue, Sep 23, 2025 at 06:40:42PM +0530, Ankit Nautiyal wrote:
> Introduce REG_FIELD_MAX macro as local wrapper around FIELD_MAX() to return
> the maximum value representable by a bit mask. The value is cast to u32
> for consistency with other REG_* macros and assumes the bitfield fits
> within 32 bits.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg_defs.h | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h
> index bfe98cb9a038..50967f887790 100644
> --- a/drivers/gpu/drm/i915/i915_reg_defs.h
> +++ b/drivers/gpu/drm/i915/i915_reg_defs.h
> @@ -174,6 +174,16 @@
> */
> #define REG_FIELD_GET8(__mask, __val) ((u8)FIELD_GET(__mask, __val))
>
> +/**
> + * REG_FIELD_MAX() - produce the maximum value representable by a field
> + * @_mask: shifted mask defining the field's length and position
> + *
> + * Local wrapper for FIELD_MAX() to return the maximum bit value that can
> + * be held in the field specified by @_mask, cast to u32 for consistency
> + * with other macros.
> + */
> +#define REG_FIELD_MAX(_mask) ((u32)FIELD_MAX(_mask))
We use a double underscore '__mask' everwhere else. Let's
try to be consistent.
with that
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> +
> typedef struct {
> u32 reg;
> } i915_reg_t;
> --
> 2.45.2
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2025-09-23 17:28 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-23 13:10 [PATCH 0/9] Introduce set_context_latency and refactor VRR/DSB timing logic Ankit Nautiyal
2025-09-23 13:10 ` [PATCH 1/9] drm/i915/psr: s/intel_psr_min_vblank_delay/intel_psr_min_set_context_latency Ankit Nautiyal
2025-09-23 13:10 ` [PATCH 2/9] drm/i915/display: Add set_context_latency to crtc_state Ankit Nautiyal
2025-09-23 14:11 ` Ville Syrjälä
2025-09-23 13:10 ` [PATCH 3/9] drm/i915/vrr: Use set_context_latency instead of intel_vrr_real_vblank_delay() Ankit Nautiyal
2025-09-23 13:10 ` [PATCH 4/9] drm/i915/vrr: Use SCL for computing guardband Ankit Nautiyal
2025-09-23 14:12 ` Ville Syrjälä
2025-09-23 13:10 ` [PATCH 5/9] drm/i915/vrr: s/intel_vrr_vblank_delay/intel_vrr_scl_delay Ankit Nautiyal
2025-09-23 14:13 ` Ville Syrjälä
2025-09-24 9:33 ` Nautiyal, Ankit K
2025-09-24 9:49 ` Ville Syrjälä
2025-09-23 13:10 ` [PATCH 6/9] drm/i915/dsb: s/intel_dsb_wait_vblank_delay/intel_dsb_wait_for_delayed_vblank Ankit Nautiyal
2025-09-23 17:21 ` Ville Syrjälä
2025-09-23 13:10 ` [PATCH 7/9] drm/i915/display: Wait for scl start instead of dsb_wait_vblanks Ankit Nautiyal
2025-09-23 14:32 ` Ville Syrjälä
2025-09-23 13:10 ` [PATCH 8/9] drm/i915/reg_defs: Add REG_FIELD_MAX wrapper for FIELD_MAX() Ankit Nautiyal
2025-09-23 17:27 ` Ville Syrjälä [this message]
2025-09-23 13:10 ` [PATCH 9/9] drm/i915/vrr: Clamp guardband as per hardware and timing constraints Ankit Nautiyal
2025-09-23 17:25 ` Ville Syrjälä
2025-09-23 13:32 ` ✓ CI.KUnit: success for Introduce set_context_latency and refactor VRR/DSB timing logic (rev2) Patchwork
2025-09-23 13:47 ` ✗ CI.checksparse: warning " Patchwork
2025-09-23 14:16 ` ✓ Xe.CI.BAT: success " Patchwork
2025-09-23 15:48 ` ✗ Xe.CI.Full: failure " Patchwork
2025-09-23 19:40 ` ✓ i915.CI.BAT: success " Patchwork
2025-09-24 4:25 ` ✗ i915.CI.Full: failure " Patchwork
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