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From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
Cc: "Andrew Lunn" <andrew@lunn.ch>,
	"Heiner Kallweit" <hkallweit1@gmail.com>,
	"Alexandre Torgue" <alexandre.torgue@foss.st.com>,
	"Alexis Lothoré" <alexis.lothore@bootlin.com>,
	"Andrew Lunn" <andrew+netdev@lunn.ch>,
	"Boon Khai Ng" <boon.khai.ng@altera.com>,
	"Daniel Machon" <daniel.machon@microchip.com>,
	"David S. Miller" <davem@davemloft.net>,
	"Eric Dumazet" <edumazet@google.com>,
	"Furong Xu" <0x1207@gmail.com>,
	"Jacob Keller" <jacob.e.keller@intel.com>,
	"Jakub Kicinski" <kuba@kernel.org>,
	"Jan Petrous (OSS)" <jan.petrous@oss.nxp.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-stm32@st-md-mailman.stormreply.com,
	"Maxime Chevallier" <maxime.chevallier@bootlin.com>,
	"Maxime Coquelin" <mcoquelin.stm32@gmail.com>,
	netdev@vger.kernel.org, "Paolo Abeni" <pabeni@redhat.com>,
	"Simon Horman" <horms@kernel.org>,
	"Vladimir Oltean" <olteanv@gmail.com>,
	"Yu-Chun Lin" <eleanor15x@gmail.com>
Subject: Re: [PATCH net-next 0/3] net: stmmac: phylink PCS conversion part 3 (dodgy stuff)
Date: Mon, 3 Nov 2025 09:52:38 +0000	[thread overview]
Message-ID: <aQh7Zj10C7QcDoqn@shell.armlinux.org.uk> (raw)
In-Reply-To: <aQhusPX0Hw9ZuLNR@oss.qualcomm.com>

On Mon, Nov 03, 2025 at 02:28:24PM +0530, Mohd Ayaan Anwar wrote:
> On Thu, Oct 30, 2025 at 03:22:12PM +0000, Russell King (Oracle) wrote:
> > On Thu, Oct 30, 2025 at 03:19:27PM +0000, Russell King (Oracle) wrote:
> > > > 
> > > > This is probably fine since Bit(9) is self-clearing and its value just
> > > > after this is 0x00041000.
> > > 
> > > Yes, and bit 9 doesn't need to be set at all. SGMII isn't "negotiation"
> > > but the PHY says to the MAC "this is how I'm operating" and the MAC says
> > > "okay". Nothing more.
> > > 
> > > I'm afraid the presence of snps,ps-speed, this disrupts the test.
> > 
> > Note also that testing a 10M link, 100M, 1G and finally 100M again in
> > that order would also be interesting given my question about the RGMII
> > register changes that configure_sgmii does.
> > 
> 
> Despite several attempts, I couldn't get 10M to work. There is a link-up
> but the data path is broken. I checked the net-next tip and it's broken
> there as well.
> 
> Oddly enough, configure_sgmii is called with its speed argument set to
> 1000:
> [   12.305488] qcom-ethqos 23040000.ethernet eth0: phy link up sgmii/10Mbps/Half/pause/off/nolpi
> [   12.315233] qcom-ethqos 23040000.ethernet eth0: major config, requested phy/sgmii
> [   12.322965] qcom-ethqos 23040000.ethernet eth0: interface sgmii inband modes: pcs=00 phy=03
> [   12.331586] qcom-ethqos 23040000.ethernet eth0: major config, active phy/outband/sgmii
> [   12.339738] qcom-ethqos 23040000.ethernet eth0: phylink_mac_config: mode=phy/sgmii/pause adv=0000000,00000000,00000000,00000000 pause=00
> [   12.355113] qcom-ethqos 23040000.ethernet eth0: ethqos_configure_sgmii : Speed = 1000
> [   12.363196] qcom-ethqos 23040000.ethernet eth0: Link is Up - 10Mbps/Half - flow control off

If you have "rate matching" enabled (signified by "pause" in the mode=
part of phylink_mac_config), then the MAC gets told the maximum speed for
the PHY interface, which for Cisco SGMII is 1G. This is intentional to
support PHYs that _really_ do use rate matching. Your PHY isn't using it,
and rate matching for SGMII is pointless.

Please re-run testing with phy-mode = "sgmii" which you've tested
before without your rate-matching patch to the PHY driver, so the
system knows the _correct_ parameters for these speeds.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!


  reply	other threads:[~2025-11-03  9:53 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-25 20:47 [PATCH net-next 0/3] net: stmmac: phylink PCS conversion part 3 (dodgy stuff) Russell King (Oracle)
2025-10-25 20:48 ` [PATCH net-next 1/3] net: stmmac: configure AN control according to phylink Russell King (Oracle)
2025-10-25 20:48 ` [PATCH net-next 2/3] net: stmmac: report PCS configuration changes Russell King (Oracle)
2025-10-25 20:48 ` [PATCH net-next 3/3] net: stmmac: add support specifying PCS supported interfaces Russell King (Oracle)
2025-10-28 10:16   ` Maxime Chevallier
2025-10-28 10:35     ` Russell King (Oracle)
2025-10-28 10:40       ` Russell King (Oracle)
2025-10-28 11:26       ` Maxime Chevallier
2025-10-28 21:12 ` [PATCH net-next 0/3] net: stmmac: phylink PCS conversion part 3 (dodgy stuff) Mohd Ayaan Anwar
2025-10-29  9:22   ` Russell King (Oracle)
2025-10-30 13:20     ` Mohd Ayaan Anwar
2025-10-30 15:19       ` Russell King (Oracle)
2025-10-30 15:22         ` Russell King (Oracle)
2025-11-03  8:58           ` Mohd Ayaan Anwar
2025-11-03  9:52             ` Russell King (Oracle) [this message]
2025-11-03 10:18               ` Mohd Ayaan Anwar
2025-11-03 10:47                 ` Russell King (Oracle)
2025-11-03 10:48                 ` Vladimir Oltean
2025-11-03 11:20                   ` Mohd Ayaan Anwar
2025-11-03 11:43                     ` Russell King (Oracle)
2025-11-03 12:13                       ` Vladimir Oltean
2025-11-03 14:47                         ` Mohd Ayaan Anwar
2025-11-03 17:15                           ` Russell King (Oracle)
2025-11-03 17:02                         ` Russell King (Oracle)
2025-11-03 12:17                       ` Mohd Ayaan Anwar
2025-11-03 17:13                         ` Russell King (Oracle)
2025-11-05 15:46         ` Mohd Ayaan Anwar
2025-11-05 18:12           ` Russell King (Oracle)

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