From: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
To: Vladimir Oltean <olteanv@gmail.com>
Cc: "Russell King (Oracle)" <linux@armlinux.org.uk>,
"Andrew Lunn" <andrew@lunn.ch>,
"Heiner Kallweit" <hkallweit1@gmail.com>,
"Alexandre Torgue" <alexandre.torgue@foss.st.com>,
"Alexis Lothoré" <alexis.lothore@bootlin.com>,
"Andrew Lunn" <andrew+netdev@lunn.ch>,
"Boon Khai Ng" <boon.khai.ng@altera.com>,
"Daniel Machon" <daniel.machon@microchip.com>,
"David S. Miller" <davem@davemloft.net>,
"Eric Dumazet" <edumazet@google.com>,
"Furong Xu" <0x1207@gmail.com>,
"Jacob Keller" <jacob.e.keller@intel.com>,
"Jakub Kicinski" <kuba@kernel.org>,
"Jan Petrous (OSS)" <jan.petrous@oss.nxp.com>,
linux-arm-kernel@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com,
"Maxime Chevallier" <maxime.chevallier@bootlin.com>,
"Maxime Coquelin" <mcoquelin.stm32@gmail.com>,
netdev@vger.kernel.org, "Paolo Abeni" <pabeni@redhat.com>,
"Simon Horman" <horms@kernel.org>,
"Yu-Chun Lin" <eleanor15x@gmail.com>
Subject: Re: [PATCH net-next 0/3] net: stmmac: phylink PCS conversion part 3 (dodgy stuff)
Date: Mon, 3 Nov 2025 16:50:03 +0530 [thread overview]
Message-ID: <aQiP46tKUHGwmiTo@oss.qualcomm.com> (raw)
In-Reply-To: <20251103104820.3fcksk27j34zu6cg@skbuf>
On Mon, Nov 03, 2025 at 12:48:20PM +0200, Vladimir Oltean wrote:
>
> As Russell partially pointed out, there are several assumptions in the
> Aquantia PHY driver and in phylink, three of them being that:
> - rate matching is only supported for PHY_INTERFACE_MODE_10GBASER and
> PHY_INTERFACE_MODE_2500BASEX (thus not PHY_INTERFACE_MODE_SGMII)
> - if phy_get_rate_matching() returns RATE_MATCH_NONE for an interface,
> pl->phy_state.rate_matching will also be RATE_MATCH_NONE when using
> that interface
> - if rate matching is used, the PHY is configured to use it for all
> media speeds <= phylink_interface_max_speed(link_state.interface)
>
> Those assumptions are not validated very well against the ground truth
> from the PHY provisioning, so the next step would be for us to see that
> directly.
>
> Please turn this print from aqr_gen2_read_global_syscfg() into something
> visible in dmesg, i.e. by replacing phydev_dbg() with phydev_info():
>
> phydev_dbg(phydev,
> "Media speed %d uses host interface %s with %s\n",
> syscfg->speed, phy_modes(syscfg->interface),
> syscfg->rate_adapt == AQR_RATE_ADAPT_NONE ? "no rate adaptation" :
> syscfg->rate_adapt == AQR_RATE_ADAPT_PAUSE ? "rate adaptation through flow control" :
> syscfg->rate_adapt == AQR_RATE_ADAPT_USX ? "rate adaptation through symbol replication" :
> "unrecognized rate adaptation type");
Thanks. Looks like rate adaptation is only provisioned for 10M, which
matches my observation where phylink passes the exact speeds for
100/1000/2500 but 1000 for 10M.
[ 9.449107] Aquantia AQR115C stmmac-0:08: Media speed 10 uses host interface sgmii with rate adaptation through flow control
[ 9.462025] Aquantia AQR115C stmmac-0:08: Media speed 100 uses host interface sgmii with no rate adaptation
[ 9.479897] Aquantia AQR115C stmmac-0:08: Media speed 1000 uses host interface sgmii with no rate adaptation
[ 9.499634] Aquantia AQR115C stmmac-0:08: Media speed 2500 uses host interface 2500base-x with no rate adaptation
[ 9.516342] Aquantia AQR115C stmmac-0:08: Media speed 5000 uses host interface 10gbase-r with rate adaptation through flow control
[ 9.534045] Aquantia AQR115C stmmac-0:08: Media speed 10000 uses host interface 10gbase-r with no rate adaptation
[ 9.587889] qcom-ethqos 23040000.ethernet eth0: PHY [stmmac-0:08] driver [Aquantia AQR115C] (irq=304)
Ayaan
next prev parent reply other threads:[~2025-11-03 11:20 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-25 20:47 [PATCH net-next 0/3] net: stmmac: phylink PCS conversion part 3 (dodgy stuff) Russell King (Oracle)
2025-10-25 20:48 ` [PATCH net-next 1/3] net: stmmac: configure AN control according to phylink Russell King (Oracle)
2025-10-25 20:48 ` [PATCH net-next 2/3] net: stmmac: report PCS configuration changes Russell King (Oracle)
2025-10-25 20:48 ` [PATCH net-next 3/3] net: stmmac: add support specifying PCS supported interfaces Russell King (Oracle)
2025-10-28 10:16 ` Maxime Chevallier
2025-10-28 10:35 ` Russell King (Oracle)
2025-10-28 10:40 ` Russell King (Oracle)
2025-10-28 11:26 ` Maxime Chevallier
2025-10-28 21:12 ` [PATCH net-next 0/3] net: stmmac: phylink PCS conversion part 3 (dodgy stuff) Mohd Ayaan Anwar
2025-10-29 9:22 ` Russell King (Oracle)
2025-10-30 13:20 ` Mohd Ayaan Anwar
2025-10-30 15:19 ` Russell King (Oracle)
2025-10-30 15:22 ` Russell King (Oracle)
2025-11-03 8:58 ` Mohd Ayaan Anwar
2025-11-03 9:52 ` Russell King (Oracle)
2025-11-03 10:18 ` Mohd Ayaan Anwar
2025-11-03 10:47 ` Russell King (Oracle)
2025-11-03 10:48 ` Vladimir Oltean
2025-11-03 11:20 ` Mohd Ayaan Anwar [this message]
2025-11-03 11:43 ` Russell King (Oracle)
2025-11-03 12:13 ` Vladimir Oltean
2025-11-03 14:47 ` Mohd Ayaan Anwar
2025-11-03 17:15 ` Russell King (Oracle)
2025-11-03 17:02 ` Russell King (Oracle)
2025-11-03 12:17 ` Mohd Ayaan Anwar
2025-11-03 17:13 ` Russell King (Oracle)
2025-11-05 15:46 ` Mohd Ayaan Anwar
2025-11-05 18:12 ` Russell King (Oracle)
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