From: Niklas Cassel <cassel@kernel.org>
To: Lukas Wunner <lukas@wunner.de>
Cc: "Jingoo Han" <jingoohan1@gmail.com>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczy�?ski" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"FUKAUMI Naoki" <naoki@radxa.com>,
"Krishna chaitanya chundru" <quic_krichai@quicinc.com>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org,
linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH 0/6] PCI: dwc: Revert Link Up IRQ support
Date: Tue, 11 Nov 2025 13:39:06 +0100 [thread overview]
Message-ID: <aRMuascJFSuE6NBd@ryzen> (raw)
In-Reply-To: <aRMZS3EUYx189Xup@wunner.de>
Hello Lukas,
On Tue, Nov 11, 2025 at 12:08:59PM +0100, Lukas Wunner wrote:
> On Tue, Nov 11, 2025 at 11:51:00AM +0100, Niklas Cassel wrote:
> > Revert all patches related to pcie-designware Root Complex Link Up IRQ
> > support.
> >
> > While this fake hotplugging was a nice idea, it has shown that this feature
> > does not handle PCIe switches correctly:
> [...]
> > During the initial scan, PCI core doesn't see the switch and since the Root
> > Port is not hot plug capable, the secondary bus number gets assigned as the
> > subordinate bus number. This means, the PCI core assumes that only one bus
> > will appear behind the Root Port since the Root Port is not hot plug
> > capable.
> >
> > This works perfectly fine for PCIe endpoints connected to the Root Port,
> > since they don't extend the bus. However, if a PCIe switch is connected,
> > then there is a problem when the downstream busses starts showing up and
> > the PCI core doesn't extend the subordinate bus number after initial scan
> > during boot.
>
> In principle it is possible to set the is_hotplug_bridge flag on the
> bridge to force allocation of more buses. We've already got a quirk
> to set the flag on a Conventional PCI bridge whose hotplug capability
> cannot be discovered otherwise (see quirk_hotplug_bridge() in
> drivers/pci/quirks.c).
While pdev->is_hotplug_bridge was also mentioned by Mani, he seems to
prefer a revert + eventual migration to pwrctrl framework:
https://lore.kernel.org/linux-pci/4f4wsgf56eublizg63fz6xmdjixesalb2q3rxetphd55jpqqju@zfyzsxfgiyim/
https://lore.kernel.org/linux-pci/2n3wamm3txxc6xbmvf3nnrvaqpgsck3w4a6omxnhex3mqeujib@2tb4svn5d3z6/
Kind regards,
Niklas
WARNING: multiple messages have this Message-ID (diff)
From: Niklas Cassel <cassel@kernel.org>
To: Lukas Wunner <lukas@wunner.de>
Cc: "Jingoo Han" <jingoohan1@gmail.com>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczy�?ski" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"FUKAUMI Naoki" <naoki@radxa.com>,
"Krishna chaitanya chundru" <quic_krichai@quicinc.com>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org,
linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH 0/6] PCI: dwc: Revert Link Up IRQ support
Date: Tue, 11 Nov 2025 13:39:06 +0100 [thread overview]
Message-ID: <aRMuascJFSuE6NBd@ryzen> (raw)
In-Reply-To: <aRMZS3EUYx189Xup@wunner.de>
Hello Lukas,
On Tue, Nov 11, 2025 at 12:08:59PM +0100, Lukas Wunner wrote:
> On Tue, Nov 11, 2025 at 11:51:00AM +0100, Niklas Cassel wrote:
> > Revert all patches related to pcie-designware Root Complex Link Up IRQ
> > support.
> >
> > While this fake hotplugging was a nice idea, it has shown that this feature
> > does not handle PCIe switches correctly:
> [...]
> > During the initial scan, PCI core doesn't see the switch and since the Root
> > Port is not hot plug capable, the secondary bus number gets assigned as the
> > subordinate bus number. This means, the PCI core assumes that only one bus
> > will appear behind the Root Port since the Root Port is not hot plug
> > capable.
> >
> > This works perfectly fine for PCIe endpoints connected to the Root Port,
> > since they don't extend the bus. However, if a PCIe switch is connected,
> > then there is a problem when the downstream busses starts showing up and
> > the PCI core doesn't extend the subordinate bus number after initial scan
> > during boot.
>
> In principle it is possible to set the is_hotplug_bridge flag on the
> bridge to force allocation of more buses. We've already got a quirk
> to set the flag on a Conventional PCI bridge whose hotplug capability
> cannot be discovered otherwise (see quirk_hotplug_bridge() in
> drivers/pci/quirks.c).
While pdev->is_hotplug_bridge was also mentioned by Mani, he seems to
prefer a revert + eventual migration to pwrctrl framework:
https://lore.kernel.org/linux-pci/4f4wsgf56eublizg63fz6xmdjixesalb2q3rxetphd55jpqqju@zfyzsxfgiyim/
https://lore.kernel.org/linux-pci/2n3wamm3txxc6xbmvf3nnrvaqpgsck3w4a6omxnhex3mqeujib@2tb4svn5d3z6/
Kind regards,
Niklas
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
next prev parent reply other threads:[~2025-11-11 12:39 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-11 10:51 [PATCH 0/6] PCI: dwc: Revert Link Up IRQ support Niklas Cassel
2025-11-11 10:51 ` Niklas Cassel
2025-11-11 10:51 ` [PATCH 1/6] Revert "PCI: dw-rockchip: Don't wait for link since we can detect Link Up" Niklas Cassel
2025-11-11 10:51 ` Niklas Cassel
2025-11-11 10:51 ` [PATCH 2/6] Revert "PCI: dw-rockchip: Enumerate endpoints based on dll_link_up IRQ" Niklas Cassel
2025-11-11 10:51 ` Niklas Cassel
2025-11-11 10:51 ` [PATCH 3/6] Revert "PCI: qcom: Don't wait for link if we can detect Link Up" Niklas Cassel
2025-11-11 10:51 ` [PATCH 4/6] Revert "PCI: qcom: Enable MSI interrupts together with Link up if 'Global IRQ' is supported" Niklas Cassel
2025-11-11 10:51 ` [PATCH 5/6] Revert "PCI: qcom: Enumerate endpoints based on Link up event in 'global_irq' interrupt" Niklas Cassel
2025-11-11 10:51 ` [PATCH 6/6] Revert "PCI: dwc: Don't wait for link up if driver can detect Link Up event" Niklas Cassel
2025-11-11 11:08 ` [PATCH 0/6] PCI: dwc: Revert Link Up IRQ support Lukas Wunner
2025-11-11 12:39 ` Niklas Cassel [this message]
2025-11-11 12:39 ` Niklas Cassel
2025-11-11 14:00 ` Manivannan Sadhasivam
2025-11-11 14:00 ` Manivannan Sadhasivam
2025-11-11 13:33 ` Shawn Lin
2025-11-11 13:33 ` Shawn Lin
2025-11-24 9:50 ` Niklas Cassel
2025-11-24 9:50 ` Niklas Cassel
2025-11-24 12:37 ` Manivannan Sadhasivam
2025-11-24 12:37 ` Manivannan Sadhasivam
2025-11-24 14:02 ` Niklas Cassel
2025-11-24 14:02 ` Niklas Cassel
2025-11-26 13:30 ` FUKAUMI Naoki
2025-11-26 13:30 ` FUKAUMI Naoki
2025-11-26 13:54 ` Manivannan Sadhasivam
2025-11-26 13:54 ` Manivannan Sadhasivam
2025-11-26 23:35 ` FUKAUMI Naoki
2025-11-26 23:35 ` FUKAUMI Naoki
2025-11-27 7:34 ` FUKAUMI Naoki
2025-11-27 7:34 ` FUKAUMI Naoki
2025-11-27 7:43 ` Niklas Cassel
2025-11-27 7:43 ` Niklas Cassel
2025-11-27 11:02 ` FUKAUMI Naoki
2025-11-27 11:02 ` FUKAUMI Naoki
2025-11-28 5:15 ` FUKAUMI Naoki
2025-11-28 5:15 ` FUKAUMI Naoki
2025-11-28 5:34 ` Niklas Cassel
2025-11-28 5:34 ` Niklas Cassel
2025-12-22 6:16 ` Manivannan Sadhasivam
2025-12-22 6:16 ` Manivannan Sadhasivam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aRMuascJFSuE6NBd@ryzen \
--to=cassel@kernel.org \
--cc=bhelgaas@google.com \
--cc=heiko@sntech.de \
--cc=jingoohan1@gmail.com \
--cc=kwilczynski@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=lpieralisi@kernel.org \
--cc=lukas@wunner.de \
--cc=mani@kernel.org \
--cc=naoki@radxa.com \
--cc=quic_krichai@quicinc.com \
--cc=robh@kernel.org \
--cc=shawn.lin@rock-chips.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.