From: Niklas Cassel <cassel@kernel.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: "Manivannan Sadhasivam" <mani@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Kever Yang" <kever.yang@rock-chips.com>,
"Simon Xue" <xxm@rock-chips.com>,
"Damien Le Moal" <dlemoal@kernel.org>,
"Dragan Simic" <dsimic@manjaro.org>,
"FUKAUMI Naoki" <naoki@radxa.com>,
"Diederik de Haas" <diederik@cknow-tech.com>,
stable@vger.kernel.org,
"Manivannan Sadhasivam" <manivannan.sadhasivam@oss.qualcomm.com>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v3] PCI: dw-rockchip: Prevent advertising L1 Substates support
Date: Wed, 12 Nov 2025 09:40:06 +0100 [thread overview]
Message-ID: <aRRH5i2oq1FBSs_7@ryzen> (raw)
In-Reply-To: <20251111214336.GA2190667@bhelgaas>
On Tue, Nov 11, 2025 at 03:43:36PM -0600, Bjorn Helgaas wrote:
> On Tue, Nov 11, 2025 at 02:08:36PM +0100, Niklas Cassel wrote:
> > On Tue, Oct 21, 2025 at 08:05:17AM +0530, Manivannan Sadhasivam wrote:
> > > On Fri, 17 Oct 2025 18:32:53 +0200, Niklas Cassel wrote:
> > > > The L1 substates support requires additional steps to work, namely:
> > > > -Proper handling of the CLKREQ# sideband signal. (It is mostly handled by
> > > > hardware, but software still needs to set the clkreq fields in the
> > > > PCIE_CLIENT_POWER_CON register to match the hardware implementation.)
> > > > -Program the frequency of the aux clock into the
> > > > DSP_PCIE_PL_AUX_CLK_FREQ_OFF register. (During L1 substates the core_clk
> > > > is turned off and the aux_clk is used instead.)
> > > >
> > > > [...]
> > >
> > > Applied, thanks!
> > >
> > > [1/1] PCI: dw-rockchip: Prevent advertising L1 Substates support
> > > commit: 40331c63e7901a2cc75ce6b5d24d50601efb833d
> >
> > Last update in this thread was "Applied, thanks!"
> >
> > and the patch was applied to pci/controller/dw-rockchip
> >
> > since then it seems to have been demoted to
> > pci/controller/dw-rockchip-pend
>
> That was Oct 20, and we had some conversation about a more generic
> approach after that, so I moved it to dw-rockchip-pend while we worked
> that out.
>
> I fleshed it out the generic approach and will post it soon.
Ok, thank you!
Kind regards,
Niklas
WARNING: multiple messages have this Message-ID (diff)
From: Niklas Cassel <cassel@kernel.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: "Manivannan Sadhasivam" <mani@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Kever Yang" <kever.yang@rock-chips.com>,
"Simon Xue" <xxm@rock-chips.com>,
"Damien Le Moal" <dlemoal@kernel.org>,
"Dragan Simic" <dsimic@manjaro.org>,
"FUKAUMI Naoki" <naoki@radxa.com>,
"Diederik de Haas" <diederik@cknow-tech.com>,
stable@vger.kernel.org,
"Manivannan Sadhasivam" <manivannan.sadhasivam@oss.qualcomm.com>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v3] PCI: dw-rockchip: Prevent advertising L1 Substates support
Date: Wed, 12 Nov 2025 09:40:06 +0100 [thread overview]
Message-ID: <aRRH5i2oq1FBSs_7@ryzen> (raw)
In-Reply-To: <20251111214336.GA2190667@bhelgaas>
On Tue, Nov 11, 2025 at 03:43:36PM -0600, Bjorn Helgaas wrote:
> On Tue, Nov 11, 2025 at 02:08:36PM +0100, Niklas Cassel wrote:
> > On Tue, Oct 21, 2025 at 08:05:17AM +0530, Manivannan Sadhasivam wrote:
> > > On Fri, 17 Oct 2025 18:32:53 +0200, Niklas Cassel wrote:
> > > > The L1 substates support requires additional steps to work, namely:
> > > > -Proper handling of the CLKREQ# sideband signal. (It is mostly handled by
> > > > hardware, but software still needs to set the clkreq fields in the
> > > > PCIE_CLIENT_POWER_CON register to match the hardware implementation.)
> > > > -Program the frequency of the aux clock into the
> > > > DSP_PCIE_PL_AUX_CLK_FREQ_OFF register. (During L1 substates the core_clk
> > > > is turned off and the aux_clk is used instead.)
> > > >
> > > > [...]
> > >
> > > Applied, thanks!
> > >
> > > [1/1] PCI: dw-rockchip: Prevent advertising L1 Substates support
> > > commit: 40331c63e7901a2cc75ce6b5d24d50601efb833d
> >
> > Last update in this thread was "Applied, thanks!"
> >
> > and the patch was applied to pci/controller/dw-rockchip
> >
> > since then it seems to have been demoted to
> > pci/controller/dw-rockchip-pend
>
> That was Oct 20, and we had some conversation about a more generic
> approach after that, so I moved it to dw-rockchip-pend while we worked
> that out.
>
> I fleshed it out the generic approach and will post it soon.
Ok, thank you!
Kind regards,
Niklas
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
next prev parent reply other threads:[~2025-11-12 8:40 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-17 16:32 [PATCH v3] PCI: dw-rockchip: Prevent advertising L1 Substates support Niklas Cassel
2025-10-17 16:32 ` Niklas Cassel
2025-10-17 16:45 ` Bjorn Helgaas
2025-10-17 16:45 ` Bjorn Helgaas
2025-10-18 5:07 ` Niklas Cassel
2025-10-18 5:07 ` Niklas Cassel
2025-10-21 2:32 ` Manivannan Sadhasivam
2025-10-21 2:32 ` Manivannan Sadhasivam
2025-11-04 12:30 ` Niklas Cassel
2025-11-04 12:30 ` Niklas Cassel
2025-10-20 5:53 ` FUKAUMI Naoki
2025-10-20 5:53 ` FUKAUMI Naoki
2025-10-21 2:35 ` Manivannan Sadhasivam
2025-10-21 2:35 ` Manivannan Sadhasivam
2025-11-11 13:08 ` Niklas Cassel
2025-11-11 13:08 ` Niklas Cassel
2025-11-11 13:28 ` Shawn Lin
2025-11-11 13:28 ` Shawn Lin
2025-11-11 21:43 ` Bjorn Helgaas
2025-11-11 21:43 ` Bjorn Helgaas
2025-11-12 8:40 ` Niklas Cassel [this message]
2025-11-12 8:40 ` Niklas Cassel
2025-10-28 19:02 ` Bjorn Helgaas
2025-10-28 19:02 ` Bjorn Helgaas
2025-11-03 21:32 ` Bjorn Helgaas
2025-11-03 21:32 ` Bjorn Helgaas
2025-11-04 0:58 ` Shawn Lin
2025-11-04 0:58 ` Shawn Lin
2025-11-04 22:17 ` Bjorn Helgaas
2025-11-04 22:17 ` Bjorn Helgaas
2025-11-06 7:06 ` Manivannan Sadhasivam
2025-11-06 7:06 ` Manivannan Sadhasivam
2025-11-04 12:53 ` Niklas Cassel
2025-11-04 12:53 ` Niklas Cassel
2025-11-04 22:24 ` Bjorn Helgaas
2025-11-04 22:24 ` Bjorn Helgaas
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