From: Vinod Koul <vkoul@kernel.org>
To: Vladimir Oltean <vladimir.oltean@nxp.com>
Cc: linux-phy@lists.infradead.org,
Ioana Ciornei <ioana.ciornei@nxp.com>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Josua Mayer <josua@solid-run.com>,
linux-kernel@vger.kernel.org, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH v4 phy 01/16] dt-bindings: phy: lynx-28g: permit lane OF PHY providers
Date: Thu, 13 Nov 2025 22:16:49 +0530 [thread overview]
Message-ID: <aRYLeVUSk5G3DYlF@vaman> (raw)
In-Reply-To: <20251110092241.1306838-2-vladimir.oltean@nxp.com>
On 10-11-25, 11:22, Vladimir Oltean wrote:
> Josua Mayer requested to have OF nodes for each lane, so that he
> (and other board developers) can further describe electrical parameters
> individually.
>
> For this use case, we need a container node to apply the already
> existing Documentation/devicetree/bindings/phy/transmit-amplitude.yaml,
> plus whatever other schemas might get standardized for TX equalization
> parameters, polarity inversion etc.
>
> When lane OF nodes exist, these are also PHY providers ("phys" phandles
> can point directly to them). Compare that to the existing binding, where
> the PHY provider is the top-level SerDes node, and the second cell in
> the "phys" phandle specifies the lane index.
>
> The new binding format overlaps over the old one without interfering,
> but there is a caveat:
>
> Existing device trees, which already have "phys = <&serdes1 0>" cannot
> be converted to "phys = <&serdes_1_lane_a>", because in doing so, we
> would break compatibility with old kernels which don't understand how to
> translate the latter phandle to a PHY.
>
> The transition to the new phandle format can be performed only after a
> reasonable amount of time has elapsed after this schema change and the
> corresponding driver change have been backported to stable kernels.
>
> However, the aforementioned transition is not strictly necessary, and
> the "hybrid" description (where individual lanes have their own OF node,
> but are not pointed to by the "phys" phandle) can remain for an
> indefinite amount of time, even if a little inelegant.
>
> For newly introduced device trees, where there are no compatibility
> concerns with old kernels to speak of, it is strongly recommended to use
> the "phys = <&serdes_1_lane_a>" format. The same holds for phandles
> towards lanes of LX2160A SerDes #3, which at the time of writing is not
> yet described in fsl-lx2160a.dtsi, so there is no legacy to maintain.
>
> To avoid the strange situation where we have a "phy" (SerDes node) ->
> "phy" (lane node) hierarchy, let's rename the expected name of the
> top-level node to "serdes", and update the example too. This has a
> theoretical chance of causing regressions if bootloaders search for
> hardcoded paths rather than using aliases, but to the best of my
> knowledge, for LX2160A/LX2162A this is not the case.
>
> Link: https://lore.kernel.org/lkml/02270f62-9334-400c-b7b9-7e6a44dbbfc9@solid-run.com/
> Cc: Rob Herring <robh@kernel.org>
> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: stable@vger.kernel.org
You can keep cc lines after s-o-b line after the '---' separator, that
way it will be skipped when applying while email client will cc folks.
My main question was cc stable, for a binding additions, that might not
be helpful as dts may not have these updates, so why port bindings?
--
~Vinod
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: Vinod Koul <vkoul@kernel.org>
To: Vladimir Oltean <vladimir.oltean@nxp.com>
Cc: linux-phy@lists.infradead.org,
Ioana Ciornei <ioana.ciornei@nxp.com>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Josua Mayer <josua@solid-run.com>,
linux-kernel@vger.kernel.org, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH v4 phy 01/16] dt-bindings: phy: lynx-28g: permit lane OF PHY providers
Date: Thu, 13 Nov 2025 22:16:49 +0530 [thread overview]
Message-ID: <aRYLeVUSk5G3DYlF@vaman> (raw)
In-Reply-To: <20251110092241.1306838-2-vladimir.oltean@nxp.com>
On 10-11-25, 11:22, Vladimir Oltean wrote:
> Josua Mayer requested to have OF nodes for each lane, so that he
> (and other board developers) can further describe electrical parameters
> individually.
>
> For this use case, we need a container node to apply the already
> existing Documentation/devicetree/bindings/phy/transmit-amplitude.yaml,
> plus whatever other schemas might get standardized for TX equalization
> parameters, polarity inversion etc.
>
> When lane OF nodes exist, these are also PHY providers ("phys" phandles
> can point directly to them). Compare that to the existing binding, where
> the PHY provider is the top-level SerDes node, and the second cell in
> the "phys" phandle specifies the lane index.
>
> The new binding format overlaps over the old one without interfering,
> but there is a caveat:
>
> Existing device trees, which already have "phys = <&serdes1 0>" cannot
> be converted to "phys = <&serdes_1_lane_a>", because in doing so, we
> would break compatibility with old kernels which don't understand how to
> translate the latter phandle to a PHY.
>
> The transition to the new phandle format can be performed only after a
> reasonable amount of time has elapsed after this schema change and the
> corresponding driver change have been backported to stable kernels.
>
> However, the aforementioned transition is not strictly necessary, and
> the "hybrid" description (where individual lanes have their own OF node,
> but are not pointed to by the "phys" phandle) can remain for an
> indefinite amount of time, even if a little inelegant.
>
> For newly introduced device trees, where there are no compatibility
> concerns with old kernels to speak of, it is strongly recommended to use
> the "phys = <&serdes_1_lane_a>" format. The same holds for phandles
> towards lanes of LX2160A SerDes #3, which at the time of writing is not
> yet described in fsl-lx2160a.dtsi, so there is no legacy to maintain.
>
> To avoid the strange situation where we have a "phy" (SerDes node) ->
> "phy" (lane node) hierarchy, let's rename the expected name of the
> top-level node to "serdes", and update the example too. This has a
> theoretical chance of causing regressions if bootloaders search for
> hardcoded paths rather than using aliases, but to the best of my
> knowledge, for LX2160A/LX2162A this is not the case.
>
> Link: https://lore.kernel.org/lkml/02270f62-9334-400c-b7b9-7e6a44dbbfc9@solid-run.com/
> Cc: Rob Herring <robh@kernel.org>
> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: stable@vger.kernel.org
You can keep cc lines after s-o-b line after the '---' separator, that
way it will be skipped when applying while email client will cc folks.
My main question was cc stable, for a binding additions, that might not
be helpful as dts may not have these updates, so why port bindings?
--
~Vinod
next prev parent reply other threads:[~2025-11-13 16:46 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-10 9:22 [PATCH v4 phy 00/16] Lynx 28G improvements part 1 Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
2025-11-10 9:22 ` [PATCH v4 phy 01/16] dt-bindings: phy: lynx-28g: permit lane OF PHY providers Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
2025-11-12 16:20 ` Rob Herring (Arm)
2025-11-12 16:20 ` Rob Herring (Arm)
2025-11-13 16:46 ` Vinod Koul [this message]
2025-11-13 16:46 ` Vinod Koul
2025-11-13 16:54 ` Vladimir Oltean
2025-11-13 16:54 ` Vladimir Oltean
2025-11-10 9:22 ` [PATCH v4 phy 02/16] phy: lynx-28g: refactor lane probing to lynx_28g_probe_lane() Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
2025-11-13 16:49 ` Vinod Koul
2025-11-13 16:49 ` Vinod Koul
2025-11-13 16:56 ` Vladimir Oltean
2025-11-13 16:56 ` Vladimir Oltean
2025-11-17 18:57 ` Vladimir Oltean
2025-11-17 18:57 ` Vladimir Oltean
2025-11-10 9:22 ` [PATCH v4 phy 03/16] phy: lynx-28g: support individual lanes as OF PHY providers Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
2025-11-10 9:22 ` [PATCH v4 phy 04/16] phy: lynx-28g: remove LYNX_28G_ prefix from register names Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
2025-11-10 9:22 ` [PATCH v4 phy 05/16] phy: lynx-28g: don't concatenate lynx_28g_lane_rmw() argument "reg" with "val" and "mask" Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
2025-11-10 9:22 ` [PATCH v4 phy 06/16] phy: lynx-28g: use FIELD_GET() and FIELD_PREP() Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
2025-11-10 9:22 ` [PATCH v4 phy 07/16] phy: lynx-28g: convert iowrite32() calls with magic values to macros Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
2025-11-10 9:22 ` [PATCH v4 phy 08/16] phy: lynx-28g: restructure protocol configuration register accesses Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
2025-11-10 9:22 ` [PATCH v4 phy 09/16] phy: lynx-28g: make lynx_28g_set_lane_mode() more systematic Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
2025-11-10 9:22 ` [PATCH v4 phy 10/16] phy: lynx-28g: refactor lane->interface to lane->mode Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
2025-11-10 9:22 ` [PATCH v4 phy 11/16] phy: lynx-28g: distinguish between 10GBASE-R and USXGMII Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
2025-11-10 9:22 ` [PATCH v4 phy 12/16] phy: lynx-28g: configure more equalization params for 1GbE and 10GbE Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
2025-11-10 9:22 ` [PATCH v4 phy 13/16] phy: lynx-28g: use "dev" argument more in lynx_28g_probe() Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
2025-11-10 9:22 ` [PATCH v4 phy 14/16] phy: lynx-28g: improve lynx_28g_probe() sequence Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
2025-11-10 9:22 ` [PATCH v4 phy 15/16] dt-bindings: phy: lynx-28g: add compatible strings per SerDes and instantiation Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
2025-11-10 10:29 ` Rob Herring (Arm)
2025-11-10 10:29 ` Rob Herring (Arm)
2025-11-10 11:58 ` Vladimir Oltean
2025-11-10 11:58 ` Vladimir Oltean
2025-11-10 9:22 ` [PATCH v4 phy 16/16] phy: lynx-28g: probe on per-SoC and per-instance compatible strings Vladimir Oltean
2025-11-10 9:22 ` Vladimir Oltean
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