From: Gregory Price <gourry@gourry.net>
To: Alison Schofield <alison.schofield@intel.com>
Cc: Robert Richter <rrichter@amd.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Dave Jiang <dave.jiang@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org,
"Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>,
Terry Bowman <terry.bowman@amd.com>,
Joshua Hahn <joshua.hahnjy@gmail.com>
Subject: Re: [PATCH v6 00/11] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement
Date: Tue, 25 Nov 2025 08:54:58 -0500 [thread overview]
Message-ID: <aSW1MlUSs2jjdVjO@gourry-fedora-PF4VCD3F> (raw)
In-Reply-To: <aSUh-9fXFGsK_Z1_@aschofie-mobl2.lan>
On Mon, Nov 24, 2025 at 07:26:51PM -0800, Alison Schofield wrote:
> On Mon, Nov 24, 2025 at 03:10:07PM -0500, Gregory Price wrote:
> >
> > IIRC the to_spa() function wouldn't be populated (will be NULL) if this
> > is the case, so you wouldn't even be able to call the translation
> > function.
>
> The hpa_to_spa fn defined as a root decoder ops is an additional layer for
> arch's needing HPA to SPA translation. It's optional. If there is no
> hpa_to_spa fn, then it is assumed that the CXL HPA==SPA and that is the
> 'final answer' added to the trace log.
>
> Sounds like you are on one of these systems, so maybe you could take a
> look at what happens. If your devices support, try to inject and/or
> clear poison and see the resulting kernel trace log. There is an
> example for that here:
> https://github.com/pmem/ndctl/blob/main/test/cxl-poison.sh
>
Servers am able to test on are @ 6.16 with cxl .17+.18 backports
I don't see: /sys/kernel/debug/cxl/$dev/${action}_poison
in my sysfs
Have enabled enabling various debug and einj options.
When were these added? Am i missing build options?
~Gregory
next prev parent reply other threads:[~2025-11-25 13:55 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-14 0:40 [PATCH v6 00/11] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement Robert Richter
2025-11-14 0:40 ` [PATCH v6 01/11] cxl/region: Rename misleading variable name @hpa to @hpa_range Robert Richter
2025-11-14 0:40 ` [PATCH v6 02/11] cxl/region: Store root decoder in struct cxl_region Robert Richter
2025-11-14 0:40 ` [PATCH v6 03/11] cxl/region: Store HPA range " Robert Richter
2025-11-14 0:40 ` [PATCH v6 04/11] cxl: Simplify cxl_root_ops allocation and handling Robert Richter
2025-11-14 0:40 ` [PATCH v6 05/11] cxl/region: Separate region parameter setup and region construction Robert Richter
2025-11-14 0:40 ` [PATCH v6 06/11] cxl/region: Add @hpa_range argument to function cxl_calc_interleave_pos() Robert Richter
2025-11-14 0:40 ` [PATCH v6 07/11] cxl/region: Use region data to get the root decoder Robert Richter
2025-11-14 0:40 ` [PATCH v6 08/11] cxl: Introduce callback for HPA address ranges translation Robert Richter
2025-11-14 0:40 ` [PATCH v6 09/11] cxl/acpi: Prepare use of EFI runtime services Robert Richter
2025-11-14 0:40 ` [PATCH v6 10/11] cxl: Enable AMD Zen5 address translation using ACPI PRMT Robert Richter
2025-11-14 0:40 ` [PATCH v6 11/11] cxl/atl: Lock decoders that need address translation Robert Richter
2025-11-14 20:01 ` [PATCH v6 00/11] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement Alison Schofield
2025-11-17 14:58 ` Robert Richter
2025-11-24 1:14 ` Alison Schofield
2025-11-24 20:10 ` Gregory Price
2025-11-25 3:26 ` Alison Schofield
2025-11-25 13:54 ` Gregory Price [this message]
2025-11-25 16:37 ` Alison Schofield
2025-11-25 21:04 ` Gregory Price
2025-12-04 4:22 ` Alison Schofield
2025-12-05 10:02 ` Robert Richter
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