* [PATCH 01/14] target/i386: Remove x86_stl_phys_notdirty() leftover
2025-12-17 14:31 [PATCH 00/14] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
@ 2025-12-17 14:31 ` Philippe Mathieu-Daudé
2025-12-17 18:38 ` Pierrick Bouvier
` (2 more replies)
2025-12-17 14:31 ` [PATCH 02/14] target/sparc: Update MMU page table using stl_phys() Philippe Mathieu-Daudé
` (12 subsequent siblings)
13 siblings, 3 replies; 37+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-17 14:31 UTC (permalink / raw)
To: qemu-devel
Cc: Philippe Mathieu-Daudé, Anton Johansson, qemu-arm,
Mark Cave-Ayland, Paolo Bonzini, Michael S. Tsirkin,
Artyom Tarasenko, Peter Maydell, David Hildenbrand, Peter Xu,
Zhao Liu
Last use of x86_stl_phys_notdirty() was removed in commit 4a1e9d4d11c
("target/i386: Use atomic operations for pte updates"), let's remove.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/i386/cpu.h | 1 -
target/i386/helper.c | 10 ----------
2 files changed, 11 deletions(-)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index cee1f692a1c..4c0579a5678 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2623,7 +2623,6 @@ uint32_t x86_lduw_phys(CPUState *cs, hwaddr addr);
uint32_t x86_ldl_phys(CPUState *cs, hwaddr addr);
uint64_t x86_ldq_phys(CPUState *cs, hwaddr addr);
void x86_stb_phys(CPUState *cs, hwaddr addr, uint8_t val);
-void x86_stl_phys_notdirty(CPUState *cs, hwaddr addr, uint32_t val);
void x86_stw_phys(CPUState *cs, hwaddr addr, uint32_t val);
void x86_stl_phys(CPUState *cs, hwaddr addr, uint32_t val);
void x86_stq_phys(CPUState *cs, hwaddr addr, uint64_t val);
diff --git a/target/i386/helper.c b/target/i386/helper.c
index 72b2e195a31..d14f14e0d4d 100644
--- a/target/i386/helper.c
+++ b/target/i386/helper.c
@@ -690,16 +690,6 @@ void x86_stb_phys(CPUState *cs, hwaddr addr, uint8_t val)
address_space_stb(as, addr, val, attrs, NULL);
}
-void x86_stl_phys_notdirty(CPUState *cs, hwaddr addr, uint32_t val)
-{
- X86CPU *cpu = X86_CPU(cs);
- CPUX86State *env = &cpu->env;
- MemTxAttrs attrs = cpu_get_mem_attrs(env);
- AddressSpace *as = cpu_addressspace(cs, attrs);
-
- address_space_stl_notdirty(as, addr, val, attrs, NULL);
-}
-
void x86_stw_phys(CPUState *cs, hwaddr addr, uint32_t val)
{
X86CPU *cpu = X86_CPU(cs);
--
2.52.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* Re: [PATCH 01/14] target/i386: Remove x86_stl_phys_notdirty() leftover
2025-12-17 14:31 ` [PATCH 01/14] target/i386: Remove x86_stl_phys_notdirty() leftover Philippe Mathieu-Daudé
@ 2025-12-17 18:38 ` Pierrick Bouvier
2025-12-17 18:59 ` Richard Henderson
2025-12-18 7:26 ` Zhao Liu
2 siblings, 0 replies; 37+ messages in thread
From: Pierrick Bouvier @ 2025-12-17 18:38 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, qemu-arm, Mark Cave-Ayland, Paolo Bonzini,
Michael S. Tsirkin, Artyom Tarasenko, Peter Maydell,
David Hildenbrand, Peter Xu, Zhao Liu
On 12/17/25 6:31 AM, Philippe Mathieu-Daudé wrote:
> Last use of x86_stl_phys_notdirty() was removed in commit 4a1e9d4d11c
> ("target/i386: Use atomic operations for pte updates"), let's remove.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> target/i386/cpu.h | 1 -
> target/i386/helper.c | 10 ----------
> 2 files changed, 11 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 37+ messages in thread* Re: [PATCH 01/14] target/i386: Remove x86_stl_phys_notdirty() leftover
2025-12-17 14:31 ` [PATCH 01/14] target/i386: Remove x86_stl_phys_notdirty() leftover Philippe Mathieu-Daudé
2025-12-17 18:38 ` Pierrick Bouvier
@ 2025-12-17 18:59 ` Richard Henderson
2025-12-18 7:26 ` Zhao Liu
2 siblings, 0 replies; 37+ messages in thread
From: Richard Henderson @ 2025-12-17 18:59 UTC (permalink / raw)
To: qemu-devel
On 12/18/25 01:31, Philippe Mathieu-Daudé wrote:
> Last use of x86_stl_phys_notdirty() was removed in commit 4a1e9d4d11c
> ("target/i386: Use atomic operations for pte updates"), let's remove.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> target/i386/cpu.h | 1 -
> target/i386/helper.c | 10 ----------
> 2 files changed, 11 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 37+ messages in thread* Re: [PATCH 01/14] target/i386: Remove x86_stl_phys_notdirty() leftover
2025-12-17 14:31 ` [PATCH 01/14] target/i386: Remove x86_stl_phys_notdirty() leftover Philippe Mathieu-Daudé
2025-12-17 18:38 ` Pierrick Bouvier
2025-12-17 18:59 ` Richard Henderson
@ 2025-12-18 7:26 ` Zhao Liu
2 siblings, 0 replies; 37+ messages in thread
From: Zhao Liu @ 2025-12-18 7:26 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Anton Johansson, qemu-arm, Mark Cave-Ayland,
Paolo Bonzini, Michael S. Tsirkin, Artyom Tarasenko,
Peter Maydell, David Hildenbrand, Peter Xu
On Wed, Dec 17, 2025 at 03:31:37PM +0100, Philippe Mathieu-Daudé wrote:
> Date: Wed, 17 Dec 2025 15:31:37 +0100
> From: Philippe Mathieu-Daudé <philmd@linaro.org>
> Subject: [PATCH 01/14] target/i386: Remove x86_stl_phys_notdirty() leftover
> X-Mailer: git-send-email 2.52.0
>
> Last use of x86_stl_phys_notdirty() was removed in commit 4a1e9d4d11c
> ("target/i386: Use atomic operations for pte updates"), let's remove.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> target/i386/cpu.h | 1 -
> target/i386/helper.c | 10 ----------
> 2 files changed, 11 deletions(-)
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH 02/14] target/sparc: Update MMU page table using stl_phys()
2025-12-17 14:31 [PATCH 00/14] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
2025-12-17 14:31 ` [PATCH 01/14] target/i386: Remove x86_stl_phys_notdirty() leftover Philippe Mathieu-Daudé
@ 2025-12-17 14:31 ` Philippe Mathieu-Daudé
2025-12-17 18:39 ` Pierrick Bouvier
2025-12-17 19:03 ` Richard Henderson
2025-12-17 14:31 ` [PATCH 03/14] hw/arm: Update bootloader generated with '-kernel' " Philippe Mathieu-Daudé
` (11 subsequent siblings)
13 siblings, 2 replies; 37+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-17 14:31 UTC (permalink / raw)
To: qemu-devel
Cc: Philippe Mathieu-Daudé, Anton Johansson, qemu-arm,
Mark Cave-Ayland, Paolo Bonzini, Michael S. Tsirkin,
Artyom Tarasenko, Peter Maydell, David Hildenbrand, Peter Xu
stl_phys_notdirty() is supposed to do an optimized CODE
path store. Here we update the page table via the DATA
path, so can use the normal stl_phys() helper.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/sparc/mmu_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index 217580a4d8c..46bf500ea83 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@@ -189,7 +189,7 @@ static int get_physical_address(CPUSPARCState *env, CPUTLBEntryFull *full,
if (is_dirty) {
pde |= PG_MODIFIED_MASK;
}
- stl_phys_notdirty(cs->as, pde_ptr, pde);
+ stl_phys(cs->as, pde_ptr, pde);
}
/* the page can be put in the TLB */
--
2.52.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* Re: [PATCH 02/14] target/sparc: Update MMU page table using stl_phys()
2025-12-17 14:31 ` [PATCH 02/14] target/sparc: Update MMU page table using stl_phys() Philippe Mathieu-Daudé
@ 2025-12-17 18:39 ` Pierrick Bouvier
2025-12-17 19:03 ` Richard Henderson
1 sibling, 0 replies; 37+ messages in thread
From: Pierrick Bouvier @ 2025-12-17 18:39 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, qemu-arm, Mark Cave-Ayland, Paolo Bonzini,
Michael S. Tsirkin, Artyom Tarasenko, Peter Maydell,
David Hildenbrand, Peter Xu
On 12/17/25 6:31 AM, Philippe Mathieu-Daudé wrote:
> stl_phys_notdirty() is supposed to do an optimized CODE
> path store. Here we update the page table via the DATA
> path, so can use the normal stl_phys() helper.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> target/sparc/mmu_helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 02/14] target/sparc: Update MMU page table using stl_phys()
2025-12-17 14:31 ` [PATCH 02/14] target/sparc: Update MMU page table using stl_phys() Philippe Mathieu-Daudé
2025-12-17 18:39 ` Pierrick Bouvier
@ 2025-12-17 19:03 ` Richard Henderson
1 sibling, 0 replies; 37+ messages in thread
From: Richard Henderson @ 2025-12-17 19:03 UTC (permalink / raw)
To: qemu-devel
On 12/18/25 01:31, Philippe Mathieu-Daudé wrote:
> stl_phys_notdirty() is supposed to do an optimized CODE
> path store. Here we update the page table via the DATA
> path, so can use the normal stl_phys() helper.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> target/sparc/mmu_helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
> index 217580a4d8c..46bf500ea83 100644
> --- a/target/sparc/mmu_helper.c
> +++ b/target/sparc/mmu_helper.c
> @@ -189,7 +189,7 @@ static int get_physical_address(CPUSPARCState *env, CPUTLBEntryFull *full,
> if (is_dirty) {
> pde |= PG_MODIFIED_MASK;
> }
> - stl_phys_notdirty(cs->as, pde_ptr, pde);
> + stl_phys(cs->as, pde_ptr, pde);
> }
>
> /* the page can be put in the TLB */
I didn't recall that we had this in Sparc.
I suspect that this needs to be reorganized to use atomic operations, like arm.
That said, there's nothing we need from notdirty.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH 03/14] hw/arm: Update bootloader generated with '-kernel' using stl_phys()
2025-12-17 14:31 [PATCH 00/14] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
2025-12-17 14:31 ` [PATCH 01/14] target/i386: Remove x86_stl_phys_notdirty() leftover Philippe Mathieu-Daudé
2025-12-17 14:31 ` [PATCH 02/14] target/sparc: Update MMU page table using stl_phys() Philippe Mathieu-Daudé
@ 2025-12-17 14:31 ` Philippe Mathieu-Daudé
2025-12-17 18:39 ` Pierrick Bouvier
2025-12-17 19:07 ` Richard Henderson
2025-12-17 14:31 ` [PATCH 04/14] system/memory: Remove address_space_stl_notdirty and stl_phys_notdirty Philippe Mathieu-Daudé
` (10 subsequent siblings)
13 siblings, 2 replies; 37+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-17 14:31 UTC (permalink / raw)
To: qemu-devel
Cc: Philippe Mathieu-Daudé, Anton Johansson, qemu-arm,
Mark Cave-Ayland, Paolo Bonzini, Michael S. Tsirkin,
Artyom Tarasenko, Peter Maydell, David Hildenbrand, Peter Xu,
Richard Henderson, Cédric Le Goater, Steven Lee, Troy Lee,
Jamin Lin, Andrew Jeffery, Joel Stanley
When the MemTxAttrs value is not specified and no MemTxResult
provided, address_space_ld/st() is equivalent to the simpler
ld/st_phys() API variant. Use the latter.
The _notdirty() variant is supposed to /not/ mark the updated
CODE page as dirty, to not re-translate it. However this code
is only used with the '-kernel' CLI option after the machine
is created and /before/ the vCPUs run, and *only* during the
first (cold) reset; not during following (hot) resets. The
optimisation is totally not justified, since we haven't
translated any guest code yet. Replace by the normal stl_phys()
helper.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/aspeed.c | 3 +--
hw/arm/boot.c | 6 ++----
2 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 3a5071a3841..8ce82f1f622 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -77,8 +77,7 @@ static void aspeed_reset_secondary(ARMCPU *cpu,
CPUState *cs = CPU(cpu);
/* info->smp_bootreg_addr */
- address_space_stl_notdirty(as, AST_SMP_MBOX_FIELD_GOSIGN, 0,
- MEMTXATTRS_UNSPECIFIED, NULL);
+ stl_phys(as, AST_SMP_MBOX_FIELD_GOSIGN, 0);
cpu_set_pc(cs, info->smp_loader_start);
}
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index b91660208f5..5ca9c8db5cc 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -266,8 +266,7 @@ static void default_reset_secondary(ARMCPU *cpu,
AddressSpace *as = arm_boot_address_space(cpu, info);
CPUState *cs = CPU(cpu);
- address_space_stl_notdirty(as, info->smp_bootreg_addr,
- 0, MEMTXATTRS_UNSPECIFIED, NULL);
+ stl_phys(as, info->smp_bootreg_addr, 0);
cpu_set_pc(cs, info->smp_loader_start);
}
@@ -277,8 +276,7 @@ static inline bool have_dtb(const struct arm_boot_info *info)
}
#define WRITE_WORD(p, value) do { \
- address_space_stl_notdirty(as, p, value, \
- MEMTXATTRS_UNSPECIFIED, NULL); \
+ stl_phys(as, p, value); \
p += 4; \
} while (0)
--
2.52.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* Re: [PATCH 03/14] hw/arm: Update bootloader generated with '-kernel' using stl_phys()
2025-12-17 14:31 ` [PATCH 03/14] hw/arm: Update bootloader generated with '-kernel' " Philippe Mathieu-Daudé
@ 2025-12-17 18:39 ` Pierrick Bouvier
2025-12-17 19:07 ` Richard Henderson
1 sibling, 0 replies; 37+ messages in thread
From: Pierrick Bouvier @ 2025-12-17 18:39 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, qemu-arm, Mark Cave-Ayland, Paolo Bonzini,
Michael S. Tsirkin, Artyom Tarasenko, Peter Maydell,
David Hildenbrand, Peter Xu, Richard Henderson,
Cédric Le Goater, Steven Lee, Troy Lee, Jamin Lin,
Andrew Jeffery, Joel Stanley
On 12/17/25 6:31 AM, Philippe Mathieu-Daudé wrote:
> When the MemTxAttrs value is not specified and no MemTxResult
> provided, address_space_ld/st() is equivalent to the simpler
> ld/st_phys() API variant. Use the latter.
>
> The _notdirty() variant is supposed to /not/ mark the updated
> CODE page as dirty, to not re-translate it. However this code
> is only used with the '-kernel' CLI option after the machine
> is created and /before/ the vCPUs run, and *only* during the
> first (cold) reset; not during following (hot) resets. The
> optimisation is totally not justified, since we haven't
> translated any guest code yet. Replace by the normal stl_phys()
> helper.
>
> Suggested-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> hw/arm/aspeed.c | 3 +--
> hw/arm/boot.c | 6 ++----
> 2 files changed, 3 insertions(+), 6 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 03/14] hw/arm: Update bootloader generated with '-kernel' using stl_phys()
2025-12-17 14:31 ` [PATCH 03/14] hw/arm: Update bootloader generated with '-kernel' " Philippe Mathieu-Daudé
2025-12-17 18:39 ` Pierrick Bouvier
@ 2025-12-17 19:07 ` Richard Henderson
1 sibling, 0 replies; 37+ messages in thread
From: Richard Henderson @ 2025-12-17 19:07 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, qemu-arm, Mark Cave-Ayland, Paolo Bonzini,
Michael S. Tsirkin, Artyom Tarasenko, Peter Maydell,
David Hildenbrand, Peter Xu, Cédric Le Goater, Steven Lee,
Troy Lee, Jamin Lin, Andrew Jeffery, Joel Stanley
On 12/18/25 01:31, Philippe Mathieu-Daudé wrote:
> When the MemTxAttrs value is not specified and no MemTxResult
> provided, address_space_ld/st() is equivalent to the simpler
> ld/st_phys() API variant. Use the latter.
>
> The _notdirty() variant is supposed to/not/ mark the updated
> CODE page as dirty, to not re-translate it. However this code
> is only used with the '-kernel' CLI option after the machine
> is created and/before/ the vCPUs run, and*only* during the
> first (cold) reset; not during following (hot) resets. The
> optimisation is totally not justified, since we haven't
> translated any guest code yet. Replace by the normal stl_phys()
> helper.
>
> Suggested-by: Richard Henderson<richard.henderson@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> hw/arm/aspeed.c | 3 +--
> hw/arm/boot.c | 6 ++----
> 2 files changed, 3 insertions(+), 6 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH 04/14] system/memory: Remove address_space_stl_notdirty and stl_phys_notdirty
2025-12-17 14:31 [PATCH 00/14] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2025-12-17 14:31 ` [PATCH 03/14] hw/arm: Update bootloader generated with '-kernel' " Philippe Mathieu-Daudé
@ 2025-12-17 14:31 ` Philippe Mathieu-Daudé
2025-12-17 18:39 ` Pierrick Bouvier
2025-12-17 19:08 ` Richard Henderson
2025-12-17 14:31 ` [PATCH 05/14] system/physmem: Inline and remove leul_to_cpu() Philippe Mathieu-Daudé
` (9 subsequent siblings)
13 siblings, 2 replies; 37+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-17 14:31 UTC (permalink / raw)
To: qemu-devel
Cc: Philippe Mathieu-Daudé, Anton Johansson, qemu-arm,
Mark Cave-Ayland, Paolo Bonzini, Michael S. Tsirkin,
Artyom Tarasenko, Peter Maydell, David Hildenbrand, Peter Xu,
Pierrick Bouvier
stl_phys_notdirty() was added in commit 8df1cd076cc ("physical memory
access functions") as a (premature?) optimisation for the CODE path.
Meanwhile 20 years passed, we might never have understood / used it
properly; the code evolved and now the recommended way to access the
CODE path is via the cpu_ld/st_mmu*() API.
Remove both address_space_stl_notdirty() and stl_phys_notdirty()
leftovers.
Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/system/memory.h | 6 ------
include/exec/memory_ldst.h.inc | 2 --
system/memory_ldst.c.inc | 39 ----------------------------------
3 files changed, 47 deletions(-)
diff --git a/include/system/memory.h b/include/system/memory.h
index 3bd5ffa5e0d..e69171de05a 100644
--- a/include/system/memory.h
+++ b/include/system/memory.h
@@ -2850,12 +2850,6 @@ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr,
#define ARG1_DECL AddressSpace *as
#include "exec/memory_ldst.h.inc"
-static inline void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val)
-{
- address_space_stl_notdirty(as, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
#define SUFFIX
#define ARG1 as
#define ARG1_DECL AddressSpace *as
diff --git a/include/exec/memory_ldst.h.inc b/include/exec/memory_ldst.h.inc
index 7270235c600..173164fee3a 100644
--- a/include/exec/memory_ldst.h.inc
+++ b/include/exec/memory_ldst.h.inc
@@ -25,8 +25,6 @@ uint32_t glue(address_space_ldl, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
uint64_t glue(address_space_ldq, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stw, SUFFIX)(ARG1_DECL,
hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stl, SUFFIX)(ARG1_DECL,
diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
index 333da209d1a..b45bfecd137 100644
--- a/system/memory_ldst.c.inc
+++ b/system/memory_ldst.c.inc
@@ -261,45 +261,6 @@ uint16_t glue(address_space_lduw_be, SUFFIX)(ARG1_DECL,
DEVICE_BIG_ENDIAN);
}
-/* warning: addr must be aligned. The ram page is not masked as dirty
- and the code inside is not invalidated. It is useful if the dirty
- bits are used to track modified PTEs */
-void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- uint8_t *ptr;
- MemoryRegion *mr;
- hwaddr l = 4;
- hwaddr addr1;
- MemTxResult r;
- uint8_t dirty_log_mask;
- bool release_lock = false;
-
- RCU_READ_LOCK();
- mr = TRANSLATE(addr, &addr1, &l, true, attrs);
- if (l < 4 || !memory_access_is_direct(mr, true, attrs)) {
- release_lock |= prepare_mmio_access(mr);
-
- r = memory_region_dispatch_write(mr, addr1, val, MO_32, attrs);
- } else {
- ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- stl_p(ptr, val);
-
- dirty_log_mask = memory_region_get_dirty_log_mask(mr);
- dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE);
- physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
- 4, dirty_log_mask);
- r = MEMTX_OK;
- }
- if (result) {
- *result = r;
- }
- if (release_lock) {
- bql_unlock();
- }
- RCU_READ_UNLOCK();
-}
-
/* warning: addr must be aligned */
static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, uint32_t val, MemTxAttrs attrs,
--
2.52.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* Re: [PATCH 04/14] system/memory: Remove address_space_stl_notdirty and stl_phys_notdirty
2025-12-17 14:31 ` [PATCH 04/14] system/memory: Remove address_space_stl_notdirty and stl_phys_notdirty Philippe Mathieu-Daudé
@ 2025-12-17 18:39 ` Pierrick Bouvier
2025-12-17 19:08 ` Richard Henderson
1 sibling, 0 replies; 37+ messages in thread
From: Pierrick Bouvier @ 2025-12-17 18:39 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, qemu-arm, Mark Cave-Ayland, Paolo Bonzini,
Michael S. Tsirkin, Artyom Tarasenko, Peter Maydell,
David Hildenbrand, Peter Xu
On 12/17/25 6:31 AM, Philippe Mathieu-Daudé wrote:
> stl_phys_notdirty() was added in commit 8df1cd076cc ("physical memory
> access functions") as a (premature?) optimisation for the CODE path.
> Meanwhile 20 years passed, we might never have understood / used it
> properly; the code evolved and now the recommended way to access the
> CODE path is via the cpu_ld/st_mmu*() API.
>
> Remove both address_space_stl_notdirty() and stl_phys_notdirty()
> leftovers.
>
> Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> include/system/memory.h | 6 ------
> include/exec/memory_ldst.h.inc | 2 --
> system/memory_ldst.c.inc | 39 ----------------------------------
> 3 files changed, 47 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 37+ messages in thread* Re: [PATCH 04/14] system/memory: Remove address_space_stl_notdirty and stl_phys_notdirty
2025-12-17 14:31 ` [PATCH 04/14] system/memory: Remove address_space_stl_notdirty and stl_phys_notdirty Philippe Mathieu-Daudé
2025-12-17 18:39 ` Pierrick Bouvier
@ 2025-12-17 19:08 ` Richard Henderson
1 sibling, 0 replies; 37+ messages in thread
From: Richard Henderson @ 2025-12-17 19:08 UTC (permalink / raw)
To: qemu-devel
On 12/18/25 01:31, Philippe Mathieu-Daudé wrote:
> stl_phys_notdirty() was added in commit 8df1cd076cc ("physical memory
> access functions") as a (premature?) optimisation for the CODE path.
> Meanwhile 20 years passed, we might never have understood / used it
> properly; the code evolved and now the recommended way to access the
> CODE path is via the cpu_ld/st_mmu*() API.
>
> Remove both address_space_stl_notdirty() and stl_phys_notdirty()
> leftovers.
>
> Suggested-by: Pierrick Bouvier<pierrick.bouvier@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> include/system/memory.h | 6 ------
> include/exec/memory_ldst.h.inc | 2 --
> system/memory_ldst.c.inc | 39 ----------------------------------
> 3 files changed, 47 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH 05/14] system/physmem: Inline and remove leul_to_cpu()
2025-12-17 14:31 [PATCH 00/14] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2025-12-17 14:31 ` [PATCH 04/14] system/memory: Remove address_space_stl_notdirty and stl_phys_notdirty Philippe Mathieu-Daudé
@ 2025-12-17 14:31 ` Philippe Mathieu-Daudé
2025-12-17 18:42 ` Pierrick Bouvier
2025-12-17 19:09 ` Richard Henderson
2025-12-17 14:31 ` [PATCH 06/14] system/physmem: Use explicit endianness in subpage_ops::read/write() Philippe Mathieu-Daudé
` (8 subsequent siblings)
13 siblings, 2 replies; 37+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-17 14:31 UTC (permalink / raw)
To: qemu-devel
Cc: Philippe Mathieu-Daudé, Anton Johansson, qemu-arm,
Mark Cave-Ayland, Paolo Bonzini, Michael S. Tsirkin,
Artyom Tarasenko, Peter Maydell, David Hildenbrand, Peter Xu
leul_to_cpu() is only used within physmem.c: inline it
and remove.
Since @bitmap is of 'unsigned long' type, use its size
with ldn_le_p() instead of using HOST_LONG_BITS.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/qemu/bswap.h | 11 -----------
system/physmem.c | 5 +++--
2 files changed, 3 insertions(+), 13 deletions(-)
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index 39ba64046a6..65a1b3634f4 100644
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -375,17 +375,6 @@ static inline void stq_be_p(void *ptr, uint64_t v)
stq_he_p(ptr, be_bswap(v, 64));
}
-static inline unsigned long leul_to_cpu(unsigned long v)
-{
-#if HOST_LONG_BITS == 32
- return le_bswap(v, 32);
-#elif HOST_LONG_BITS == 64
- return le_bswap(v, 64);
-#else
-# error Unknown sizeof long
-#endif
-}
-
/* Store v to p as a sz byte value in host order */
#define DO_STN_LDN_P(END) \
static inline void stn_## END ## _p(void *ptr, int sz, uint64_t v) \
diff --git a/system/physmem.c b/system/physmem.c
index c9869e4049f..1292f49095f 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -1254,7 +1254,8 @@ uint64_t physical_memory_set_dirty_lebitmap(unsigned long *bitmap,
for (k = 0; k < nr; k++) {
if (bitmap[k]) {
- unsigned long temp = leul_to_cpu(bitmap[k]);
+ unsigned long temp = ldn_le_p(&bitmap[k],
+ sizeof(bitmap[k]));
nbits = ctpopl(temp);
qatomic_or(&blocks[DIRTY_MEMORY_VGA][idx][offset], temp);
@@ -1301,7 +1302,7 @@ uint64_t physical_memory_set_dirty_lebitmap(unsigned long *bitmap,
*/
for (i = 0; i < len; i++) {
if (bitmap[i] != 0) {
- c = leul_to_cpu(bitmap[i]);
+ c = ldn_le_p(&bitmap[i], sizeof(bitmap[i]));
nbits = ctpopl(c);
if (unlikely(global_dirty_tracking & GLOBAL_DIRTY_DIRTY_RATE)) {
total_dirty_pages += nbits;
--
2.52.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* Re: [PATCH 05/14] system/physmem: Inline and remove leul_to_cpu()
2025-12-17 14:31 ` [PATCH 05/14] system/physmem: Inline and remove leul_to_cpu() Philippe Mathieu-Daudé
@ 2025-12-17 18:42 ` Pierrick Bouvier
2025-12-17 19:09 ` Richard Henderson
1 sibling, 0 replies; 37+ messages in thread
From: Pierrick Bouvier @ 2025-12-17 18:42 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, qemu-arm, Mark Cave-Ayland, Paolo Bonzini,
Michael S. Tsirkin, Artyom Tarasenko, Peter Maydell,
David Hildenbrand, Peter Xu
On 12/17/25 6:31 AM, Philippe Mathieu-Daudé wrote:
> leul_to_cpu() is only used within physmem.c: inline it
> and remove.
> Since @bitmap is of 'unsigned long' type, use its size
> with ldn_le_p() instead of using HOST_LONG_BITS.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> include/qemu/bswap.h | 11 -----------
> system/physmem.c | 5 +++--
> 2 files changed, 3 insertions(+), 13 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 05/14] system/physmem: Inline and remove leul_to_cpu()
2025-12-17 14:31 ` [PATCH 05/14] system/physmem: Inline and remove leul_to_cpu() Philippe Mathieu-Daudé
2025-12-17 18:42 ` Pierrick Bouvier
@ 2025-12-17 19:09 ` Richard Henderson
1 sibling, 0 replies; 37+ messages in thread
From: Richard Henderson @ 2025-12-17 19:09 UTC (permalink / raw)
To: qemu-devel
On 12/18/25 01:31, Philippe Mathieu-Daudé wrote:
> leul_to_cpu() is only used within physmem.c: inline it
> and remove.
> Since @bitmap is of 'unsigned long' type, use its size
> with ldn_le_p() instead of using HOST_LONG_BITS.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> include/qemu/bswap.h | 11 -----------
> system/physmem.c | 5 +++--
> 2 files changed, 3 insertions(+), 13 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH 06/14] system/physmem: Use explicit endianness in subpage_ops::read/write()
2025-12-17 14:31 [PATCH 00/14] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2025-12-17 14:31 ` [PATCH 05/14] system/physmem: Inline and remove leul_to_cpu() Philippe Mathieu-Daudé
@ 2025-12-17 14:31 ` Philippe Mathieu-Daudé
2025-12-17 19:43 ` Richard Henderson
2025-12-17 14:31 ` [PATCH 07/14] system/memory: Split MemoryRegionCache API to 'memory_cached.h' Philippe Mathieu-Daudé
` (7 subsequent siblings)
13 siblings, 1 reply; 37+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-17 14:31 UTC (permalink / raw)
To: qemu-devel
Cc: Philippe Mathieu-Daudé, Anton Johansson, qemu-arm,
Mark Cave-Ayland, Paolo Bonzini, Michael S. Tsirkin,
Artyom Tarasenko, Peter Maydell, David Hildenbrand, Peter Xu
Replace the ldn_p/stn_p() calls by their explicit endianness
variants. Duplicate the MemoryRegionOps, replacing the single
DEVICE_NATIVE_ENDIAN entry by a pair of LITTLE and BIG ones.
Select the proper MemoryRegionOps in subpage_init().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
system/physmem.c | 81 ++++++++++++++++++++++++++++++++++++++----------
1 file changed, 64 insertions(+), 17 deletions(-)
diff --git a/system/physmem.c b/system/physmem.c
index 1292f49095f..d8465f085bd 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -2896,8 +2896,8 @@ static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len,
bool is_write, MemTxAttrs attrs);
-static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,
- unsigned len, MemTxAttrs attrs)
+static MemTxResult subpage_read_le(void *opaque, hwaddr addr, uint64_t *data,
+ unsigned len, MemTxAttrs attrs)
{
subpage_t *subpage = opaque;
uint8_t buf[8];
@@ -2911,12 +2911,32 @@ static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,
if (res) {
return res;
}
- *data = ldn_p(buf, len);
+ *data = ldn_le_p(buf, len);
return MEMTX_OK;
}
-static MemTxResult subpage_write(void *opaque, hwaddr addr,
- uint64_t value, unsigned len, MemTxAttrs attrs)
+static MemTxResult subpage_read_be(void *opaque, hwaddr addr, uint64_t *data,
+ unsigned len, MemTxAttrs attrs)
+{
+ subpage_t *subpage = opaque;
+ uint8_t buf[8];
+ MemTxResult res;
+
+#if defined(DEBUG_SUBPAGE)
+ printf("%s: subpage %p len %u addr " HWADDR_FMT_plx "\n", __func__,
+ subpage, len, addr);
+#endif
+ res = flatview_read(subpage->fv, addr + subpage->base, attrs, buf, len);
+ if (res) {
+ return res;
+ }
+ *data = ldn_be_p(buf, len);
+ return MEMTX_OK;
+}
+
+static MemTxResult subpage_write_le(void *opaque, hwaddr addr,
+ uint64_t value, unsigned len,
+ MemTxAttrs attrs)
{
subpage_t *subpage = opaque;
uint8_t buf[8];
@@ -2926,7 +2946,23 @@ static MemTxResult subpage_write(void *opaque, hwaddr addr,
" value %"PRIx64"\n",
__func__, subpage, len, addr, value);
#endif
- stn_p(buf, len, value);
+ stn_le_p(buf, len, value);
+ return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len);
+}
+
+static MemTxResult subpage_write_be(void *opaque, hwaddr addr,
+ uint64_t value, unsigned len,
+ MemTxAttrs attrs)
+{
+ subpage_t *subpage = opaque;
+ uint8_t buf[8];
+
+#if defined(DEBUG_SUBPAGE)
+ printf("%s: subpage %p len %u addr " HWADDR_FMT_plx
+ " value %"PRIx64"\n",
+ __func__, subpage, len, addr, value);
+#endif
+ stn_be_p(buf, len, value);
return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len);
}
@@ -2944,15 +2980,26 @@ static bool subpage_accepts(void *opaque, hwaddr addr,
len, is_write, attrs);
}
-static const MemoryRegionOps subpage_ops = {
- .read_with_attrs = subpage_read,
- .write_with_attrs = subpage_write,
- .impl.min_access_size = 1,
- .impl.max_access_size = 8,
- .valid.min_access_size = 1,
- .valid.max_access_size = 8,
- .valid.accepts = subpage_accepts,
- .endianness = DEVICE_NATIVE_ENDIAN,
+static const MemoryRegionOps subpage_ops[2] = {
+ [0 ... 1] = {
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 8,
+ },
+ .valid = {
+ .min_access_size = 1,
+ .max_access_size = 8,
+ .accepts = subpage_accepts,
+ },
+ },
+
+ [0].endianness = DEVICE_LITTLE_ENDIAN,
+ [0].read_with_attrs = subpage_read_le,
+ [0].write_with_attrs = subpage_write_le,
+
+ [1].endianness = DEVICE_BIG_ENDIAN,
+ [1].read_with_attrs = subpage_read_be,
+ [1].write_with_attrs = subpage_write_be,
};
static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end,
@@ -2983,8 +3030,8 @@ static subpage_t *subpage_init(FlatView *fv, hwaddr base)
mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t));
mmio->fv = fv;
mmio->base = base;
- memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,
- NULL, TARGET_PAGE_SIZE);
+ memory_region_init_io(&mmio->iomem, NULL, &subpage_ops[target_big_endian()],
+ mmio, NULL, TARGET_PAGE_SIZE);
mmio->iomem.subpage = true;
#if defined(DEBUG_SUBPAGE)
printf("%s: %p base " HWADDR_FMT_plx " len %08x\n", __func__,
--
2.52.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* Re: [PATCH 06/14] system/physmem: Use explicit endianness in subpage_ops::read/write()
2025-12-17 14:31 ` [PATCH 06/14] system/physmem: Use explicit endianness in subpage_ops::read/write() Philippe Mathieu-Daudé
@ 2025-12-17 19:43 ` Richard Henderson
0 siblings, 0 replies; 37+ messages in thread
From: Richard Henderson @ 2025-12-17 19:43 UTC (permalink / raw)
To: qemu-devel
On 12/18/25 01:31, Philippe Mathieu-Daudé wrote:
> Replace the ldn_p/stn_p() calls by their explicit endianness
> variants. Duplicate the MemoryRegionOps, replacing the single
> DEVICE_NATIVE_ENDIAN entry by a pair of LITTLE and BIG ones.
> Select the proper MemoryRegionOps in subpage_init().
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> system/physmem.c | 81 ++++++++++++++++++++++++++++++++++++++----------
> 1 file changed, 64 insertions(+), 17 deletions(-)
>
> diff --git a/system/physmem.c b/system/physmem.c
> index 1292f49095f..d8465f085bd 100644
> --- a/system/physmem.c
> +++ b/system/physmem.c
> @@ -2896,8 +2896,8 @@ static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
> static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len,
> bool is_write, MemTxAttrs attrs);
>
> -static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,
> - unsigned len, MemTxAttrs attrs)
> +static MemTxResult subpage_read_le(void *opaque, hwaddr addr, uint64_t *data,
> + unsigned len, MemTxAttrs attrs)
> {
> subpage_t *subpage = opaque;
> uint8_t buf[8];
> @@ -2911,12 +2911,32 @@ static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,
> if (res) {
> return res;
> }
> - *data = ldn_p(buf, len);
> + *data = ldn_le_p(buf, len);
> return MEMTX_OK;
> }
>
> -static MemTxResult subpage_write(void *opaque, hwaddr addr,
> - uint64_t value, unsigned len, MemTxAttrs attrs)
> +static MemTxResult subpage_read_be(void *opaque, hwaddr addr, uint64_t *data,
> + unsigned len, MemTxAttrs attrs)
> +{
> + subpage_t *subpage = opaque;
> + uint8_t buf[8];
> + MemTxResult res;
> +
> +#if defined(DEBUG_SUBPAGE)
> + printf("%s: subpage %p len %u addr " HWADDR_FMT_plx "\n", __func__,
> + subpage, len, addr);
> +#endif
It would be worth converting these to trace points before replicating.
Otherwise,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
> + res = flatview_read(subpage->fv, addr + subpage->base, attrs, buf, len);
> + if (res) {
> + return res;
> + }
> + *data = ldn_be_p(buf, len);
> + return MEMTX_OK;
> +}
> +
> +static MemTxResult subpage_write_le(void *opaque, hwaddr addr,
> + uint64_t value, unsigned len,
> + MemTxAttrs attrs)
> {
> subpage_t *subpage = opaque;
> uint8_t buf[8];
> @@ -2926,7 +2946,23 @@ static MemTxResult subpage_write(void *opaque, hwaddr addr,
> " value %"PRIx64"\n",
> __func__, subpage, len, addr, value);
> #endif
> - stn_p(buf, len, value);
> + stn_le_p(buf, len, value);
> + return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len);
> +}
> +
> +static MemTxResult subpage_write_be(void *opaque, hwaddr addr,
> + uint64_t value, unsigned len,
> + MemTxAttrs attrs)
> +{
> + subpage_t *subpage = opaque;
> + uint8_t buf[8];
> +
> +#if defined(DEBUG_SUBPAGE)
> + printf("%s: subpage %p len %u addr " HWADDR_FMT_plx
> + " value %"PRIx64"\n",
> + __func__, subpage, len, addr, value);
> +#endif
> + stn_be_p(buf, len, value);
> return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len);
> }
>
> @@ -2944,15 +2980,26 @@ static bool subpage_accepts(void *opaque, hwaddr addr,
> len, is_write, attrs);
> }
>
> -static const MemoryRegionOps subpage_ops = {
> - .read_with_attrs = subpage_read,
> - .write_with_attrs = subpage_write,
> - .impl.min_access_size = 1,
> - .impl.max_access_size = 8,
> - .valid.min_access_size = 1,
> - .valid.max_access_size = 8,
> - .valid.accepts = subpage_accepts,
> - .endianness = DEVICE_NATIVE_ENDIAN,
> +static const MemoryRegionOps subpage_ops[2] = {
> + [0 ... 1] = {
> + .impl = {
> + .min_access_size = 1,
> + .max_access_size = 8,
> + },
> + .valid = {
> + .min_access_size = 1,
> + .max_access_size = 8,
> + .accepts = subpage_accepts,
> + },
> + },
> +
> + [0].endianness = DEVICE_LITTLE_ENDIAN,
> + [0].read_with_attrs = subpage_read_le,
> + [0].write_with_attrs = subpage_write_le,
> +
> + [1].endianness = DEVICE_BIG_ENDIAN,
> + [1].read_with_attrs = subpage_read_be,
> + [1].write_with_attrs = subpage_write_be,
> };
>
> static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end,
> @@ -2983,8 +3030,8 @@ static subpage_t *subpage_init(FlatView *fv, hwaddr base)
> mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t));
> mmio->fv = fv;
> mmio->base = base;
> - memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,
> - NULL, TARGET_PAGE_SIZE);
> + memory_region_init_io(&mmio->iomem, NULL, &subpage_ops[target_big_endian()],
> + mmio, NULL, TARGET_PAGE_SIZE);
> mmio->iomem.subpage = true;
> #if defined(DEBUG_SUBPAGE)
> printf("%s: %p base " HWADDR_FMT_plx " len %08x\n", __func__,
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH 07/14] system/memory: Split MemoryRegionCache API to 'memory_cached.h'
2025-12-17 14:31 [PATCH 00/14] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2025-12-17 14:31 ` [PATCH 06/14] system/physmem: Use explicit endianness in subpage_ops::read/write() Philippe Mathieu-Daudé
@ 2025-12-17 14:31 ` Philippe Mathieu-Daudé
2025-12-17 18:43 ` Pierrick Bouvier
2025-12-17 19:44 ` Richard Henderson
2025-12-17 14:31 ` [PATCH 08/14] system/memory: Inline address_space_stq_internal() Philippe Mathieu-Daudé
` (6 subsequent siblings)
13 siblings, 2 replies; 37+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-17 14:31 UTC (permalink / raw)
To: qemu-devel
Cc: Philippe Mathieu-Daudé, Anton Johansson, qemu-arm,
Mark Cave-Ayland, Paolo Bonzini, Michael S. Tsirkin,
Artyom Tarasenko, Peter Maydell, David Hildenbrand, Peter Xu
We have 115 direct inclusions of "system/memory.h", and 91 headers
in include/ use it: hundreds of files have to process it.
However only one single header really uses the MemoryRegionCache
API: "hw/virtio/virtio-access.h". Split it out to a new header,
avoiding processing unused inlined functions hundreds of times.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
MAINTAINERS | 1 +
include/hw/virtio/virtio-access.h | 1 +
include/system/memory.h | 185 --------------------------
include/system/memory_cached.h | 207 ++++++++++++++++++++++++++++++
system/physmem.c | 1 +
5 files changed, 210 insertions(+), 185 deletions(-)
create mode 100644 include/system/memory_cached.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 63e9ba521bc..c299b84d418 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3255,6 +3255,7 @@ S: Supported
F: include/system/ioport.h
F: include/exec/memop.h
F: include/system/memory.h
+F: include/system/memory_cached.h
F: include/system/physmem.h
F: include/system/ram_addr.h
F: include/system/ramblock.h
diff --git a/include/hw/virtio/virtio-access.h b/include/hw/virtio/virtio-access.h
index 07aae69042a..3ea3acfe05a 100644
--- a/include/hw/virtio/virtio-access.h
+++ b/include/hw/virtio/virtio-access.h
@@ -17,6 +17,7 @@
#define QEMU_VIRTIO_ACCESS_H
#include "exec/hwaddr.h"
+#include "system/memory_cached.h"
#include "hw/virtio/virtio.h"
#include "hw/virtio/virtio-bus.h"
diff --git a/include/system/memory.h b/include/system/memory.h
index e69171de05a..90f375df5df 100644
--- a/include/system/memory.h
+++ b/include/system/memory.h
@@ -2855,140 +2855,6 @@ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr,
#define ARG1_DECL AddressSpace *as
#include "exec/memory_ldst_phys.h.inc"
-struct MemoryRegionCache {
- uint8_t *ptr;
- hwaddr xlat;
- hwaddr len;
- FlatView *fv;
- MemoryRegionSection mrs;
- bool is_write;
-};
-
-/* address_space_ld*_cached: load from a cached #MemoryRegion
- * address_space_st*_cached: store into a cached #MemoryRegion
- *
- * These functions perform a load or store of the byte, word,
- * longword or quad to the specified address. The address is
- * a physical address in the AddressSpace, but it must lie within
- * a #MemoryRegion that was mapped with address_space_cache_init.
- *
- * The _le suffixed functions treat the data as little endian;
- * _be indicates big endian; no suffix indicates "same endianness
- * as guest CPU".
- *
- * The "guest CPU endianness" accessors are deprecated for use outside
- * target-* code; devices should be CPU-agnostic and use either the LE
- * or the BE accessors.
- *
- * @cache: previously initialized #MemoryRegionCache to be accessed
- * @addr: address within the address space
- * @val: data value, for stores
- * @attrs: memory transaction attributes
- * @result: location to write the success/failure of the transaction;
- * if NULL, this information is discarded
- */
-
-#define SUFFIX _cached_slow
-#define ARG1 cache
-#define ARG1_DECL MemoryRegionCache *cache
-#include "exec/memory_ldst.h.inc"
-
-/* Inline fast path for direct RAM access. */
-static inline uint8_t address_space_ldub_cached(MemoryRegionCache *cache,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- assert(addr < cache->len);
- if (likely(cache->ptr)) {
- return ldub_p(cache->ptr + addr);
- } else {
- return address_space_ldub_cached_slow(cache, addr, attrs, result);
- }
-}
-
-static inline void address_space_stb_cached(MemoryRegionCache *cache,
- hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- assert(addr < cache->len);
- if (likely(cache->ptr)) {
- stb_p(cache->ptr + addr, val);
- } else {
- address_space_stb_cached_slow(cache, addr, val, attrs, result);
- }
-}
-
-#define ENDIANNESS
-#include "exec/memory_ldst_cached.h.inc"
-
-#define ENDIANNESS _le
-#include "exec/memory_ldst_cached.h.inc"
-
-#define ENDIANNESS _be
-#include "exec/memory_ldst_cached.h.inc"
-
-#define SUFFIX _cached
-#define ARG1 cache
-#define ARG1_DECL MemoryRegionCache *cache
-#include "exec/memory_ldst_phys.h.inc"
-
-/* address_space_cache_init: prepare for repeated access to a physical
- * memory region
- *
- * @cache: #MemoryRegionCache to be filled
- * @as: #AddressSpace to be accessed
- * @addr: address within that address space
- * @len: length of buffer
- * @is_write: indicates the transfer direction
- *
- * Will only work with RAM, and may map a subset of the requested range by
- * returning a value that is less than @len. On failure, return a negative
- * errno value.
- *
- * Because it only works with RAM, this function can be used for
- * read-modify-write operations. In this case, is_write should be %true.
- *
- * Note that addresses passed to the address_space_*_cached functions
- * are relative to @addr.
- */
-int64_t address_space_cache_init(MemoryRegionCache *cache,
- AddressSpace *as,
- hwaddr addr,
- hwaddr len,
- bool is_write);
-
-/**
- * address_space_cache_init_empty: Initialize empty #MemoryRegionCache
- *
- * @cache: The #MemoryRegionCache to operate on.
- *
- * Initializes #MemoryRegionCache structure without memory region attached.
- * Cache initialized this way can only be safely destroyed, but not used.
- */
-static inline void address_space_cache_init_empty(MemoryRegionCache *cache)
-{
- cache->mrs.mr = NULL;
- /* There is no real need to initialize fv, but it makes Coverity happy. */
- cache->fv = NULL;
-}
-
-/**
- * address_space_cache_invalidate: complete a write to a #MemoryRegionCache
- *
- * @cache: The #MemoryRegionCache to operate on.
- * @addr: The first physical address that was written, relative to the
- * address that was passed to @address_space_cache_init.
- * @access_len: The number of bytes that were written starting at @addr.
- */
-void address_space_cache_invalidate(MemoryRegionCache *cache,
- hwaddr addr,
- hwaddr access_len);
-
-/**
- * address_space_cache_destroy: free a #MemoryRegionCache
- *
- * @cache: The #MemoryRegionCache whose memory should be released.
- */
-void address_space_cache_destroy(MemoryRegionCache *cache);
-
void address_space_flush_icache_range(AddressSpace *as, hwaddr addr, hwaddr len);
/* address_space_get_iotlb_entry: translate an address into an IOTLB
@@ -3116,14 +2982,6 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr,
MemoryRegion *mr);
void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr);
-/* Internal functions, part of the implementation of address_space_read_cached
- * and address_space_write_cached. */
-MemTxResult address_space_read_cached_slow(MemoryRegionCache *cache,
- hwaddr addr, void *buf, hwaddr len);
-MemTxResult address_space_write_cached_slow(MemoryRegionCache *cache,
- hwaddr addr, const void *buf,
- hwaddr len);
-
int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr);
bool prepare_mmio_access(MemoryRegion *mr);
@@ -3201,49 +3059,6 @@ MemTxResult address_space_read(AddressSpace *as, hwaddr addr,
return result;
}
-/**
- * address_space_read_cached: read from a cached RAM region
- *
- * @cache: Cached region to be addressed
- * @addr: address relative to the base of the RAM region
- * @buf: buffer with the data transferred
- * @len: length of the data transferred
- */
-static inline MemTxResult
-address_space_read_cached(MemoryRegionCache *cache, hwaddr addr,
- void *buf, hwaddr len)
-{
- assert(addr < cache->len && len <= cache->len - addr);
- fuzz_dma_read_cb(cache->xlat + addr, len, cache->mrs.mr);
- if (likely(cache->ptr)) {
- memcpy(buf, cache->ptr + addr, len);
- return MEMTX_OK;
- } else {
- return address_space_read_cached_slow(cache, addr, buf, len);
- }
-}
-
-/**
- * address_space_write_cached: write to a cached RAM region
- *
- * @cache: Cached region to be addressed
- * @addr: address relative to the base of the RAM region
- * @buf: buffer with the data transferred
- * @len: length of the data transferred
- */
-static inline MemTxResult
-address_space_write_cached(MemoryRegionCache *cache, hwaddr addr,
- const void *buf, hwaddr len)
-{
- assert(addr < cache->len && len <= cache->len - addr);
- if (likely(cache->ptr)) {
- memcpy(cache->ptr + addr, buf, len);
- return MEMTX_OK;
- } else {
- return address_space_write_cached_slow(cache, addr, buf, len);
- }
-}
-
/**
* address_space_set: Fill address space with a constant byte.
*
diff --git a/include/system/memory_cached.h b/include/system/memory_cached.h
new file mode 100644
index 00000000000..1a07774b6ad
--- /dev/null
+++ b/include/system/memory_cached.h
@@ -0,0 +1,207 @@
+/*
+ * Physical memory management API
+ *
+ * Copyright 2011 Red Hat, Inc. and/or its affiliates
+ *
+ * Authors:
+ * Avi Kivity <avi@redhat.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef SYSTEM_MEMORY_CACHED_H
+#define SYSTEM_MEMORY_CACHED_H
+
+#include "exec/hwaddr.h"
+#include "system/memory.h"
+
+struct MemoryRegionCache {
+ uint8_t *ptr;
+ hwaddr xlat;
+ hwaddr len;
+ FlatView *fv;
+ MemoryRegionSection mrs;
+ bool is_write;
+};
+
+/**
+ * address_space_ld*_cached: load from a cached #MemoryRegion
+ * address_space_st*_cached: store into a cached #MemoryRegion
+ *
+ * These functions perform a load or store of the byte, word,
+ * longword or quad to the specified address. The address is
+ * a physical address in the AddressSpace, but it must lie within
+ * a #MemoryRegion that was mapped with address_space_cache_init.
+ *
+ * The _le suffixed functions treat the data as little endian;
+ * _be indicates big endian; no suffix indicates "same endianness
+ * as guest CPU".
+ *
+ * The "guest CPU endianness" accessors are deprecated for use outside
+ * target-* code; devices should be CPU-agnostic and use either the LE
+ * or the BE accessors.
+ *
+ * @cache: previously initialized #MemoryRegionCache to be accessed
+ * @addr: address within the address space
+ * @val: data value, for stores
+ * @attrs: memory transaction attributes
+ * @result: location to write the success/failure of the transaction;
+ * if NULL, this information is discarded
+ */
+
+#define SUFFIX _cached_slow
+#define ARG1 cache
+#define ARG1_DECL MemoryRegionCache *cache
+#include "exec/memory_ldst.h.inc"
+
+/* Inline fast path for direct RAM access. */
+static inline uint8_t address_space_ldub_cached(MemoryRegionCache *cache,
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
+{
+ assert(addr < cache->len);
+ if (likely(cache->ptr)) {
+ return ldub_p(cache->ptr + addr);
+ } else {
+ return address_space_ldub_cached_slow(cache, addr, attrs, result);
+ }
+}
+
+static inline void address_space_stb_cached(MemoryRegionCache *cache,
+ hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result)
+{
+ assert(addr < cache->len);
+ if (likely(cache->ptr)) {
+ stb_p(cache->ptr + addr, val);
+ } else {
+ address_space_stb_cached_slow(cache, addr, val, attrs, result);
+ }
+}
+
+#define ENDIANNESS
+#include "exec/memory_ldst_cached.h.inc"
+
+#define ENDIANNESS _le
+#include "exec/memory_ldst_cached.h.inc"
+
+#define ENDIANNESS _be
+#include "exec/memory_ldst_cached.h.inc"
+
+#define SUFFIX _cached
+#define ARG1 cache
+#define ARG1_DECL MemoryRegionCache *cache
+#include "exec/memory_ldst_phys.h.inc"
+
+/**
+ * address_space_cache_init: prepare for repeated access to a physical
+ * memory region
+ *
+ * @cache: #MemoryRegionCache to be filled
+ * @as: #AddressSpace to be accessed
+ * @addr: address within that address space
+ * @len: length of buffer
+ * @is_write: indicates the transfer direction
+ *
+ * Will only work with RAM, and may map a subset of the requested range by
+ * returning a value that is less than @len. On failure, return a negative
+ * errno value.
+ *
+ * Because it only works with RAM, this function can be used for
+ * read-modify-write operations. In this case, is_write should be %true.
+ *
+ * Note that addresses passed to the address_space_*_cached functions
+ * are relative to @addr.
+ */
+int64_t address_space_cache_init(MemoryRegionCache *cache,
+ AddressSpace *as,
+ hwaddr addr,
+ hwaddr len,
+ bool is_write);
+
+/**
+ * address_space_cache_init_empty: Initialize empty #MemoryRegionCache
+ *
+ * @cache: The #MemoryRegionCache to operate on.
+ *
+ * Initializes #MemoryRegionCache structure without memory region attached.
+ * Cache initialized this way can only be safely destroyed, but not used.
+ */
+static inline void address_space_cache_init_empty(MemoryRegionCache *cache)
+{
+ cache->mrs.mr = NULL;
+ /* There is no real need to initialize fv, but it makes Coverity happy. */
+ cache->fv = NULL;
+}
+
+/**
+ * address_space_cache_invalidate: complete a write to a #MemoryRegionCache
+ *
+ * @cache: The #MemoryRegionCache to operate on.
+ * @addr: The first physical address that was written, relative to the
+ * address that was passed to @address_space_cache_init.
+ * @access_len: The number of bytes that were written starting at @addr.
+ */
+void address_space_cache_invalidate(MemoryRegionCache *cache,
+ hwaddr addr,
+ hwaddr access_len);
+
+/**
+ * address_space_cache_destroy: free a #MemoryRegionCache
+ *
+ * @cache: The #MemoryRegionCache whose memory should be released.
+ */
+void address_space_cache_destroy(MemoryRegionCache *cache);
+
+/*
+ * Internal functions, part of the implementation of address_space_read_cached
+ * and address_space_write_cached.
+ */
+MemTxResult address_space_read_cached_slow(MemoryRegionCache *cache,
+ hwaddr addr, void *buf, hwaddr len);
+MemTxResult address_space_write_cached_slow(MemoryRegionCache *cache,
+ hwaddr addr, const void *buf,
+ hwaddr len);
+
+/**
+ * address_space_read_cached: read from a cached RAM region
+ *
+ * @cache: Cached region to be addressed
+ * @addr: address relative to the base of the RAM region
+ * @buf: buffer with the data transferred
+ * @len: length of the data transferred
+ */
+static inline MemTxResult
+address_space_read_cached(MemoryRegionCache *cache, hwaddr addr,
+ void *buf, hwaddr len)
+{
+ assert(addr < cache->len && len <= cache->len - addr);
+ fuzz_dma_read_cb(cache->xlat + addr, len, cache->mrs.mr);
+ if (likely(cache->ptr)) {
+ memcpy(buf, cache->ptr + addr, len);
+ return MEMTX_OK;
+ } else {
+ return address_space_read_cached_slow(cache, addr, buf, len);
+ }
+}
+
+/**
+ * address_space_write_cached: write to a cached RAM region
+ *
+ * @cache: Cached region to be addressed
+ * @addr: address relative to the base of the RAM region
+ * @buf: buffer with the data transferred
+ * @len: length of the data transferred
+ */
+static inline MemTxResult
+address_space_write_cached(MemoryRegionCache *cache, hwaddr addr,
+ const void *buf, hwaddr len)
+{
+ assert(addr < cache->len && len <= cache->len - addr);
+ if (likely(cache->ptr)) {
+ memcpy(cache->ptr + addr, buf, len);
+ return MEMTX_OK;
+ } else {
+ return address_space_write_cached_slow(cache, addr, buf, len);
+ }
+}
+
+#endif
diff --git a/system/physmem.c b/system/physmem.c
index d8465f085bd..853a8c00aa2 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -53,6 +53,7 @@
#include "qemu/memalign.h"
#include "qemu/memfd.h"
#include "system/memory.h"
+#include "system/memory_cached.h"
#include "system/ioport.h"
#include "system/dma.h"
#include "system/hostmem.h"
--
2.52.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* Re: [PATCH 07/14] system/memory: Split MemoryRegionCache API to 'memory_cached.h'
2025-12-17 14:31 ` [PATCH 07/14] system/memory: Split MemoryRegionCache API to 'memory_cached.h' Philippe Mathieu-Daudé
@ 2025-12-17 18:43 ` Pierrick Bouvier
2025-12-17 19:44 ` Richard Henderson
1 sibling, 0 replies; 37+ messages in thread
From: Pierrick Bouvier @ 2025-12-17 18:43 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, qemu-arm, Mark Cave-Ayland, Paolo Bonzini,
Michael S. Tsirkin, Artyom Tarasenko, Peter Maydell,
David Hildenbrand, Peter Xu
On 12/17/25 6:31 AM, Philippe Mathieu-Daudé wrote:
> We have 115 direct inclusions of "system/memory.h", and 91 headers
> in include/ use it: hundreds of files have to process it.
> However only one single header really uses the MemoryRegionCache
> API: "hw/virtio/virtio-access.h". Split it out to a new header,
> avoiding processing unused inlined functions hundreds of times.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> MAINTAINERS | 1 +
> include/hw/virtio/virtio-access.h | 1 +
> include/system/memory.h | 185 --------------------------
> include/system/memory_cached.h | 207 ++++++++++++++++++++++++++++++
> system/physmem.c | 1 +
> 5 files changed, 210 insertions(+), 185 deletions(-)
> create mode 100644 include/system/memory_cached.h
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 07/14] system/memory: Split MemoryRegionCache API to 'memory_cached.h'
2025-12-17 14:31 ` [PATCH 07/14] system/memory: Split MemoryRegionCache API to 'memory_cached.h' Philippe Mathieu-Daudé
2025-12-17 18:43 ` Pierrick Bouvier
@ 2025-12-17 19:44 ` Richard Henderson
1 sibling, 0 replies; 37+ messages in thread
From: Richard Henderson @ 2025-12-17 19:44 UTC (permalink / raw)
To: qemu-devel
On 12/18/25 01:31, Philippe Mathieu-Daudé wrote:
> We have 115 direct inclusions of "system/memory.h", and 91 headers
> in include/ use it: hundreds of files have to process it.
> However only one single header really uses the MemoryRegionCache
> API: "hw/virtio/virtio-access.h". Split it out to a new header,
> avoiding processing unused inlined functions hundreds of times.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> MAINTAINERS | 1 +
> include/hw/virtio/virtio-access.h | 1 +
> include/system/memory.h | 185 --------------------------
> include/system/memory_cached.h | 207 ++++++++++++++++++++++++++++++
> system/physmem.c | 1 +
> 5 files changed, 210 insertions(+), 185 deletions(-)
> create mode 100644 include/system/memory_cached.h
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH 08/14] system/memory: Inline address_space_stq_internal()
2025-12-17 14:31 [PATCH 00/14] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (6 preceding siblings ...)
2025-12-17 14:31 ` [PATCH 07/14] system/memory: Split MemoryRegionCache API to 'memory_cached.h' Philippe Mathieu-Daudé
@ 2025-12-17 14:31 ` Philippe Mathieu-Daudé
2025-12-17 18:46 ` Pierrick Bouvier
2025-12-17 20:08 ` Richard Henderson
2025-12-17 14:31 ` [PATCH 09/14] system/memory: Define address_space_ldst[W] endian variants via template Philippe Mathieu-Daudé
` (5 subsequent siblings)
13 siblings, 2 replies; 37+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-17 14:31 UTC (permalink / raw)
To: qemu-devel
Cc: Philippe Mathieu-Daudé, Anton Johansson, qemu-arm,
Mark Cave-Ayland, Paolo Bonzini, Michael S. Tsirkin,
Artyom Tarasenko, Peter Maydell, David Hildenbrand, Peter Xu
As its name suggests, address_space_stq_internal() is an
internal method which can be inlined like all the other
ones in this file.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
system/memory_ldst.c.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
index b45bfecd137..d5776678edf 100644
--- a/system/memory_ldst.c.inc
+++ b/system/memory_ldst.c.inc
@@ -422,7 +422,7 @@ void glue(address_space_stw_be, SUFFIX)(ARG1_DECL,
DEVICE_BIG_ENDIAN);
}
-static void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
+static inline void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, uint64_t val, MemTxAttrs attrs,
MemTxResult *result, enum device_endian endian)
{
--
2.52.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* Re: [PATCH 08/14] system/memory: Inline address_space_stq_internal()
2025-12-17 14:31 ` [PATCH 08/14] system/memory: Inline address_space_stq_internal() Philippe Mathieu-Daudé
@ 2025-12-17 18:46 ` Pierrick Bouvier
2025-12-17 20:08 ` Richard Henderson
1 sibling, 0 replies; 37+ messages in thread
From: Pierrick Bouvier @ 2025-12-17 18:46 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, qemu-arm, Mark Cave-Ayland, Paolo Bonzini,
Michael S. Tsirkin, Artyom Tarasenko, Peter Maydell,
David Hildenbrand, Peter Xu
On 12/17/25 6:31 AM, Philippe Mathieu-Daudé wrote:
> As its name suggests, address_space_stq_internal() is an
> internal method which can be inlined like all the other
> ones in this file.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> system/memory_ldst.c.inc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 08/14] system/memory: Inline address_space_stq_internal()
2025-12-17 14:31 ` [PATCH 08/14] system/memory: Inline address_space_stq_internal() Philippe Mathieu-Daudé
2025-12-17 18:46 ` Pierrick Bouvier
@ 2025-12-17 20:08 ` Richard Henderson
1 sibling, 0 replies; 37+ messages in thread
From: Richard Henderson @ 2025-12-17 20:08 UTC (permalink / raw)
To: qemu-devel
On 12/18/25 01:31, Philippe Mathieu-Daudé wrote:
> As its name suggests, address_space_stq_internal() is an
> internal method which can be inlined like all the other
> ones in this file.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> system/memory_ldst.c.inc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH 09/14] system/memory: Define address_space_ldst[W] endian variants via template
2025-12-17 14:31 [PATCH 00/14] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (7 preceding siblings ...)
2025-12-17 14:31 ` [PATCH 08/14] system/memory: Inline address_space_stq_internal() Philippe Mathieu-Daudé
@ 2025-12-17 14:31 ` Philippe Mathieu-Daudé
2025-12-17 20:20 ` Richard Henderson
2025-12-17 14:31 ` [PATCH 10/14] system/memory: Define address_space_ldst[L] " Philippe Mathieu-Daudé
` (4 subsequent siblings)
13 siblings, 1 reply; 37+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-17 14:31 UTC (permalink / raw)
To: qemu-devel
Cc: Philippe Mathieu-Daudé, Anton Johansson, qemu-arm,
Mark Cave-Ayland, Paolo Bonzini, Michael S. Tsirkin,
Artyom Tarasenko, Peter Maydell, David Hildenbrand, Peter Xu
Like we do for other LD/ST APIs, use one template to declare and
define all endianness variants of the address_space_lduw() methods.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
MAINTAINERS | 2 +
include/exec/memory_ldst.h.inc | 21 ++++----
include/exec/memory_ldst_phys.h.inc | 45 ++++------------
include/system/memory_ldst_endian.h.inc | 25 +++++++++
include/system/memory_ldst_phys_endian.h.inc | 37 ++++++++++++++
system/memory_ldst.c.inc | 54 +++++---------------
system/memory_ldst_endian.c.inc | 42 +++++++++++++++
7 files changed, 136 insertions(+), 90 deletions(-)
create mode 100644 include/system/memory_ldst_endian.h.inc
create mode 100644 include/system/memory_ldst_phys_endian.h.inc
create mode 100644 system/memory_ldst_endian.c.inc
diff --git a/MAINTAINERS b/MAINTAINERS
index c299b84d418..41a45904cd5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3256,6 +3256,7 @@ F: include/system/ioport.h
F: include/exec/memop.h
F: include/system/memory.h
F: include/system/memory_cached.h
+F: include/system/memory_ldst*
F: include/system/physmem.h
F: include/system/ram_addr.h
F: include/system/ramblock.h
@@ -3265,6 +3266,7 @@ F: system/ioport.c
F: system/memory.c
F: system/memory_mapping.c
F: system/physmem.c
+F: system/memory_ldst*
F: system/memory-internal.h
F: system/ram-block-attributes.c
F: scripts/coccinelle/memory-region-housekeeping.cocci
diff --git a/include/exec/memory_ldst.h.inc b/include/exec/memory_ldst.h.inc
index 173164fee3a..73c0366a247 100644
--- a/include/exec/memory_ldst.h.inc
+++ b/include/exec/memory_ldst.h.inc
@@ -19,24 +19,16 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-uint16_t glue(address_space_lduw, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
uint32_t glue(address_space_ldl, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
uint64_t glue(address_space_ldq, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stw, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stl, SUFFIX)(ARG1_DECL,
hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stq, SUFFIX)(ARG1_DECL,
hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-uint16_t glue(address_space_lduw_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-uint16_t glue(address_space_lduw_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
uint32_t glue(address_space_ldl_le, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
uint32_t glue(address_space_ldl_be, SUFFIX)(ARG1_DECL,
@@ -47,10 +39,6 @@ uint64_t glue(address_space_ldq_be, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stb, SUFFIX)(ARG1_DECL,
hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stw_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stw_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stl_le, SUFFIX)(ARG1_DECL,
hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stl_be, SUFFIX)(ARG1_DECL,
@@ -60,6 +48,15 @@ void glue(address_space_stq_le, SUFFIX)(ARG1_DECL,
void glue(address_space_stq_be, SUFFIX)(ARG1_DECL,
hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
+#define ENDIANNESS
+#include "system/memory_ldst_endian.h.inc"
+
+#define ENDIANNESS _le
+#include "system/memory_ldst_endian.h.inc"
+
+#define ENDIANNESS _be
+#include "system/memory_ldst_endian.h.inc"
+
#undef ARG1_DECL
#undef ARG1
#undef SUFFIX
diff --git a/include/exec/memory_ldst_phys.h.inc b/include/exec/memory_ldst_phys.h.inc
index db67de75251..71c2e64ff0f 100644
--- a/include/exec/memory_ldst_phys.h.inc
+++ b/include/exec/memory_ldst_phys.h.inc
@@ -19,12 +19,6 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-static inline uint16_t glue(lduw_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_lduw, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline uint32_t glue(ldl_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
{
return glue(address_space_ldl, SUFFIX)(ARG1, addr,
@@ -37,12 +31,6 @@ static inline uint64_t glue(ldq_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline void glue(stw_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint16_t val)
-{
- glue(address_space_stw, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline void glue(stl_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
{
glue(address_space_stl, SUFFIX)(ARG1, addr, val,
@@ -61,18 +49,6 @@ static inline uint8_t glue(ldub_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline uint16_t glue(lduw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_lduw_le, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
-static inline uint16_t glue(lduw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_lduw_be, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline uint32_t glue(ldl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
{
return glue(address_space_ldl_le, SUFFIX)(ARG1, addr,
@@ -103,18 +79,6 @@ static inline void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val)
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline void glue(stw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint16_t val)
-{
- glue(address_space_stw_le, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
-static inline void glue(stw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint16_t val)
-{
- glue(address_space_stw_be, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline void glue(stl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
{
glue(address_space_stl_le, SUFFIX)(ARG1, addr, val,
@@ -139,6 +103,15 @@ static inline void glue(stq_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t va
MEMTXATTRS_UNSPECIFIED, NULL);
}
+#define ENDIANNESS
+#include "system/memory_ldst_phys_endian.h.inc"
+
+#define ENDIANNESS _le
+#include "system/memory_ldst_phys_endian.h.inc"
+
+#define ENDIANNESS _be
+#include "system/memory_ldst_phys_endian.h.inc"
+
#undef ARG1_DECL
#undef ARG1
#undef SUFFIX
diff --git a/include/system/memory_ldst_endian.h.inc b/include/system/memory_ldst_endian.h.inc
new file mode 100644
index 00000000000..4efd7f19f7e
--- /dev/null
+++ b/include/system/memory_ldst_endian.h.inc
@@ -0,0 +1,25 @@
+/*
+ * Physical memory access endian templates
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ * Copyright (c) 2015 Linaro, Inc.
+ * Copyright (c) 2016 Red Hat, Inc.
+ * Copyright (c) 2025 Linaro Ltd.
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#define ADDRESS_SPACE_LD(size) \
+ glue(glue(address_space_ld, size), glue(ENDIANNESS, SUFFIX))
+#define ADDRESS_SPACE_ST(size) \
+ glue(glue(address_space_st, size), glue(ENDIANNESS, SUFFIX))
+
+uint16_t ADDRESS_SPACE_LD(uw)(ARG1_DECL, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result);
+void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
+ MemTxAttrs attrs, MemTxResult *result);
+
+#undef ADDRESS_SPACE_LD
+#undef ADDRESS_SPACE_ST
+
+#undef ENDIANNESS
diff --git a/include/system/memory_ldst_phys_endian.h.inc b/include/system/memory_ldst_phys_endian.h.inc
new file mode 100644
index 00000000000..6c00edc2148
--- /dev/null
+++ b/include/system/memory_ldst_phys_endian.h.inc
@@ -0,0 +1,37 @@
+/*
+ * Physical memory access endian templates
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ * Copyright (c) 2015 Linaro, Inc.
+ * Copyright (c) 2016 Red Hat, Inc.
+ * Copyright (c) 2025 Linaro Ltd.
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#define LD_PHYS(size) \
+ glue(glue(ld, size), glue(ENDIANNESS, glue(_phys, SUFFIX)))
+#define ADDRESS_SPACE_LD(size) \
+ glue(glue(address_space_ld, size), glue(ENDIANNESS, SUFFIX))
+
+#define ST_PHYS(size) \
+ glue(glue(st, size), glue(ENDIANNESS, glue(_phys, SUFFIX)))
+#define ADDRESS_SPACE_ST(size) \
+ glue(glue(address_space_st, size), glue(ENDIANNESS, SUFFIX))
+
+static inline uint16_t LD_PHYS(uw)(ARG1_DECL, hwaddr addr)
+{
+ return ADDRESS_SPACE_LD(uw)(ARG1, addr, MEMTXATTRS_UNSPECIFIED, NULL);
+}
+
+static inline void ST_PHYS(w)(ARG1_DECL, hwaddr addr, uint16_t val)
+{
+ ADDRESS_SPACE_ST(w)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
+}
+
+#undef LD_PHYS
+#undef ST_PHYS
+#undef ADDRESS_SPACE_LD
+#undef ADDRESS_SPACE_ST
+
+#undef ENDIANNESS
diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
index d5776678edf..c37a07b4f4a 100644
--- a/system/memory_ldst.c.inc
+++ b/system/memory_ldst.c.inc
@@ -240,27 +240,6 @@ static inline uint16_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL,
return val;
}
-uint16_t glue(address_space_lduw, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_lduw_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_NATIVE_ENDIAN);
-}
-
-uint16_t glue(address_space_lduw_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_lduw_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_LITTLE_ENDIAN);
-}
-
-uint16_t glue(address_space_lduw_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_lduw_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_BIG_ENDIAN);
-}
-
/* warning: addr must be aligned */
static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, uint32_t val, MemTxAttrs attrs,
@@ -401,27 +380,6 @@ static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL,
RCU_READ_UNLOCK();
}
-void glue(address_space_stw, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stw_internal, SUFFIX)(ARG1, addr, val, attrs, result,
- DEVICE_NATIVE_ENDIAN);
-}
-
-void glue(address_space_stw_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stw_internal, SUFFIX)(ARG1, addr, val, attrs, result,
- DEVICE_LITTLE_ENDIAN);
-}
-
-void glue(address_space_stw_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stw_internal, SUFFIX)(ARG1, addr, val, attrs, result,
- DEVICE_BIG_ENDIAN);
-}
-
static inline void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, uint64_t val, MemTxAttrs attrs,
MemTxResult *result, enum device_endian endian)
@@ -486,6 +444,18 @@ void glue(address_space_stq_be, SUFFIX)(ARG1_DECL,
DEVICE_BIG_ENDIAN);
}
+#define ENDIANNESS
+#define DEVICE_ENDIANNESS DEVICE_NATIVE_ENDIAN
+#include "memory_ldst_endian.c.inc"
+
+#define ENDIANNESS _le
+#define DEVICE_ENDIANNESS DEVICE_LITTLE_ENDIAN
+#include "memory_ldst_endian.c.inc"
+
+#define ENDIANNESS _be
+#define DEVICE_ENDIANNESS DEVICE_BIG_ENDIAN
+#include "memory_ldst_endian.c.inc"
+
#undef ARG1_DECL
#undef ARG1
#undef SUFFIX
diff --git a/system/memory_ldst_endian.c.inc b/system/memory_ldst_endian.c.inc
new file mode 100644
index 00000000000..8aa6ebeebb2
--- /dev/null
+++ b/system/memory_ldst_endian.c.inc
@@ -0,0 +1,42 @@
+/*
+ * Physical memory access endian templates
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ * Copyright (c) 2015 Linaro, Inc.
+ * Copyright (c) 2016 Red Hat, Inc.
+ * Copyright (c) 2025 Linaro Ltd.
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#define ADDRESS_SPACE_LD(size) \
+ glue(glue(address_space_ld, size), glue(ENDIANNESS, SUFFIX))
+#define ADDRESS_SPACE_LD_INTERNAL(size) \
+ glue(glue(address_space_ld, size), glue(_internal, SUFFIX))
+
+#define ADDRESS_SPACE_ST(size) \
+ glue(glue(address_space_st, size), glue(ENDIANNESS, SUFFIX))
+#define ADDRESS_SPACE_ST_INTERNAL(size) \
+ glue(glue(address_space_st, size), glue(_internal, SUFFIX))
+
+uint16_t ADDRESS_SPACE_LD(uw)(ARG1_DECL, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result)
+{
+ return ADDRESS_SPACE_LD_INTERNAL(uw)(ARG1, addr, attrs, result,
+ DEVICE_ENDIANNESS);
+}
+
+void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
+ MemTxAttrs attrs, MemTxResult *result)
+{
+ ADDRESS_SPACE_ST_INTERNAL(w)(ARG1, addr, val, attrs, result,
+ DEVICE_ENDIANNESS);
+}
+
+#undef ADDRESS_SPACE_LD
+#undef ADDRESS_SPACE_LD_INTERNAL
+#undef ADDRESS_SPACE_ST
+#undef ADDRESS_SPACE_ST_INTERNAL
+
+#undef ENDIANNESS
+#undef DEVICE_ENDIANNESS
--
2.52.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* Re: [PATCH 09/14] system/memory: Define address_space_ldst[W] endian variants via template
2025-12-17 14:31 ` [PATCH 09/14] system/memory: Define address_space_ldst[W] endian variants via template Philippe Mathieu-Daudé
@ 2025-12-17 20:20 ` Richard Henderson
0 siblings, 0 replies; 37+ messages in thread
From: Richard Henderson @ 2025-12-17 20:20 UTC (permalink / raw)
To: qemu-devel
On 12/18/25 01:31, Philippe Mathieu-Daudé wrote:
> Like we do for other LD/ST APIs, use one template to declare and
> define all endianness variants of the address_space_lduw() methods.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> MAINTAINERS | 2 +
> include/exec/memory_ldst.h.inc | 21 ++++----
> include/exec/memory_ldst_phys.h.inc | 45 ++++------------
> include/system/memory_ldst_endian.h.inc | 25 +++++++++
> include/system/memory_ldst_phys_endian.h.inc | 37 ++++++++++++++
> system/memory_ldst.c.inc | 54 +++++---------------
> system/memory_ldst_endian.c.inc | 42 +++++++++++++++
> 7 files changed, 136 insertions(+), 90 deletions(-)
> create mode 100644 include/system/memory_ldst_endian.h.inc
> create mode 100644 include/system/memory_ldst_phys_endian.h.inc
> create mode 100644 system/memory_ldst_endian.c.inc
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH 10/14] system/memory: Define address_space_ldst[L] endian variants via template
2025-12-17 14:31 [PATCH 00/14] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (8 preceding siblings ...)
2025-12-17 14:31 ` [PATCH 09/14] system/memory: Define address_space_ldst[W] endian variants via template Philippe Mathieu-Daudé
@ 2025-12-17 14:31 ` Philippe Mathieu-Daudé
2025-12-17 20:22 ` Richard Henderson
2025-12-17 14:31 ` [PATCH 11/14] system/memory: Define address_space_ldst[Q] " Philippe Mathieu-Daudé
` (3 subsequent siblings)
13 siblings, 1 reply; 37+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-17 14:31 UTC (permalink / raw)
To: qemu-devel
Cc: Philippe Mathieu-Daudé, Anton Johansson, qemu-arm,
Mark Cave-Ayland, Paolo Bonzini, Michael S. Tsirkin,
Artyom Tarasenko, Peter Maydell, David Hildenbrand, Peter Xu
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/exec/memory_ldst.h.inc | 12 ------
include/exec/memory_ldst_phys.h.inc | 36 -----------------
include/system/memory_ldst_endian.h.inc | 4 ++
include/system/memory_ldst_phys_endian.h.inc | 10 +++++
system/memory_ldst.c.inc | 42 --------------------
system/memory_ldst_endian.c.inc | 14 +++++++
6 files changed, 28 insertions(+), 90 deletions(-)
diff --git a/include/exec/memory_ldst.h.inc b/include/exec/memory_ldst.h.inc
index 73c0366a247..7ccca46f2a9 100644
--- a/include/exec/memory_ldst.h.inc
+++ b/include/exec/memory_ldst.h.inc
@@ -19,30 +19,18 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-uint32_t glue(address_space_ldl, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
uint64_t glue(address_space_ldq, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stl, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stq, SUFFIX)(ARG1_DECL,
hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-uint32_t glue(address_space_ldl_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-uint32_t glue(address_space_ldl_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
uint64_t glue(address_space_ldq_le, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
uint64_t glue(address_space_ldq_be, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stb, SUFFIX)(ARG1_DECL,
hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stl_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stl_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stq_le, SUFFIX)(ARG1_DECL,
hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
void glue(address_space_stq_be, SUFFIX)(ARG1_DECL,
diff --git a/include/exec/memory_ldst_phys.h.inc b/include/exec/memory_ldst_phys.h.inc
index 71c2e64ff0f..c3c73419e61 100644
--- a/include/exec/memory_ldst_phys.h.inc
+++ b/include/exec/memory_ldst_phys.h.inc
@@ -19,24 +19,12 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-static inline uint32_t glue(ldl_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_ldl, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline uint64_t glue(ldq_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
{
return glue(address_space_ldq, SUFFIX)(ARG1, addr,
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline void glue(stl_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
-{
- glue(address_space_stl, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline void glue(stq_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val)
{
glue(address_space_stq, SUFFIX)(ARG1, addr, val,
@@ -49,18 +37,6 @@ static inline uint8_t glue(ldub_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline uint32_t glue(ldl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_ldl_le, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
-static inline uint32_t glue(ldl_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_ldl_be, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline uint64_t glue(ldq_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
{
return glue(address_space_ldq_le, SUFFIX)(ARG1, addr,
@@ -79,18 +55,6 @@ static inline void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val)
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline void glue(stl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
-{
- glue(address_space_stl_le, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
-static inline void glue(stl_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val)
-{
- glue(address_space_stl_be, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline void glue(stq_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val)
{
glue(address_space_stq_le, SUFFIX)(ARG1, addr, val,
diff --git a/include/system/memory_ldst_endian.h.inc b/include/system/memory_ldst_endian.h.inc
index 4efd7f19f7e..a3f543a715c 100644
--- a/include/system/memory_ldst_endian.h.inc
+++ b/include/system/memory_ldst_endian.h.inc
@@ -16,8 +16,12 @@
uint16_t ADDRESS_SPACE_LD(uw)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
+uint32_t ADDRESS_SPACE_LD(l)(ARG1_DECL, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result);
void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
MemTxAttrs attrs, MemTxResult *result);
+void ADDRESS_SPACE_ST(l)(ARG1_DECL, hwaddr addr, uint32_t val,
+ MemTxAttrs attrs, MemTxResult *result);
#undef ADDRESS_SPACE_LD
#undef ADDRESS_SPACE_ST
diff --git a/include/system/memory_ldst_phys_endian.h.inc b/include/system/memory_ldst_phys_endian.h.inc
index 6c00edc2148..0ec550979fa 100644
--- a/include/system/memory_ldst_phys_endian.h.inc
+++ b/include/system/memory_ldst_phys_endian.h.inc
@@ -24,11 +24,21 @@ static inline uint16_t LD_PHYS(uw)(ARG1_DECL, hwaddr addr)
return ADDRESS_SPACE_LD(uw)(ARG1, addr, MEMTXATTRS_UNSPECIFIED, NULL);
}
+static inline uint32_t LD_PHYS(l)(ARG1_DECL, hwaddr addr)
+{
+ return ADDRESS_SPACE_LD(l)(ARG1, addr, MEMTXATTRS_UNSPECIFIED, NULL);
+}
+
static inline void ST_PHYS(w)(ARG1_DECL, hwaddr addr, uint16_t val)
{
ADDRESS_SPACE_ST(w)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
}
+static inline void ST_PHYS(l)(ARG1_DECL, hwaddr addr, uint32_t val)
+{
+ ADDRESS_SPACE_ST(l)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
+}
+
#undef LD_PHYS
#undef ST_PHYS
#undef ADDRESS_SPACE_LD
diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
index c37a07b4f4a..ab2df6e429b 100644
--- a/system/memory_ldst.c.inc
+++ b/system/memory_ldst.c.inc
@@ -67,27 +67,6 @@ static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
return val;
}
-uint32_t glue(address_space_ldl, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldl_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_NATIVE_ENDIAN);
-}
-
-uint32_t glue(address_space_ldl_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldl_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_LITTLE_ENDIAN);
-}
-
-uint32_t glue(address_space_ldl_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldl_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_BIG_ENDIAN);
-}
-
/* warning: addr must be aligned */
static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
@@ -284,27 +263,6 @@ static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
RCU_READ_UNLOCK();
}
-void glue(address_space_stl, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stl_internal, SUFFIX)(ARG1, addr, val, attrs,
- result, DEVICE_NATIVE_ENDIAN);
-}
-
-void glue(address_space_stl_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stl_internal, SUFFIX)(ARG1, addr, val, attrs,
- result, DEVICE_LITTLE_ENDIAN);
-}
-
-void glue(address_space_stl_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stl_internal, SUFFIX)(ARG1, addr, val, attrs,
- result, DEVICE_BIG_ENDIAN);
-}
-
void glue(address_space_stb, SUFFIX)(ARG1_DECL,
hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result)
{
diff --git a/system/memory_ldst_endian.c.inc b/system/memory_ldst_endian.c.inc
index 8aa6ebeebb2..5bb59ff3d8e 100644
--- a/system/memory_ldst_endian.c.inc
+++ b/system/memory_ldst_endian.c.inc
@@ -26,6 +26,13 @@ uint16_t ADDRESS_SPACE_LD(uw)(ARG1_DECL, hwaddr addr,
DEVICE_ENDIANNESS);
}
+uint32_t ADDRESS_SPACE_LD(l)(ARG1_DECL, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result)
+{
+ return ADDRESS_SPACE_LD_INTERNAL(l)(ARG1, addr, attrs, result,
+ DEVICE_ENDIANNESS);
+}
+
void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
MemTxAttrs attrs, MemTxResult *result)
{
@@ -33,6 +40,13 @@ void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
DEVICE_ENDIANNESS);
}
+void ADDRESS_SPACE_ST(l)(ARG1_DECL, hwaddr addr, uint32_t val,
+ MemTxAttrs attrs, MemTxResult *result)
+{
+ ADDRESS_SPACE_ST_INTERNAL(l)(ARG1, addr, val, attrs, result,
+ DEVICE_ENDIANNESS);
+}
+
#undef ADDRESS_SPACE_LD
#undef ADDRESS_SPACE_LD_INTERNAL
#undef ADDRESS_SPACE_ST
--
2.52.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* Re: [PATCH 10/14] system/memory: Define address_space_ldst[L] endian variants via template
2025-12-17 14:31 ` [PATCH 10/14] system/memory: Define address_space_ldst[L] " Philippe Mathieu-Daudé
@ 2025-12-17 20:22 ` Richard Henderson
0 siblings, 0 replies; 37+ messages in thread
From: Richard Henderson @ 2025-12-17 20:22 UTC (permalink / raw)
To: qemu-devel
On 12/18/25 01:31, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> include/exec/memory_ldst.h.inc | 12 ------
> include/exec/memory_ldst_phys.h.inc | 36 -----------------
> include/system/memory_ldst_endian.h.inc | 4 ++
> include/system/memory_ldst_phys_endian.h.inc | 10 +++++
> system/memory_ldst.c.inc | 42 --------------------
> system/memory_ldst_endian.c.inc | 14 +++++++
> 6 files changed, 28 insertions(+), 90 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH 11/14] system/memory: Define address_space_ldst[Q] endian variants via template
2025-12-17 14:31 [PATCH 00/14] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (9 preceding siblings ...)
2025-12-17 14:31 ` [PATCH 10/14] system/memory: Define address_space_ldst[L] " Philippe Mathieu-Daudé
@ 2025-12-17 14:31 ` Philippe Mathieu-Daudé
2025-12-17 20:22 ` Richard Henderson
2025-12-17 14:31 ` [PATCH 12/14] system/memory: Factor address_space_ldst[M]_internal() helper out Philippe Mathieu-Daudé
` (2 subsequent siblings)
13 siblings, 1 reply; 37+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-17 14:31 UTC (permalink / raw)
To: qemu-devel
Cc: Philippe Mathieu-Daudé, Anton Johansson, qemu-arm,
Mark Cave-Ayland, Paolo Bonzini, Michael S. Tsirkin,
Artyom Tarasenko, Peter Maydell, David Hildenbrand, Peter Xu
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/exec/memory_ldst.h.inc | 17 ++------
include/exec/memory_ldst_phys.h.inc | 36 -----------------
include/system/memory_ldst_endian.h.inc | 4 ++
include/system/memory_ldst_phys_endian.h.inc | 10 +++++
system/memory_ldst.c.inc | 42 --------------------
system/memory_ldst_endian.c.inc | 14 +++++++
6 files changed, 31 insertions(+), 92 deletions(-)
diff --git a/include/exec/memory_ldst.h.inc b/include/exec/memory_ldst.h.inc
index 7ccca46f2a9..dd1fb482eac 100644
--- a/include/exec/memory_ldst.h.inc
+++ b/include/exec/memory_ldst.h.inc
@@ -19,22 +19,11 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-uint64_t glue(address_space_ldq, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stq, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-uint64_t glue(address_space_ldq_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
-uint64_t glue(address_space_ldq_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
+
void glue(address_space_stb, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stq_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
-void glue(address_space_stq_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result);
+ hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result);
#define ENDIANNESS
#include "system/memory_ldst_endian.h.inc"
diff --git a/include/exec/memory_ldst_phys.h.inc b/include/exec/memory_ldst_phys.h.inc
index c3c73419e61..f4c91dc7a91 100644
--- a/include/exec/memory_ldst_phys.h.inc
+++ b/include/exec/memory_ldst_phys.h.inc
@@ -19,54 +19,18 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-static inline uint64_t glue(ldq_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_ldq, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
-static inline void glue(stq_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val)
-{
- glue(address_space_stq, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline uint8_t glue(ldub_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
{
return glue(address_space_ldub, SUFFIX)(ARG1, addr,
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline uint64_t glue(ldq_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_ldq_le, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
-static inline uint64_t glue(ldq_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
-{
- return glue(address_space_ldq_be, SUFFIX)(ARG1, addr,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
static inline void glue(stb_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val)
{
glue(address_space_stb, SUFFIX)(ARG1, addr, val,
MEMTXATTRS_UNSPECIFIED, NULL);
}
-static inline void glue(stq_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val)
-{
- glue(address_space_stq_le, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
-static inline void glue(stq_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val)
-{
- glue(address_space_stq_be, SUFFIX)(ARG1, addr, val,
- MEMTXATTRS_UNSPECIFIED, NULL);
-}
-
#define ENDIANNESS
#include "system/memory_ldst_phys_endian.h.inc"
diff --git a/include/system/memory_ldst_endian.h.inc b/include/system/memory_ldst_endian.h.inc
index a3f543a715c..ec86e42afbc 100644
--- a/include/system/memory_ldst_endian.h.inc
+++ b/include/system/memory_ldst_endian.h.inc
@@ -18,10 +18,14 @@ uint16_t ADDRESS_SPACE_LD(uw)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
uint32_t ADDRESS_SPACE_LD(l)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
+uint64_t ADDRESS_SPACE_LD(q)(ARG1_DECL, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result);
void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
MemTxAttrs attrs, MemTxResult *result);
void ADDRESS_SPACE_ST(l)(ARG1_DECL, hwaddr addr, uint32_t val,
MemTxAttrs attrs, MemTxResult *result);
+void ADDRESS_SPACE_ST(q)(ARG1_DECL, hwaddr addr, uint64_t val,
+ MemTxAttrs attrs, MemTxResult *result);
#undef ADDRESS_SPACE_LD
#undef ADDRESS_SPACE_ST
diff --git a/include/system/memory_ldst_phys_endian.h.inc b/include/system/memory_ldst_phys_endian.h.inc
index 0ec550979fa..9603d886867 100644
--- a/include/system/memory_ldst_phys_endian.h.inc
+++ b/include/system/memory_ldst_phys_endian.h.inc
@@ -29,6 +29,11 @@ static inline uint32_t LD_PHYS(l)(ARG1_DECL, hwaddr addr)
return ADDRESS_SPACE_LD(l)(ARG1, addr, MEMTXATTRS_UNSPECIFIED, NULL);
}
+static inline uint64_t LD_PHYS(q)(ARG1_DECL, hwaddr addr)
+{
+ return ADDRESS_SPACE_LD(q)(ARG1, addr, MEMTXATTRS_UNSPECIFIED, NULL);
+}
+
static inline void ST_PHYS(w)(ARG1_DECL, hwaddr addr, uint16_t val)
{
ADDRESS_SPACE_ST(w)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
@@ -39,6 +44,11 @@ static inline void ST_PHYS(l)(ARG1_DECL, hwaddr addr, uint32_t val)
ADDRESS_SPACE_ST(l)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
}
+static inline void ST_PHYS(q)(ARG1_DECL, hwaddr addr, uint64_t val)
+{
+ ADDRESS_SPACE_ST(q)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
+}
+
#undef LD_PHYS
#undef ST_PHYS
#undef ADDRESS_SPACE_LD
diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
index ab2df6e429b..823fc3a7561 100644
--- a/system/memory_ldst.c.inc
+++ b/system/memory_ldst.c.inc
@@ -115,27 +115,6 @@ static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
return val;
}
-uint64_t glue(address_space_ldq, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldq_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_NATIVE_ENDIAN);
-}
-
-uint64_t glue(address_space_ldq_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldq_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_LITTLE_ENDIAN);
-}
-
-uint64_t glue(address_space_ldq_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldq_internal, SUFFIX)(ARG1, addr, attrs, result,
- DEVICE_BIG_ENDIAN);
-}
-
uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
{
@@ -381,27 +360,6 @@ static inline void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
RCU_READ_UNLOCK();
}
-void glue(address_space_stq, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stq_internal, SUFFIX)(ARG1, addr, val, attrs, result,
- DEVICE_NATIVE_ENDIAN);
-}
-
-void glue(address_space_stq_le, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stq_internal, SUFFIX)(ARG1, addr, val, attrs, result,
- DEVICE_LITTLE_ENDIAN);
-}
-
-void glue(address_space_stq_be, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stq_internal, SUFFIX)(ARG1, addr, val, attrs, result,
- DEVICE_BIG_ENDIAN);
-}
-
#define ENDIANNESS
#define DEVICE_ENDIANNESS DEVICE_NATIVE_ENDIAN
#include "memory_ldst_endian.c.inc"
diff --git a/system/memory_ldst_endian.c.inc b/system/memory_ldst_endian.c.inc
index 5bb59ff3d8e..16d686b50f7 100644
--- a/system/memory_ldst_endian.c.inc
+++ b/system/memory_ldst_endian.c.inc
@@ -33,6 +33,13 @@ uint32_t ADDRESS_SPACE_LD(l)(ARG1_DECL, hwaddr addr,
DEVICE_ENDIANNESS);
}
+uint64_t ADDRESS_SPACE_LD(q)(ARG1_DECL, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result)
+{
+ return ADDRESS_SPACE_LD_INTERNAL(q)(ARG1, addr, attrs, result,
+ DEVICE_ENDIANNESS);
+}
+
void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
MemTxAttrs attrs, MemTxResult *result)
{
@@ -47,6 +54,13 @@ void ADDRESS_SPACE_ST(l)(ARG1_DECL, hwaddr addr, uint32_t val,
DEVICE_ENDIANNESS);
}
+void ADDRESS_SPACE_ST(q)(ARG1_DECL, hwaddr addr, uint64_t val,
+ MemTxAttrs attrs, MemTxResult *result)
+{
+ ADDRESS_SPACE_ST_INTERNAL(q)(ARG1, addr, val, attrs, result,
+ DEVICE_ENDIANNESS);
+}
+
#undef ADDRESS_SPACE_LD
#undef ADDRESS_SPACE_LD_INTERNAL
#undef ADDRESS_SPACE_ST
--
2.52.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* Re: [PATCH 11/14] system/memory: Define address_space_ldst[Q] endian variants via template
2025-12-17 14:31 ` [PATCH 11/14] system/memory: Define address_space_ldst[Q] " Philippe Mathieu-Daudé
@ 2025-12-17 20:22 ` Richard Henderson
0 siblings, 0 replies; 37+ messages in thread
From: Richard Henderson @ 2025-12-17 20:22 UTC (permalink / raw)
To: qemu-devel
On 12/18/25 01:31, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
> include/exec/memory_ldst.h.inc | 17 ++------
> include/exec/memory_ldst_phys.h.inc | 36 -----------------
> include/system/memory_ldst_endian.h.inc | 4 ++
> include/system/memory_ldst_phys_endian.h.inc | 10 +++++
> system/memory_ldst.c.inc | 42 --------------------
> system/memory_ldst_endian.c.inc | 14 +++++++
> 6 files changed, 31 insertions(+), 92 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH 12/14] system/memory: Factor address_space_ldst[M]_internal() helper out
2025-12-17 14:31 [PATCH 00/14] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (10 preceding siblings ...)
2025-12-17 14:31 ` [PATCH 11/14] system/memory: Define address_space_ldst[Q] " Philippe Mathieu-Daudé
@ 2025-12-17 14:31 ` Philippe Mathieu-Daudé
2025-12-17 20:29 ` Richard Henderson
2025-12-17 14:31 ` [PATCH 13/14] system/memory: Pass device_endian argument as MemOp bit Philippe Mathieu-Daudé
2025-12-17 14:31 ` [PATCH 14/14] system/memory: Sort methods in memory_ldst.c.inc file Philippe Mathieu-Daudé
13 siblings, 1 reply; 37+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-17 14:31 UTC (permalink / raw)
To: qemu-devel
Cc: Philippe Mathieu-Daudé, Anton Johansson, qemu-arm,
Mark Cave-Ayland, Paolo Bonzini, Michael S. Tsirkin,
Artyom Tarasenko, Peter Maydell, David Hildenbrand, Peter Xu
All the LD/ST[W,L,Q] variants use the same template, only
modifying the access size used. Unify as a single pair of
LD/ST methods taking a MemOp argument. Thus use the 'm'
suffix for MemOp.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
system/memory_ldst.c.inc | 289 ++++++++-------------------------------
1 file changed, 58 insertions(+), 231 deletions(-)
diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
index 823fc3a7561..e0c0c3f5dca 100644
--- a/system/memory_ldst.c.inc
+++ b/system/memory_ldst.c.inc
@@ -20,39 +20,43 @@
*/
/* warning: addr must be aligned */
-static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
- enum device_endian endian)
+static inline
+uint64_t glue(address_space_ldm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
+ hwaddr addr,
+ MemTxAttrs attrs,
+ MemTxResult *result,
+ enum device_endian endian)
{
+ const unsigned size = memop_size(mop);
uint8_t *ptr;
uint64_t val;
MemoryRegion *mr;
- hwaddr l = 4;
+ hwaddr l = size;
hwaddr addr1;
MemTxResult r;
bool release_lock = false;
RCU_READ_LOCK();
mr = TRANSLATE(addr, &addr1, &l, false, attrs);
- if (l < 4 || !memory_access_is_direct(mr, false, attrs)) {
+ if (l < size || !memory_access_is_direct(mr, false, attrs)) {
release_lock |= prepare_mmio_access(mr);
/* I/O case */
r = memory_region_dispatch_read(mr, addr1, &val,
- MO_32 | devend_memop(endian), attrs);
+ mop | devend_memop(endian), attrs);
} else {
/* RAM case */
- fuzz_dma_read_cb(addr, 4, mr);
+ fuzz_dma_read_cb(addr, size, mr);
ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
switch (endian) {
case DEVICE_LITTLE_ENDIAN:
- val = ldl_le_p(ptr);
+ val = ldn_le_p(ptr, size);
break;
case DEVICE_BIG_ENDIAN:
- val = ldl_be_p(ptr);
+ val = ldn_be_p(ptr, size);
break;
default:
- val = ldl_p(ptr);
+ val = ldn_p(ptr, size);
break;
}
r = MEMTX_OK;
@@ -67,87 +71,30 @@ static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
return val;
}
+/* warning: addr must be aligned */
+static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
+ enum device_endian endian)
+{
+ return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_32, addr,
+ attrs, result, endian);
+}
+
/* warning: addr must be aligned */
static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
enum device_endian endian)
{
- uint8_t *ptr;
- uint64_t val;
- MemoryRegion *mr;
- hwaddr l = 8;
- hwaddr addr1;
- MemTxResult r;
- bool release_lock = false;
-
- RCU_READ_LOCK();
- mr = TRANSLATE(addr, &addr1, &l, false, attrs);
- if (l < 8 || !memory_access_is_direct(mr, false, attrs)) {
- release_lock |= prepare_mmio_access(mr);
-
- /* I/O case */
- r = memory_region_dispatch_read(mr, addr1, &val,
- MO_64 | devend_memop(endian), attrs);
- } else {
- /* RAM case */
- fuzz_dma_read_cb(addr, 8, mr);
- ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- switch (endian) {
- case DEVICE_LITTLE_ENDIAN:
- val = ldq_le_p(ptr);
- break;
- case DEVICE_BIG_ENDIAN:
- val = ldq_be_p(ptr);
- break;
- default:
- val = ldq_p(ptr);
- break;
- }
- r = MEMTX_OK;
- }
- if (result) {
- *result = r;
- }
- if (release_lock) {
- bql_unlock();
- }
- RCU_READ_UNLOCK();
- return val;
+ return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_64, addr,
+ attrs, result, endian);
}
uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
{
- uint8_t *ptr;
- uint64_t val;
- MemoryRegion *mr;
- hwaddr l = 1;
- hwaddr addr1;
- MemTxResult r;
- bool release_lock = false;
-
- RCU_READ_LOCK();
- mr = TRANSLATE(addr, &addr1, &l, false, attrs);
- if (!memory_access_is_direct(mr, false, attrs)) {
- release_lock |= prepare_mmio_access(mr);
-
- /* I/O case */
- r = memory_region_dispatch_read(mr, addr1, &val, MO_8, attrs);
- } else {
- /* RAM case */
- fuzz_dma_read_cb(addr, 1, mr);
- ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- val = ldub_p(ptr);
- r = MEMTX_OK;
- }
- if (result) {
- *result = r;
- }
- if (release_lock) {
- bql_unlock();
- }
- RCU_READ_UNLOCK();
- return val;
+ return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_8, addr,
+ attrs, result,
+ DEVICE_NATIVE_ENDIAN);
}
/* warning: addr must be aligned */
@@ -155,37 +102,46 @@ static inline uint16_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
enum device_endian endian)
{
+ return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_16, addr,
+ attrs, result, endian);
+}
+
+static inline
+void glue(address_space_stm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
+ hwaddr addr, uint64_t val,
+ MemTxAttrs attrs,
+ MemTxResult *result,
+ enum device_endian endian)
+{
+ const unsigned size = memop_size(mop);
uint8_t *ptr;
- uint64_t val;
MemoryRegion *mr;
- hwaddr l = 2;
+ hwaddr l = size;
hwaddr addr1;
MemTxResult r;
bool release_lock = false;
RCU_READ_LOCK();
- mr = TRANSLATE(addr, &addr1, &l, false, attrs);
- if (l < 2 || !memory_access_is_direct(mr, false, attrs)) {
+ mr = TRANSLATE(addr, &addr1, &l, true, attrs);
+ if (l < size || !memory_access_is_direct(mr, true, attrs)) {
release_lock |= prepare_mmio_access(mr);
-
- /* I/O case */
- r = memory_region_dispatch_read(mr, addr1, &val,
- MO_16 | devend_memop(endian), attrs);
+ r = memory_region_dispatch_write(mr, addr1, val,
+ mop | devend_memop(endian), attrs);
} else {
/* RAM case */
- fuzz_dma_read_cb(addr, 2, mr);
ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
switch (endian) {
case DEVICE_LITTLE_ENDIAN:
- val = lduw_le_p(ptr);
+ stn_le_p(ptr, size, val);
break;
case DEVICE_BIG_ENDIAN:
- val = lduw_be_p(ptr);
+ stn_be_p(ptr, size, val);
break;
default:
- val = lduw_p(ptr);
+ stn_p(ptr, size, val);
break;
}
+ invalidate_and_set_dirty(mr, addr1, size);
r = MEMTX_OK;
}
if (result) {
@@ -195,7 +151,6 @@ static inline uint16_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL,
bql_unlock();
}
RCU_READ_UNLOCK();
- return val;
}
/* warning: addr must be aligned */
@@ -203,74 +158,16 @@ static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, uint32_t val, MemTxAttrs attrs,
MemTxResult *result, enum device_endian endian)
{
- uint8_t *ptr;
- MemoryRegion *mr;
- hwaddr l = 4;
- hwaddr addr1;
- MemTxResult r;
- bool release_lock = false;
-
- RCU_READ_LOCK();
- mr = TRANSLATE(addr, &addr1, &l, true, attrs);
- if (l < 4 || !memory_access_is_direct(mr, true, attrs)) {
- release_lock |= prepare_mmio_access(mr);
- r = memory_region_dispatch_write(mr, addr1, val,
- MO_32 | devend_memop(endian), attrs);
- } else {
- /* RAM case */
- ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- switch (endian) {
- case DEVICE_LITTLE_ENDIAN:
- stl_le_p(ptr, val);
- break;
- case DEVICE_BIG_ENDIAN:
- stl_be_p(ptr, val);
- break;
- default:
- stl_p(ptr, val);
- break;
- }
- invalidate_and_set_dirty(mr, addr1, 4);
- r = MEMTX_OK;
- }
- if (result) {
- *result = r;
- }
- if (release_lock) {
- bql_unlock();
- }
- RCU_READ_UNLOCK();
+ glue(address_space_stm_internal, SUFFIX)(ARG1, MO_32, addr, val,
+ attrs, result, endian);
}
void glue(address_space_stb, SUFFIX)(ARG1_DECL,
hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result)
{
- uint8_t *ptr;
- MemoryRegion *mr;
- hwaddr l = 1;
- hwaddr addr1;
- MemTxResult r;
- bool release_lock = false;
-
- RCU_READ_LOCK();
- mr = TRANSLATE(addr, &addr1, &l, true, attrs);
- if (!memory_access_is_direct(mr, true, attrs)) {
- release_lock |= prepare_mmio_access(mr);
- r = memory_region_dispatch_write(mr, addr1, val, MO_8, attrs);
- } else {
- /* RAM case */
- ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- stb_p(ptr, val);
- invalidate_and_set_dirty(mr, addr1, 1);
- r = MEMTX_OK;
- }
- if (result) {
- *result = r;
- }
- if (release_lock) {
- bql_unlock();
- }
- RCU_READ_UNLOCK();
+ glue(address_space_stm_internal, SUFFIX)(ARG1, MO_8, addr, val,
+ attrs, result,
+ DEVICE_NATIVE_ENDIAN);
}
/* warning: addr must be aligned */
@@ -278,86 +175,16 @@ static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, uint16_t val, MemTxAttrs attrs,
MemTxResult *result, enum device_endian endian)
{
- uint8_t *ptr;
- MemoryRegion *mr;
- hwaddr l = 2;
- hwaddr addr1;
- MemTxResult r;
- bool release_lock = false;
-
- RCU_READ_LOCK();
- mr = TRANSLATE(addr, &addr1, &l, true, attrs);
- if (l < 2 || !memory_access_is_direct(mr, true, attrs)) {
- release_lock |= prepare_mmio_access(mr);
- r = memory_region_dispatch_write(mr, addr1, val,
- MO_16 | devend_memop(endian), attrs);
- } else {
- /* RAM case */
- ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- switch (endian) {
- case DEVICE_LITTLE_ENDIAN:
- stw_le_p(ptr, val);
- break;
- case DEVICE_BIG_ENDIAN:
- stw_be_p(ptr, val);
- break;
- default:
- stw_p(ptr, val);
- break;
- }
- invalidate_and_set_dirty(mr, addr1, 2);
- r = MEMTX_OK;
- }
- if (result) {
- *result = r;
- }
- if (release_lock) {
- bql_unlock();
- }
- RCU_READ_UNLOCK();
+ glue(address_space_stm_internal, SUFFIX)(ARG1, MO_16, addr, val,
+ attrs, result, endian);
}
static inline void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
hwaddr addr, uint64_t val, MemTxAttrs attrs,
MemTxResult *result, enum device_endian endian)
{
- uint8_t *ptr;
- MemoryRegion *mr;
- hwaddr l = 8;
- hwaddr addr1;
- MemTxResult r;
- bool release_lock = false;
-
- RCU_READ_LOCK();
- mr = TRANSLATE(addr, &addr1, &l, true, attrs);
- if (l < 8 || !memory_access_is_direct(mr, true, attrs)) {
- release_lock |= prepare_mmio_access(mr);
- r = memory_region_dispatch_write(mr, addr1, val,
- MO_64 | devend_memop(endian), attrs);
- } else {
- /* RAM case */
- ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- switch (endian) {
- case DEVICE_LITTLE_ENDIAN:
- stq_le_p(ptr, val);
- break;
- case DEVICE_BIG_ENDIAN:
- stq_be_p(ptr, val);
- break;
- default:
- stq_p(ptr, val);
- break;
- }
- invalidate_and_set_dirty(mr, addr1, 8);
- r = MEMTX_OK;
- }
- if (result) {
- *result = r;
- }
- if (release_lock) {
- bql_unlock();
- }
- RCU_READ_UNLOCK();
+ glue(address_space_stm_internal, SUFFIX)(ARG1, MO_64, addr, val,
+ attrs, result, endian);
}
#define ENDIANNESS
--
2.52.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* Re: [PATCH 12/14] system/memory: Factor address_space_ldst[M]_internal() helper out
2025-12-17 14:31 ` [PATCH 12/14] system/memory: Factor address_space_ldst[M]_internal() helper out Philippe Mathieu-Daudé
@ 2025-12-17 20:29 ` Richard Henderson
0 siblings, 0 replies; 37+ messages in thread
From: Richard Henderson @ 2025-12-17 20:29 UTC (permalink / raw)
To: qemu-devel
On 12/18/25 01:31, Philippe Mathieu-Daudé wrote:
> All the LD/ST[W,L,Q] variants use the same template, only
> modifying the access size used. Unify as a single pair of
> LD/ST methods taking a MemOp argument. Thus use the 'm'
> suffix for MemOp.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> system/memory_ldst.c.inc | 289 ++++++++-------------------------------
> 1 file changed, 58 insertions(+), 231 deletions(-)
>
> diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
> index 823fc3a7561..e0c0c3f5dca 100644
> --- a/system/memory_ldst.c.inc
> +++ b/system/memory_ldst.c.inc
> @@ -20,39 +20,43 @@
> */
>
> /* warning: addr must be aligned */
> -static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
> - hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
> - enum device_endian endian)
> +static inline
> +uint64_t glue(address_space_ldm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
> + hwaddr addr,
> + MemTxAttrs attrs,
> + MemTxResult *result,
> + enum device_endian endian)
> {
> + const unsigned size = memop_size(mop);
> uint8_t *ptr;
> uint64_t val;
> MemoryRegion *mr;
> - hwaddr l = 4;
> + hwaddr l = size;
> hwaddr addr1;
> MemTxResult r;
> bool release_lock = false;
>
> RCU_READ_LOCK();
> mr = TRANSLATE(addr, &addr1, &l, false, attrs);
> - if (l < 4 || !memory_access_is_direct(mr, false, attrs)) {
> + if (l < size || !memory_access_is_direct(mr, false, attrs)) {
> release_lock |= prepare_mmio_access(mr);
>
> /* I/O case */
> r = memory_region_dispatch_read(mr, addr1, &val,
> - MO_32 | devend_memop(endian), attrs);
> + mop | devend_memop(endian), attrs);
> } else {
> /* RAM case */
> - fuzz_dma_read_cb(addr, 4, mr);
> + fuzz_dma_read_cb(addr, size, mr);
> ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
> switch (endian) {
> case DEVICE_LITTLE_ENDIAN:
> - val = ldl_le_p(ptr);
> + val = ldn_le_p(ptr, size);
> break;
> case DEVICE_BIG_ENDIAN:
> - val = ldl_be_p(ptr);
> + val = ldn_be_p(ptr, size);
> break;
> default:
> - val = ldl_p(ptr);
> + val = ldn_p(ptr, size);
> break;
> }
> r = MEMTX_OK;
> @@ -67,87 +71,30 @@ static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
> return val;
> }
>
> +/* warning: addr must be aligned */
> +static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
> + hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
> + enum device_endian endian)
> +{
> + return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_32, addr,
> + attrs, result, endian);
> +}
> +
> /* warning: addr must be aligned */
Do we know why this warning is here?
Do we know why we aren't asserting alignment?
It makes me wonder if the ldn_*_p above shouldn't be qatomic_ld.
And more so for the stores.
But that's an existing problem, not new with the refactor, so
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH 13/14] system/memory: Pass device_endian argument as MemOp bit
2025-12-17 14:31 [PATCH 00/14] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (11 preceding siblings ...)
2025-12-17 14:31 ` [PATCH 12/14] system/memory: Factor address_space_ldst[M]_internal() helper out Philippe Mathieu-Daudé
@ 2025-12-17 14:31 ` Philippe Mathieu-Daudé
2025-12-17 20:31 ` Richard Henderson
2025-12-17 14:31 ` [PATCH 14/14] system/memory: Sort methods in memory_ldst.c.inc file Philippe Mathieu-Daudé
13 siblings, 1 reply; 37+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-17 14:31 UTC (permalink / raw)
To: qemu-devel
Cc: Philippe Mathieu-Daudé, Anton Johansson, qemu-arm,
Mark Cave-Ayland, Paolo Bonzini, Michael S. Tsirkin,
Artyom Tarasenko, Peter Maydell, David Hildenbrand, Peter Xu
Use the MemOp argument to hold both the access size and
its endianness.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
system/memory_ldst.c.inc | 86 ++++++++++++---------------------
system/memory_ldst_endian.c.inc | 20 +++-----
2 files changed, 38 insertions(+), 68 deletions(-)
diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
index e0c0c3f5dca..6387bb9d332 100644
--- a/system/memory_ldst.c.inc
+++ b/system/memory_ldst.c.inc
@@ -24,8 +24,7 @@ static inline
uint64_t glue(address_space_ldm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
hwaddr addr,
MemTxAttrs attrs,
- MemTxResult *result,
- enum device_endian endian)
+ MemTxResult *result)
{
const unsigned size = memop_size(mop);
uint8_t *ptr;
@@ -42,22 +41,15 @@ uint64_t glue(address_space_ldm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
release_lock |= prepare_mmio_access(mr);
/* I/O case */
- r = memory_region_dispatch_read(mr, addr1, &val,
- mop | devend_memop(endian), attrs);
+ r = memory_region_dispatch_read(mr, addr1, &val, mop, attrs);
} else {
/* RAM case */
fuzz_dma_read_cb(addr, size, mr);
ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- switch (endian) {
- case DEVICE_LITTLE_ENDIAN:
+ if ((mop & MO_BSWAP) == MO_LE) {
val = ldn_le_p(ptr, size);
- break;
- case DEVICE_BIG_ENDIAN:
+ } else {
val = ldn_be_p(ptr, size);
- break;
- default:
- val = ldn_p(ptr, size);
- break;
}
r = MEMTX_OK;
}
@@ -73,45 +65,40 @@ uint64_t glue(address_space_ldm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
/* warning: addr must be aligned */
static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
- enum device_endian endian)
+ MemOp mop, hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
{
- return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_32, addr,
- attrs, result, endian);
+ return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_32, addr,
+ attrs, result);
}
/* warning: addr must be aligned */
static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
- enum device_endian endian)
+ MemOp mop, hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
{
- return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_64, addr,
- attrs, result, endian);
+ return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_64, addr,
+ attrs, result);
}
uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
{
return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_8, addr,
- attrs, result,
- DEVICE_NATIVE_ENDIAN);
+ attrs, result);
}
/* warning: addr must be aligned */
static inline uint16_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result,
- enum device_endian endian)
+ MemOp mop, hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
{
- return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_16, addr,
- attrs, result, endian);
+ return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_16, addr,
+ attrs, result);
}
static inline
void glue(address_space_stm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
hwaddr addr, uint64_t val,
MemTxAttrs attrs,
- MemTxResult *result,
- enum device_endian endian)
+ MemTxResult *result)
{
const unsigned size = memop_size(mop);
uint8_t *ptr;
@@ -125,21 +112,14 @@ void glue(address_space_stm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
mr = TRANSLATE(addr, &addr1, &l, true, attrs);
if (l < size || !memory_access_is_direct(mr, true, attrs)) {
release_lock |= prepare_mmio_access(mr);
- r = memory_region_dispatch_write(mr, addr1, val,
- mop | devend_memop(endian), attrs);
+ r = memory_region_dispatch_write(mr, addr1, val, mop, attrs);
} else {
/* RAM case */
ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
- switch (endian) {
- case DEVICE_LITTLE_ENDIAN:
+ if ((mop & MO_BSWAP) == MO_LE) {
stn_le_p(ptr, size, val);
- break;
- case DEVICE_BIG_ENDIAN:
+ } else {
stn_be_p(ptr, size, val);
- break;
- default:
- stn_p(ptr, size, val);
- break;
}
invalidate_and_set_dirty(mr, addr1, size);
r = MEMTX_OK;
@@ -155,48 +135,44 @@ void glue(address_space_stm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
/* warning: addr must be aligned */
static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint32_t val, MemTxAttrs attrs,
- MemTxResult *result, enum device_endian endian)
+ MemOp mop, hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
{
- glue(address_space_stm_internal, SUFFIX)(ARG1, MO_32, addr, val,
- attrs, result, endian);
+ glue(address_space_stm_internal, SUFFIX)(ARG1, mop | MO_32, addr, val,
+ attrs, result);
}
void glue(address_space_stb, SUFFIX)(ARG1_DECL,
hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result)
{
glue(address_space_stm_internal, SUFFIX)(ARG1, MO_8, addr, val,
- attrs, result,
- DEVICE_NATIVE_ENDIAN);
+ attrs, result);
}
/* warning: addr must be aligned */
static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint16_t val, MemTxAttrs attrs,
- MemTxResult *result, enum device_endian endian)
+ MemOp mop, hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result)
{
- glue(address_space_stm_internal, SUFFIX)(ARG1, MO_16, addr, val,
- attrs, result, endian);
+ glue(address_space_stm_internal, SUFFIX)(ARG1, mop | MO_16, addr, val,
+ attrs, result);
}
static inline void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint64_t val, MemTxAttrs attrs,
- MemTxResult *result, enum device_endian endian)
+ MemOp mop, hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result)
{
- glue(address_space_stm_internal, SUFFIX)(ARG1, MO_64, addr, val,
- attrs, result, endian);
+ glue(address_space_stm_internal, SUFFIX)(ARG1, mop | MO_64, addr, val,
+ attrs, result);
}
#define ENDIANNESS
-#define DEVICE_ENDIANNESS DEVICE_NATIVE_ENDIAN
+#define MO_ENDIAN (target_big_endian() ? MO_BE : MO_LE)
#include "memory_ldst_endian.c.inc"
#define ENDIANNESS _le
-#define DEVICE_ENDIANNESS DEVICE_LITTLE_ENDIAN
+#define MO_ENDIAN MO_LE
#include "memory_ldst_endian.c.inc"
#define ENDIANNESS _be
-#define DEVICE_ENDIANNESS DEVICE_BIG_ENDIAN
+#define MO_ENDIAN MO_BE
#include "memory_ldst_endian.c.inc"
#undef ARG1_DECL
diff --git a/system/memory_ldst_endian.c.inc b/system/memory_ldst_endian.c.inc
index 16d686b50f7..8a4b4a3d220 100644
--- a/system/memory_ldst_endian.c.inc
+++ b/system/memory_ldst_endian.c.inc
@@ -22,43 +22,37 @@
uint16_t ADDRESS_SPACE_LD(uw)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result)
{
- return ADDRESS_SPACE_LD_INTERNAL(uw)(ARG1, addr, attrs, result,
- DEVICE_ENDIANNESS);
+ return ADDRESS_SPACE_LD_INTERNAL(uw)(ARG1, MO_ENDIAN, addr, attrs, result);
}
uint32_t ADDRESS_SPACE_LD(l)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result)
{
- return ADDRESS_SPACE_LD_INTERNAL(l)(ARG1, addr, attrs, result,
- DEVICE_ENDIANNESS);
+ return ADDRESS_SPACE_LD_INTERNAL(l)(ARG1, MO_ENDIAN, addr, attrs, result);
}
uint64_t ADDRESS_SPACE_LD(q)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result)
{
- return ADDRESS_SPACE_LD_INTERNAL(q)(ARG1, addr, attrs, result,
- DEVICE_ENDIANNESS);
+ return ADDRESS_SPACE_LD_INTERNAL(q)(ARG1, MO_ENDIAN, addr, attrs, result);
}
void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
MemTxAttrs attrs, MemTxResult *result)
{
- ADDRESS_SPACE_ST_INTERNAL(w)(ARG1, addr, val, attrs, result,
- DEVICE_ENDIANNESS);
+ ADDRESS_SPACE_ST_INTERNAL(w)(ARG1, MO_ENDIAN, addr, val, attrs, result);
}
void ADDRESS_SPACE_ST(l)(ARG1_DECL, hwaddr addr, uint32_t val,
MemTxAttrs attrs, MemTxResult *result)
{
- ADDRESS_SPACE_ST_INTERNAL(l)(ARG1, addr, val, attrs, result,
- DEVICE_ENDIANNESS);
+ ADDRESS_SPACE_ST_INTERNAL(l)(ARG1, MO_ENDIAN, addr, val, attrs, result);
}
void ADDRESS_SPACE_ST(q)(ARG1_DECL, hwaddr addr, uint64_t val,
MemTxAttrs attrs, MemTxResult *result)
{
- ADDRESS_SPACE_ST_INTERNAL(q)(ARG1, addr, val, attrs, result,
- DEVICE_ENDIANNESS);
+ ADDRESS_SPACE_ST_INTERNAL(q)(ARG1, MO_ENDIAN, addr, val, attrs, result);
}
#undef ADDRESS_SPACE_LD
@@ -67,4 +61,4 @@ void ADDRESS_SPACE_ST(q)(ARG1_DECL, hwaddr addr, uint64_t val,
#undef ADDRESS_SPACE_ST_INTERNAL
#undef ENDIANNESS
-#undef DEVICE_ENDIANNESS
+#undef MO_ENDIAN
--
2.52.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 14/14] system/memory: Sort methods in memory_ldst.c.inc file
2025-12-17 14:31 [PATCH 00/14] system/memory: Clean ups around address_space_ldst() endian variants Philippe Mathieu-Daudé
` (12 preceding siblings ...)
2025-12-17 14:31 ` [PATCH 13/14] system/memory: Pass device_endian argument as MemOp bit Philippe Mathieu-Daudé
@ 2025-12-17 14:31 ` Philippe Mathieu-Daudé
2025-12-17 20:32 ` Richard Henderson
13 siblings, 1 reply; 37+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-12-17 14:31 UTC (permalink / raw)
To: qemu-devel
Cc: Philippe Mathieu-Daudé, Anton Johansson, qemu-arm,
Mark Cave-Ayland, Paolo Bonzini, Michael S. Tsirkin,
Artyom Tarasenko, Peter Maydell, David Hildenbrand, Peter Xu
For clarity, sort methods by access size (B, W, L, Q).
Fix coding style. Only code movement, no logical change.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
system/memory_ldst.c.inc | 86 ++++++++++++++++++++++++----------------
1 file changed, 52 insertions(+), 34 deletions(-)
diff --git a/system/memory_ldst.c.inc b/system/memory_ldst.c.inc
index 6387bb9d332..5a979ea6ac3 100644
--- a/system/memory_ldst.c.inc
+++ b/system/memory_ldst.c.inc
@@ -63,37 +63,46 @@ uint64_t glue(address_space_ldm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
return val;
}
-/* warning: addr must be aligned */
-static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
- MemOp mop, hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_32, addr,
- attrs, result);
-}
-
-/* warning: addr must be aligned */
-static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
- MemOp mop, hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_64, addr,
- attrs, result);
-}
-
-uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
+uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result)
{
return glue(address_space_ldm_internal, SUFFIX)(ARG1, MO_8, addr,
attrs, result);
}
/* warning: addr must be aligned */
-static inline uint16_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL,
- MemOp mop, hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
+static inline
+uint16_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL, MemOp mop,
+ hwaddr addr,
+ MemTxAttrs attrs,
+ MemTxResult *result)
{
return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_16, addr,
attrs, result);
}
+/* warning: addr must be aligned */
+static inline
+uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL, MemOp mop,
+ hwaddr addr,
+ MemTxAttrs attrs,
+ MemTxResult *result)
+{
+ return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_32, addr,
+ attrs, result);
+}
+
+/* warning: addr must be aligned */
+static inline
+uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL, MemOp mop,
+ hwaddr addr,
+ MemTxAttrs attrs,
+ MemTxResult *result)
+{
+ return glue(address_space_ldm_internal, SUFFIX)(ARG1, mop | MO_64, addr,
+ attrs, result);
+}
+
static inline
void glue(address_space_stm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
hwaddr addr, uint64_t val,
@@ -133,31 +142,40 @@ void glue(address_space_stm_internal, SUFFIX)(ARG1_DECL, MemOp mop,
RCU_READ_UNLOCK();
}
-/* warning: addr must be aligned */
-static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
- MemOp mop, hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- glue(address_space_stm_internal, SUFFIX)(ARG1, mop | MO_32, addr, val,
- attrs, result);
-}
-
-void glue(address_space_stb, SUFFIX)(ARG1_DECL,
- hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result)
+void glue(address_space_stb, SUFFIX)(ARG1_DECL, hwaddr addr, uint8_t val,
+ MemTxAttrs attrs, MemTxResult *result)
{
glue(address_space_stm_internal, SUFFIX)(ARG1, MO_8, addr, val,
attrs, result);
}
/* warning: addr must be aligned */
-static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL,
- MemOp mop, hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result)
+static inline
+void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL, MemOp mop,
+ hwaddr addr, uint16_t val,
+ MemTxAttrs attrs,
+ MemTxResult *result)
{
glue(address_space_stm_internal, SUFFIX)(ARG1, mop | MO_16, addr, val,
attrs, result);
}
-static inline void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
- MemOp mop, hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result)
+/* warning: addr must be aligned */
+static inline
+void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL, MemOp mop,
+ hwaddr addr, uint32_t val,
+ MemTxAttrs attrs,
+ MemTxResult *result)
+{
+ glue(address_space_stm_internal, SUFFIX)(ARG1, mop | MO_32, addr, val,
+ attrs, result);
+}
+
+static inline
+void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL, MemOp mop,
+ hwaddr addr, uint64_t val,
+ MemTxAttrs attrs,
+ MemTxResult *result)
{
glue(address_space_stm_internal, SUFFIX)(ARG1, mop | MO_64, addr, val,
attrs, result);
--
2.52.0
^ permalink raw reply related [flat|nested] 37+ messages in thread