From: Yao Zi <me@ziyao.cc>
To: Guodong Xu <guodong@riscstar.com>, Conor Dooley <conor@kernel.org>
Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@sifive.com>,
Kevin Meng Zhang <zhangmeng.kevin@linux.spacemit.com>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, spacemit@lists.linux.dev,
linux-serial@vger.kernel.org, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>, Yixun Lan <dlan@gentoo.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Samuel Holland <samuel.holland@sifive.com>,
Anup Patel <anup@brainfault.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>,
Lubomir Rintel <lkundrak@v3.sk>, Yangyu Chen <cyy@cyyself.name>
Subject: Re: [PATCH 7/8] riscv: dts: spacemit: add initial device tree of SpacemiT K3 SoC
Date: Sat, 20 Dec 2025 02:48:34 +0000 [thread overview]
Message-ID: <aUYOgl8ffcJ0Xfwg@pie> (raw)
In-Reply-To: <CAH1PCMZ3KM9-D3NJ1N2LUHTHFSDVKmGKT5fU8knAL7NnV9E-gw@mail.gmail.com>
On Fri, Dec 19, 2025 at 10:03:24AM +0800, Guodong Xu wrote:
> Hi, Conor and Heinrich
>
> On Thu, Dec 18, 2025 at 8:56 AM Conor Dooley <conor@kernel.org> wrote:
> >
> > On Wed, Dec 17, 2025 at 09:07:14AM +0100, Heinrich Schuchardt wrote:
> > > On 12/17/25 08:11, Guodong Xu wrote:
> >
> > > > Specifically, I must adhere to
> > > > Documentation/devicetree/bindings/riscv/extensions.yaml (and cpus.yaml for
> > > > properties like 'riscv,sv39' which stands for the extension Sv39). If I
> > > > add extension strings that are not yet defined in these schemas, such as
> > > > supm, running 'make dtbs_check W=3' fails with: 'supm' is not one of
> > > > ['i', 'm', 'a', ...], followed by "Unevaluated properties are not allowed."
> > >
> > > If Documentation/devicetree/bindings/riscv/extensions.yaml is incomplete
> > > with respect to ratified extensions, I guess the right approach is to amend
> > > it and not to curtail the CPU description.
> >
> > Absolutely. If the cpu supports something that is not documented, then
> > please document it rather than omit from the devicetree.
>
...
> Strictly describing the SpacemiT X100/K3 (or any core) as RVA23-compliant
> requires adding these extensions that are currently missing from
> the kernel bindings:
> RVA23U64: Ziccif, Ziccamoa, Zicclsm, Za64rs
> RVA23S64: Ss1p13, Ssccptr, Sstvecd, Sstvala, Sscounterenw, Ssu64xl,
> Sha, Shcounterenw, Shvstvala, Shtvala, Shvstvecd, Shvsatpa, Shgatpa
> Plus 'Supm', 'Zic64b', 'Ssstateen', 'B' where the kernel supports them but
Please note B is just the abbreviation of "zba", "zbb", and "zbs", all
of them have been documented in extensions.yaml.
> they are not literally documented in yaml.
>
> Is this approach acceptable to you? If so, I will proceed with submitting them.
>
> Thank you very much.
>
> Best regards,
> Guodong Xu
>
Regards,
Yao Zi
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Yao Zi <me@ziyao.cc>
To: Guodong Xu <guodong@riscstar.com>, Conor Dooley <conor@kernel.org>
Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@sifive.com>,
Kevin Meng Zhang <zhangmeng.kevin@linux.spacemit.com>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, spacemit@lists.linux.dev,
linux-serial@vger.kernel.org, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>, Yixun Lan <dlan@gentoo.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Samuel Holland <samuel.holland@sifive.com>,
Anup Patel <anup@brainfault.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>,
Lubomir Rintel <lkundrak@v3.sk>, Yangyu Chen <cyy@cyyself.name>
Subject: Re: [PATCH 7/8] riscv: dts: spacemit: add initial device tree of SpacemiT K3 SoC
Date: Sat, 20 Dec 2025 02:48:34 +0000 [thread overview]
Message-ID: <aUYOgl8ffcJ0Xfwg@pie> (raw)
In-Reply-To: <CAH1PCMZ3KM9-D3NJ1N2LUHTHFSDVKmGKT5fU8knAL7NnV9E-gw@mail.gmail.com>
On Fri, Dec 19, 2025 at 10:03:24AM +0800, Guodong Xu wrote:
> Hi, Conor and Heinrich
>
> On Thu, Dec 18, 2025 at 8:56 AM Conor Dooley <conor@kernel.org> wrote:
> >
> > On Wed, Dec 17, 2025 at 09:07:14AM +0100, Heinrich Schuchardt wrote:
> > > On 12/17/25 08:11, Guodong Xu wrote:
> >
> > > > Specifically, I must adhere to
> > > > Documentation/devicetree/bindings/riscv/extensions.yaml (and cpus.yaml for
> > > > properties like 'riscv,sv39' which stands for the extension Sv39). If I
> > > > add extension strings that are not yet defined in these schemas, such as
> > > > supm, running 'make dtbs_check W=3' fails with: 'supm' is not one of
> > > > ['i', 'm', 'a', ...], followed by "Unevaluated properties are not allowed."
> > >
> > > If Documentation/devicetree/bindings/riscv/extensions.yaml is incomplete
> > > with respect to ratified extensions, I guess the right approach is to amend
> > > it and not to curtail the CPU description.
> >
> > Absolutely. If the cpu supports something that is not documented, then
> > please document it rather than omit from the devicetree.
>
...
> Strictly describing the SpacemiT X100/K3 (or any core) as RVA23-compliant
> requires adding these extensions that are currently missing from
> the kernel bindings:
> RVA23U64: Ziccif, Ziccamoa, Zicclsm, Za64rs
> RVA23S64: Ss1p13, Ssccptr, Sstvecd, Sstvala, Sscounterenw, Ssu64xl,
> Sha, Shcounterenw, Shvstvala, Shtvala, Shvstvecd, Shvsatpa, Shgatpa
> Plus 'Supm', 'Zic64b', 'Ssstateen', 'B' where the kernel supports them but
Please note B is just the abbreviation of "zba", "zbb", and "zbs", all
of them have been documented in extensions.yaml.
> they are not literally documented in yaml.
>
> Is this approach acceptable to you? If so, I will proceed with submitting them.
>
> Thank you very much.
>
> Best regards,
> Guodong Xu
>
Regards,
Yao Zi
next prev parent reply other threads:[~2025-12-20 2:49 UTC|newest]
Thread overview: 90+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-16 13:32 [PATCH 0/8] riscv: spacemit: Add SpacemiT K3 SoC and K3 Pico-ITX board Guodong Xu
2025-12-16 13:32 ` Guodong Xu
2025-12-16 13:32 ` [PATCH 1/8] dt-bindings: riscv: add SpacemiT X100 CPU compatible Guodong Xu
2025-12-16 13:32 ` Guodong Xu
2025-12-16 14:08 ` Heinrich Schuchardt
2025-12-16 14:08 ` Heinrich Schuchardt
2025-12-16 15:07 ` Yixun Lan
2025-12-16 15:07 ` Yixun Lan
2025-12-17 2:06 ` Guodong Xu
2025-12-17 2:06 ` Guodong Xu
2025-12-16 15:16 ` Yixun Lan
2025-12-16 15:16 ` Yixun Lan
2025-12-17 3:38 ` Guodong Xu
2025-12-17 3:38 ` Guodong Xu
2025-12-16 15:33 ` Krzysztof Kozlowski
2025-12-16 15:33 ` Krzysztof Kozlowski
2025-12-17 1:54 ` Guodong Xu
2025-12-17 1:54 ` Guodong Xu
2025-12-16 13:32 ` [PATCH 2/8] dt-bindings: timer: add SpacemiT K3 CLINT Guodong Xu
2025-12-16 13:32 ` Guodong Xu
2025-12-16 16:40 ` Conor Dooley
2025-12-16 16:40 ` Conor Dooley
2025-12-16 13:32 ` [PATCH 3/8] dt-bindings: interrupt-controller: add SpacemiT K3 APLIC Guodong Xu
2025-12-16 13:32 ` Guodong Xu
2025-12-16 16:40 ` Conor Dooley
2025-12-16 16:40 ` Conor Dooley
2025-12-16 13:32 ` [PATCH 4/8] dt-bindings: interrupt-controller: add SpacemiT K3 IMSIC Guodong Xu
2025-12-16 13:32 ` Guodong Xu
2025-12-16 15:33 ` Krzysztof Kozlowski
2025-12-16 15:33 ` Krzysztof Kozlowski
2025-12-17 3:48 ` Guodong Xu
2025-12-17 3:48 ` Guodong Xu
2025-12-16 13:32 ` [PATCH 5/8] dt-bindings: serial: 8250: add SpacemiT K3 UART compatible Guodong Xu
2025-12-16 13:32 ` Guodong Xu
2025-12-16 16:41 ` Conor Dooley
2025-12-16 16:41 ` Conor Dooley
2025-12-16 13:32 ` [PATCH 6/8] dt-bindings: riscv: spacemit: add K3 and Pico-ITX board bindings Guodong Xu
2025-12-16 13:32 ` Guodong Xu
2025-12-16 15:05 ` Yixun Lan
2025-12-16 15:05 ` Yixun Lan
2025-12-16 16:33 ` Conor Dooley
2025-12-16 16:33 ` Conor Dooley
2025-12-17 1:23 ` Guodong Xu
2025-12-17 1:23 ` Guodong Xu
2025-12-16 13:32 ` [PATCH 7/8] riscv: dts: spacemit: add initial device tree of SpacemiT K3 SoC Guodong Xu
2025-12-16 13:32 ` Guodong Xu
2025-12-16 14:24 ` Heinrich Schuchardt
2025-12-16 14:24 ` Heinrich Schuchardt
2025-12-17 7:11 ` Guodong Xu
2025-12-17 7:11 ` Guodong Xu
2025-12-17 8:07 ` Heinrich Schuchardt
2025-12-17 8:07 ` Heinrich Schuchardt
2025-12-18 0:56 ` Conor Dooley
2025-12-18 0:56 ` Conor Dooley
2025-12-19 2:03 ` Guodong Xu
2025-12-19 2:03 ` Guodong Xu
2025-12-19 8:08 ` Heinrich Schuchardt
2025-12-19 8:08 ` Heinrich Schuchardt
2025-12-20 2:48 ` Yao Zi [this message]
2025-12-20 2:48 ` Yao Zi
2025-12-22 9:27 ` Guodong Xu
2025-12-22 9:27 ` Guodong Xu
2025-12-20 23:23 ` Conor Dooley
2025-12-20 23:23 ` Conor Dooley
2025-12-21 0:10 ` Heinrich Schuchardt
2025-12-21 0:10 ` Heinrich Schuchardt
2025-12-22 10:32 ` Guodong Xu
2025-12-22 10:32 ` Guodong Xu
2025-12-22 20:36 ` Conor Dooley
2025-12-22 20:36 ` Conor Dooley
2025-12-26 6:53 ` Guodong Xu
2025-12-26 6:53 ` Guodong Xu
2026-01-01 0:24 ` Conor Dooley
2026-01-01 0:24 ` Conor Dooley
2026-01-08 19:23 ` Samuel Holland
2026-01-08 19:23 ` Samuel Holland
2025-12-16 15:35 ` Krzysztof Kozlowski
2025-12-16 15:35 ` Krzysztof Kozlowski
2025-12-17 5:39 ` Guodong Xu
2025-12-17 5:39 ` Guodong Xu
2025-12-16 13:32 ` [PATCH 8/8] riscv: dts: spacemit: add SpacemiT K3 Pico-ITX board device tree Guodong Xu
2025-12-16 13:32 ` Guodong Xu
2025-12-16 14:33 ` Heinrich Schuchardt
2025-12-16 14:33 ` Heinrich Schuchardt
2025-12-17 7:13 ` Guodong Xu
2025-12-17 7:13 ` Guodong Xu
2025-12-17 9:04 ` Bo Gan
2025-12-17 9:04 ` Bo Gan
2025-12-18 22:43 ` Guodong Xu
2025-12-18 22:43 ` Guodong Xu
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