* [PATCH 2/3] arm64: dts: freescale: Minor whitespace cleanup
2025-12-23 15:26 [PATCH 1/3] arm64: dts: freescale: Use hyphen in node names Krzysztof Kozlowski
@ 2025-12-23 15:26 ` Krzysztof Kozlowski
2025-12-23 15:26 ` [PATCH 3/3] arm64: dts: freescale: Use lowercase hex Krzysztof Kozlowski
2025-12-30 13:12 ` [PATCH 1/3] arm64: dts: freescale: Use hyphen in node names Shawn Guo
2 siblings, 0 replies; 4+ messages in thread
From: Krzysztof Kozlowski @ 2025-12-23 15:26 UTC (permalink / raw)
To: Shawn Guo, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Chester Lin,
Matthias Brugger, Ghennadi Procopciuc, NXP S32 Linux Team,
linux-arm-kernel, devicetree, linux-kernel, imx, linux
Cc: Krzysztof Kozlowski
The DTS code coding style expects exactly one space around '=' and
before '{' characters.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts | 2 +-
.../dts/freescale/imx8mp-hummingboard-pulse-common.dtsi | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi | 6 +++---
arch/arm64/boot/dts/freescale/imx93-var-som.dtsi | 4 ++--
4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts b/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts
index 138f21e257aa..242fa930bd2f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts
@@ -117,7 +117,7 @@ &aud2htx {
};
&easrc {
- fsl,asrc-rate = <48000>;
+ fsl,asrc-rate = <48000>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-common.dtsi
index 825ad6a2ba14..fa7cb9759d01 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-common.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-common.dtsi
@@ -141,7 +141,7 @@ mpcie-reset-hog {
};
&i2c3 {
- carrier_eeprom: eeprom@57{
+ carrier_eeprom: eeprom@57 {
compatible = "st,24c02", "atmel,24c02";
reg = <0x57>;
pagesize = <16>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi
index 4e6629f940bf..3cdb0bc0ab72 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi
@@ -198,7 +198,7 @@ buck2: BUCK2 {
nxp,dvs-standby-voltage = <850000>;
};
- buck4: BUCK4{
+ buck4: BUCK4 {
regulator-name = "BUCK4";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <3400000>;
@@ -206,7 +206,7 @@ buck4: BUCK4{
regulator-always-on;
};
- buck5: BUCK5{
+ buck5: BUCK5 {
regulator-name = "BUCK5";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <3400000>;
@@ -264,7 +264,7 @@ ldo5: LDO5 {
};
};
- som_eeprom: eeprom@50{
+ som_eeprom: eeprom@50 {
compatible = "st,24c01", "atmel,24c01";
reg = <0x50>;
pagesize = <16>;
diff --git a/arch/arm64/boot/dts/freescale/imx93-var-som.dtsi b/arch/arm64/boot/dts/freescale/imx93-var-som.dtsi
index 2dc8b18ae91e..24063bf8183d 100644
--- a/arch/arm64/boot/dts/freescale/imx93-var-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93-var-som.dtsi
@@ -131,7 +131,7 @@ buck2: BUCK2 {
regulator-ramp-delay = <3125>;
};
- buck4: BUCK4{
+ buck4: BUCK4 {
regulator-name = "BUCK4";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <3400000>;
@@ -139,7 +139,7 @@ buck4: BUCK4{
regulator-always-on;
};
- buck5: BUCK5{
+ buck5: BUCK5 {
regulator-name = "BUCK5";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <3400000>;
--
2.51.0
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 3/3] arm64: dts: freescale: Use lowercase hex
2025-12-23 15:26 [PATCH 1/3] arm64: dts: freescale: Use hyphen in node names Krzysztof Kozlowski
2025-12-23 15:26 ` [PATCH 2/3] arm64: dts: freescale: Minor whitespace cleanup Krzysztof Kozlowski
@ 2025-12-23 15:26 ` Krzysztof Kozlowski
2025-12-30 13:12 ` [PATCH 1/3] arm64: dts: freescale: Use hyphen in node names Shawn Guo
2 siblings, 0 replies; 4+ messages in thread
From: Krzysztof Kozlowski @ 2025-12-23 15:26 UTC (permalink / raw)
To: Shawn Guo, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Chester Lin,
Matthias Brugger, Ghennadi Procopciuc, NXP S32 Linux Team,
linux-arm-kernel, devicetree, linux-kernel, imx, linux
Cc: Krzysztof Kozlowski
The DTS code coding style expects lowercase hex for values and unit
addresses.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
.../boot/dts/freescale/fsl-ls1088a-ten64.dts | 4 +--
.../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 2 +-
.../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 2 +-
.../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 32 +++++++++----------
.../dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts | 16 +++++-----
.../dts/freescale/imx8mp-libra-rdk-fpsc.dts | 2 +-
.../freescale/imx8mp-phyboard-pollux-rdk.dts | 2 +-
.../dts/freescale/imx8mp-toradex-smarc.dtsi | 6 ++--
.../imx8mp-tqma8mpql-mba8mp-ras314.dts | 2 +-
.../freescale/imx8mp-tqma8mpql-mba8mpxl.dts | 2 +-
.../dts/freescale/imx8mq-librem5-devkit.dts | 2 +-
.../boot/dts/freescale/imx8mq-librem5.dtsi | 6 ++--
arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 12 +++----
arch/arm64/boot/dts/freescale/imx8qm.dtsi | 4 +--
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 6 ++--
.../boot/dts/freescale/imx8x-colibri.dtsi | 2 +-
.../boot/dts/freescale/imx95-15x15-evk.dts | 2 +-
.../dts/freescale/imx95-toradex-smarc.dtsi | 2 +-
arch/arm64/boot/dts/freescale/s32g3.dtsi | 4 +--
.../boot/dts/freescale/s32gxxxa-evb.dtsi | 20 ++++++------
.../boot/dts/freescale/s32gxxxa-rdb.dtsi | 20 ++++++------
21 files changed, 75 insertions(+), 75 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts
index 71765ec91745..f51508952d51 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts
@@ -392,13 +392,13 @@ partition@800000 {
/* ubia (first OpenWrt) - a/b names to prevent confusion with ubi0/1/etc. */
partition@2800000 {
label = "ubia";
- reg = <0x2800000 0x6C00000>;
+ reg = <0x2800000 0x6c00000>;
};
/* ubib (second OpenWrt) */
partition@9400000 {
label = "ubib";
- reg = <0x9400000 0x6C00000>;
+ reg = <0x9400000 0x6c00000>;
};
};
};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index b2f6cd237be0..99016768b73f 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -684,7 +684,7 @@ smmu: iommu@5000000 {
compatible = "arm,mmu-500";
reg = <0 0x5000000 0 0x800000>;
#iommu-cells = <1>;
- stream-match-mask = <0x7C00>;
+ stream-match-mask = <0x7c00>;
dma-coherent;
#global-interrupts = <12>;
// global secure fault
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index 9421fdd7e30e..6073e426774a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -881,7 +881,7 @@ smmu: iommu@5000000 {
reg = <0 0x5000000 0 0x800000>;
#global-interrupts = <12>;
#iommu-cells = <1>;
- stream-match-mask = <0x7C00>;
+ stream-match-mask = <0x7c00>;
dma-coherent;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, /* global secure fault */
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, /* combined secure interrupt */
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index d899c0355e51..853b01452813 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -35,7 +35,7 @@ cpu0: cpu@0 {
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <192>;
next-level-cache = <&cluster0_l2>;
@@ -52,7 +52,7 @@ cpu1: cpu@1 {
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <192>;
next-level-cache = <&cluster0_l2>;
@@ -69,7 +69,7 @@ cpu100: cpu@100 {
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <192>;
next-level-cache = <&cluster1_l2>;
@@ -86,7 +86,7 @@ cpu101: cpu@101 {
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <192>;
next-level-cache = <&cluster1_l2>;
@@ -103,7 +103,7 @@ cpu200: cpu@200 {
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <192>;
next-level-cache = <&cluster2_l2>;
@@ -120,7 +120,7 @@ cpu201: cpu@201 {
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <192>;
next-level-cache = <&cluster2_l2>;
@@ -137,7 +137,7 @@ cpu300: cpu@300 {
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <192>;
next-level-cache = <&cluster3_l2>;
@@ -154,7 +154,7 @@ cpu301: cpu@301 {
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <192>;
next-level-cache = <&cluster3_l2>;
@@ -171,7 +171,7 @@ cpu400: cpu@400 {
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <192>;
next-level-cache = <&cluster4_l2>;
@@ -188,7 +188,7 @@ cpu401: cpu@401 {
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <192>;
next-level-cache = <&cluster4_l2>;
@@ -205,7 +205,7 @@ cpu500: cpu@500 {
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <192>;
next-level-cache = <&cluster5_l2>;
@@ -222,7 +222,7 @@ cpu501: cpu@501 {
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <192>;
next-level-cache = <&cluster5_l2>;
@@ -239,7 +239,7 @@ cpu600: cpu@600 {
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <192>;
next-level-cache = <&cluster6_l2>;
@@ -256,7 +256,7 @@ cpu601: cpu@601 {
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <192>;
next-level-cache = <&cluster6_l2>;
@@ -273,7 +273,7 @@ cpu700: cpu@700 {
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <192>;
next-level-cache = <&cluster7_l2>;
@@ -290,7 +290,7 @@ cpu701: cpu@701 {
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <192>;
next-level-cache = <&cluster7_l2>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts b/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts
index d7f7f9aafb7d..54b6f04645f4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts
@@ -143,23 +143,23 @@ pinctrl_gpioled: gpioledgrp {
};
pinctrl_i2c2: i2c2grp {
- fsl,pins = <MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001C4>,
- <MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001C4>;
+ fsl,pins = <MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c4>,
+ <MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c4>;
};
pinctrl_i2c2_gpio: i2c2gpiogrp {
- fsl,pins = <MX8MN_IOMUXC_I2C2_SCL_GPIO5_IO16 0x400001C4>,
- <MX8MN_IOMUXC_I2C2_SDA_GPIO5_IO17 0x400001C4>;
+ fsl,pins = <MX8MN_IOMUXC_I2C2_SCL_GPIO5_IO16 0x400001c4>,
+ <MX8MN_IOMUXC_I2C2_SDA_GPIO5_IO17 0x400001c4>;
};
pinctrl_i2c3: i2c3grp {
- fsl,pins = <MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001C4>,
- <MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001C4>;
+ fsl,pins = <MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c4>,
+ <MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c4>;
};
pinctrl_i2c3_gpio: i2c3gpiogrp {
- fsl,pins = <MX8MN_IOMUXC_I2C3_SCL_GPIO5_IO18 0x400001C4>,
- <MX8MN_IOMUXC_I2C3_SDA_GPIO5_IO19 0x400001C4>;
+ fsl,pins = <MX8MN_IOMUXC_I2C3_SCL_GPIO5_IO18 0x400001c4>,
+ <MX8MN_IOMUXC_I2C3_SDA_GPIO5_IO19 0x400001c4>;
};
pinctrl_pwm3: pwm3grp {
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts
index 6f3a7b863dca..3f5734abf6f1 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts
@@ -226,7 +226,7 @@ MX8MP_IOMUXC_UART1_TXD__GPIO5_IO23 0x12
};
pinctrl_rtc: rtcgrp {
fsl,pins = <
- MX8MP_IOMUXC_UART2_TXD__GPIO5_IO25 0x1C0
+ MX8MP_IOMUXC_UART2_TXD__GPIO5_IO25 0x1c0
>;
};
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
index 9687b4ded8f4..ed29e3b88415 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
@@ -470,7 +470,7 @@ MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
pinctrl_rtc: rtcgrp {
fsl,pins = <
- MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x1C0
+ MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x1c0
>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi
index bebe19eb360f..0348da385f23 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi
@@ -1044,7 +1044,7 @@ pinctrl_lvds_dsi_sel: lvdsdsiselgrp {
};
pinctrl_mcu_int: mcuintgrp {
- fsl,pins = <MX8MP_IOMUXC_NAND_DATA02__GPIO3_IO08 0x1C0>; /* MCU_INT# */
+ fsl,pins = <MX8MP_IOMUXC_NAND_DATA02__GPIO3_IO08 0x1c0>; /* MCU_INT# */
};
/* SMARC LCD1_BKLT_PWM */
@@ -1096,12 +1096,12 @@ pinctrl_sai3: sai3grp {
/* SMARC SLEEP# */
pinctrl_sleep: sleepgrp {
- fsl,pins = <MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01 0x1C0>; /* SMARC S149 - SLEEP# */
+ fsl,pins = <MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01 0x1c0>; /* SMARC S149 - SLEEP# */
};
/* SMARC SMB_ALERT# */
pinctrl_smb_alert: smbalertgrp {
- fsl,pins = <MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x1C0>; /* SMARC P1 - SMB_ALERT# */
+ fsl,pins = <MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x1c0>; /* SMARC P1 - SMB_ALERT# */
};
/* TPM_CS# */
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts
index f7346b3d35fe..d5881ee0fe78 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts
@@ -134,7 +134,7 @@ linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0 0x38000000>;
- alloc-ranges = <0 0x40000000 0 0xB0000000>;
+ alloc-ranges = <0 0x40000000 0 0xb0000000>;
linux,cma-default;
};
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
index 59642a8a2c44..ae1f1ec77c14 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
@@ -227,7 +227,7 @@ linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0 0x38000000>;
- alloc-ranges = <0 0x40000000 0 0xB0000000>;
+ alloc-ranges = <0 0x40000000 0 0xb0000000>;
linux,cma-default;
};
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
index d9f203c79519..aadaeef928bd 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
@@ -633,7 +633,7 @@ MX8MQ_IOMUXC_SPDIF_RX_GPIO5_IO4 0xc6 /* nHAPTIC */
pinctrl_hpdet: hpdetgrp {
fsl,pins = <
- MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0xC0 /* HP_DET */
+ MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0xc0 /* HP_DET */
>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
index 9e0e2d7271ef..2975e9451661 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
@@ -536,9 +536,9 @@ MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000026
pinctrl_keys: keysgrp {
fsl,pins = <
/* VOL- */
- MX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17 0x01C0
+ MX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17 0x01c0
/* VOL+ */
- MX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16 0x01C0
+ MX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16 0x01c0
>;
};
@@ -620,7 +620,7 @@ MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0 0xd6
pinctrl_tcpc: tcpcgrp {
fsl,pins = <
/* TCPC_INT */
- MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x01C0
+ MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x01c0
>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index 779d9f78fb81..7d4574c6de1d 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -1214,17 +1214,17 @@ IMX8QM_LVDS1_I2C1_SDA_LVDS1_I2C1_SDA 0xc600004c
pinctrl_mipi_csi0: mipi-csi0grp {
fsl,pins = <
- IMX8QM_MIPI_CSI0_GPIO0_00_LSIO_GPIO1_IO27 0xC0000041
- IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_IO28 0xC0000041
- IMX8QM_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT 0xC0000041
+ IMX8QM_MIPI_CSI0_GPIO0_00_LSIO_GPIO1_IO27 0xc0000041
+ IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_IO28 0xc0000041
+ IMX8QM_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT 0xc0000041
>;
};
pinctrl_mipi_csi1: mipi-csi1grp {
fsl,pins = <
- IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30 0xC0000041
- IMX8QM_MIPI_CSI1_GPIO0_01_LSIO_GPIO1_IO31 0xC0000041
- IMX8QM_MIPI_CSI1_MCLK_OUT_MIPI_CSI1_ACM_MCLK_OUT 0xC0000041
+ IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30 0xc0000041
+ IMX8QM_MIPI_CSI1_GPIO0_01_LSIO_GPIO1_IO31 0xc0000041
+ IMX8QM_MIPI_CSI1_MCLK_OUT_MIPI_CSI1_ACM_MCLK_OUT 0xc0000041
>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
index cb66853b1cd3..c0a869c88098 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
@@ -137,7 +137,7 @@ A72_0: cpu@100 {
reg = <0x0 0x100>;
clocks = <&clk IMX_SC_R_A72 IMX_SC_PM_CLK_CPU>;
enable-method = "psci";
- i-cache-size = <0xC000>;
+ i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
d-cache-size = <0x8000>;
@@ -241,7 +241,7 @@ opp-1596000000 {
gic: interrupt-controller@51a00000 {
compatible = "arm,gic-v3";
reg = <0x0 0x51a00000 0 0x10000>, /* GIC Dist */
- <0x0 0x51b00000 0 0xC0000>, /* GICR */
+ <0x0 0x51b00000 0 0xc0000>, /* GICR */
<0x0 0x52000000 0 0x2000>, /* GICC */
<0x0 0x52010000 0 0x1000>, /* GICH */
<0x0 0x52020000 0 0x20000>; /* GICV */
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index 523f48896b6b..90b02fa3c949 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -1030,9 +1030,9 @@ IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0x06000020
pinctrl_mipi_csi0: mipi-csi0grp {
fsl,pins = <
- IMX8QXP_MIPI_CSI0_GPIO0_01_LSIO_GPIO3_IO07 0xC0000041
- IMX8QXP_MIPI_CSI0_GPIO0_00_LSIO_GPIO3_IO08 0xC0000041
- IMX8QXP_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT 0xC0000041
+ IMX8QXP_MIPI_CSI0_GPIO0_01_LSIO_GPIO3_IO07 0xc0000041
+ IMX8QXP_MIPI_CSI0_GPIO0_00_LSIO_GPIO3_IO08 0xc0000041
+ IMX8QXP_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT 0xc0000041
>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
index 8e9e841cc828..014808774b0e 100644
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
@@ -623,7 +623,7 @@ pinctrl_csi_ctl: csictlgrp {
};
pinctrl_csi_mclk: csimclkgrp {
- fsl,pins = <IMX8QXP_CSI_MCLK_CI_PI_MCLK 0xC0000041>; /* SODIMM 75 / X3-12 */
+ fsl,pins = <IMX8QXP_CSI_MCLK_CI_PI_MCLK 0xc0000041>; /* SODIMM 75 / X3-12 */
};
pinctrl_ext_io0: extio0grp {
diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
index ff720c139a7e..b12687d87920 100644
--- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
@@ -179,7 +179,7 @@ reserved-memory {
linux_cma: linux,cma {
compatible = "shared-dma-pool";
- alloc-ranges = <0 0x80000000 0 0x7F000000>;
+ alloc-ranges = <0 0x80000000 0 0x7f000000>;
reusable;
size = <0 0x3c000000>;
linux,cma-default;
diff --git a/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi b/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi
index afbdadcb3686..a0752f21edf9 100644
--- a/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi
@@ -153,7 +153,7 @@ linux_cma: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0 0x3c000000>;
- alloc-ranges = <0 0x80000000 0 0x7F000000>;
+ alloc-ranges = <0 0x80000000 0 0x7f000000>;
linux,cma-default;
};
};
diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
index eff7673e7f34..e314f3c7d61d 100644
--- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
@@ -641,9 +641,9 @@ swt6: watchdog@40208000 {
status = "disabled";
};
- swt7: watchdog@4020C000 {
+ swt7: watchdog@4020c000 {
compatible = "nxp,s32g3-swt", "nxp,s32g2-swt";
- reg = <0x4020C000 0x1000>;
+ reg = <0x4020c000 0x1000>;
clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>;
clock-names = "counter", "module", "register";
status = "disabled";
diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi
index f1969cdcef19..803ff4531077 100644
--- a/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi
@@ -197,16 +197,16 @@ dspi1-grp2 {
};
dspi1-grp3 {
- pinmux = <0x5F0>;
+ pinmux = <0x5f0>;
input-enable;
slew-rate = <150>;
bias-pull-up;
};
dspi1-grp4 {
- pinmux = <0x3D92>,
- <0x3DA2>,
- <0x3DB2>;
+ pinmux = <0x3d92>,
+ <0x3da2>,
+ <0x3db2>;
};
};
@@ -219,26 +219,26 @@ dspi5-grp0 {
};
dspi5-grp1 {
- pinmux = <0xA0>;
+ pinmux = <0xa0>;
input-enable;
slew-rate = <150>;
bias-pull-up;
};
dspi5-grp2 {
- pinmux = <0x3ED2>,
- <0x3EE2>,
- <0x3EF2>;
+ pinmux = <0x3ed2>,
+ <0x3ee2>,
+ <0x3ef2>;
};
dspi5-grp3 {
- pinmux = <0xB3>;
+ pinmux = <0xb3>;
output-enable;
slew-rate = <150>;
};
dspi5-grp4 {
- pinmux = <0xC3>;
+ pinmux = <0xc3>;
output-enable;
input-enable;
slew-rate = <150>;
diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi
index 3bc3335c9248..979868f6d2c5 100644
--- a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi
@@ -151,16 +151,16 @@ dspi1-grp2 {
};
dspi1-grp3 {
- pinmux = <0x5F0>;
+ pinmux = <0x5f0>;
input-enable;
slew-rate = <150>;
bias-pull-up;
};
dspi1-grp4 {
- pinmux = <0x3D92>,
- <0x3DA2>,
- <0x3DB2>;
+ pinmux = <0x3d92>,
+ <0x3da2>,
+ <0x3db2>;
};
};
@@ -173,26 +173,26 @@ dspi5-grp0 {
};
dspi5-grp1 {
- pinmux = <0xA0>;
+ pinmux = <0xa0>;
input-enable;
slew-rate = <150>;
bias-pull-up;
};
dspi5-grp2 {
- pinmux = <0x3ED2>,
- <0x3EE2>,
- <0x3EF2>;
+ pinmux = <0x3ed2>,
+ <0x3ee2>,
+ <0x3ef2>;
};
dspi5-grp3 {
- pinmux = <0xB3>;
+ pinmux = <0xb3>;
output-enable;
slew-rate = <150>;
};
dspi5-grp4 {
- pinmux = <0xC3>;
+ pinmux = <0xc3>;
output-enable;
input-enable;
slew-rate = <150>;
--
2.51.0
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