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[PATCH v2 0/4] Enable Secure TSC for SEV-SNP

[Nikunj A Dadhania]

The hypervisor controls TSC value calculations for the guest. A malicious
hypervisor can prevent the guest from progressing. The Secure TSC feature for
SEV-SNP allows guests to securely use the RDTSC and RDTSCP instructions. This
ensures the guest has a consistent view of time and prevents a malicious
hypervisor from manipulating time, such as making it appear to move backward or
advance too quickly. For more details, refer to the "Secure Nested Paging
(SEV-SNP)" section, subsection "Secure TSC" in APM Volume 2.

This patchset is also available at:

  https://github.com/AMDESE/linux-kvm/tree/sectsc-host-latest

and is based on kvm/next

Testing SecureTSC
-----------------

SecureTSC guest patches are available as part of v6.14-rc1.

QEMU changes:
https://github.com/nikunjad/qemu/tree/snp-securetsc-latest

QEMU commandline SEV-SNP with SecureTSC:

  qemu-system-x86_64 -cpu EPYC-Milan-v2 -smp 4 \
    -object memory-backend-memfd,id=ram1,size=1G,share=true,prealloc=false,reserve=false \
    -object sev-snp-guest,id=sev0,cbitpos=51,reduced-phys-bits=1,secure-tsc=on,stsc-freq=2000000000 \
    -machine q35,confidential-guest-support=sev0,memory-backend=ram1 \
    ...

Changelog:
----------
v2:
* Address cpufeatures comment from Boris
* Squashed Secure TSC enablement and setting frequency patch
* Set the default TSC KHz for proper calulation of guest offset/multiplier

Ketan Chaturvedi (1):
  KVM: SVM: Enable Secure TSC for SNP guests

Nikunj A Dadhania (3):
  x86/cpufeatures: Add SNP Secure TSC
  KVM: SVM: Add GUEST_TSC_FREQ MSR for Secure TSC enabled guests
  KVM: SVM: Prevent writes to TSC MSR when Secure TSC is enabled

 arch/x86/include/asm/cpufeatures.h |  1 +
 arch/x86/include/asm/svm.h         |  1 +
 arch/x86/include/uapi/asm/kvm.h    |  3 ++-
 arch/x86/kvm/svm/sev.c             | 22 ++++++++++++++++++++++
 arch/x86/kvm/svm/svm.c             | 12 ++++++++++++
 arch/x86/kvm/svm/svm.h             | 14 +++++++++++++-
 include/linux/psp-sev.h            |  2 ++
 7 files changed, 53 insertions(+), 2 deletions(-)


base-commit: 43fb96ae78551d7bfa4ecca956b258f085d67c40
-- 
2.43.0

[PATCH v2 3/4] KVM: SVM: Prevent writes to TSC MSR when Secure TSC is enabled

[Nikunj A Dadhania]

Disallow writes to MSR_IA32_TSC for Secure TSC enabled SNP guests, as such
writes are not expected. Log the error and return #GP to the guest.

Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
---
 arch/x86/kvm/svm/svm.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index d7a0428aa2ae..929f35a2f542 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -3161,6 +3161,17 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 
 		svm->tsc_aux = data;
 		break;
+	case MSR_IA32_TSC:
+		/*
+		 * If Secure TSC is enabled, KVM doesn't expect to receive
+		 * a VMEXIT for a TSC write, record the error and return a
+		 * #GP
+		 */
+		if (vcpu->arch.guest_state_protected && snp_secure_tsc_enabled(vcpu->kvm)) {
+			vcpu_unimpl(vcpu, "unimplemented IA32_TSC for secure tsc\n");
+			return 1;
+		}
+		break;
 	case MSR_IA32_DEBUGCTLMSR:
 		if (!lbrv) {
 			kvm_pr_unimpl_wrmsr(vcpu, ecx, data);
-- 
2.43.0

Re: [PATCH v2 3/4] KVM: SVM: Prevent writes to TSC MSR when Secure TSC is enabled

[Tom Lendacky]

On 2/10/25 03:22, Nikunj A Dadhania wrote:
> Disallow writes to MSR_IA32_TSC for Secure TSC enabled SNP guests, as such
> writes are not expected. Log the error and return #GP to the guest.

Re-word this to make it a bit clearer about why this is needed. It is
expected that the guest won't write to MSR_IA32_TSC or, if it does, it
will ignore any writes to it and not exit to the HV. So this is catching
the case where that behavior is not occurring.

> 
> Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
> ---
>  arch/x86/kvm/svm/svm.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
> index d7a0428aa2ae..929f35a2f542 100644
> --- a/arch/x86/kvm/svm/svm.c
> +++ b/arch/x86/kvm/svm/svm.c
> @@ -3161,6 +3161,17 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
>  
>  		svm->tsc_aux = data;
>  		break;
> +	case MSR_IA32_TSC:
> +		/*
> +		 * If Secure TSC is enabled, KVM doesn't expect to receive
> +		 * a VMEXIT for a TSC write, record the error and return a
> +		 * #GP
> +		 */
> +		if (vcpu->arch.guest_state_protected && snp_secure_tsc_enabled(vcpu->kvm)) {

Does it matter if the VMSA has already been encrypted? Can this just be

  if (sev_snp_guest() && snp_secure_tsc_enabled(vcpu->kvm)) {

?

> +			vcpu_unimpl(vcpu, "unimplemented IA32_TSC for secure tsc\n");
> +			return 1;
> +		}
> +		break;
>  	case MSR_IA32_DEBUGCTLMSR:
>  		if (!lbrv) {
>  			kvm_pr_unimpl_wrmsr(vcpu, ecx, data);

Re: [PATCH v2 3/4] KVM: SVM: Prevent writes to TSC MSR when Secure TSC is enabled

[Sean Christopherson]

On Mon, Feb 10, 2025, Tom Lendacky wrote:
> On 2/10/25 03:22, Nikunj A Dadhania wrote:
> > Disallow writes to MSR_IA32_TSC for Secure TSC enabled SNP guests, as such
> > writes are not expected. Log the error and return #GP to the guest.
> 
> Re-word this to make it a bit clearer about why this is needed. It is
> expected that the guest won't write to MSR_IA32_TSC or, if it does, it
> will ignore any writes to it and not exit to the HV. So this is catching
> the case where that behavior is not occurring.

Unless it's architectural impossible for KVM to modify MSR_IA32_TSC, I don't see
any reason for KVM to care.  If the guest wants to modify TSC, that's the guest's
prerogative.

If KVM _can't_ honor the write, then that's something else entirely, and the
changelog should pretty much write itself.

Re: [PATCH v2 3/4] KVM: SVM: Prevent writes to TSC MSR when Secure TSC is enabled

[Nikunj A Dadhania]

Sean Christopherson <seanjc@google.com> writes:

> On Mon, Feb 10, 2025, Tom Lendacky wrote:
>> On 2/10/25 03:22, Nikunj A Dadhania wrote:
>> > Disallow writes to MSR_IA32_TSC for Secure TSC enabled SNP guests, as such
>> > writes are not expected. Log the error and return #GP to the guest.
>> 
>> Re-word this to make it a bit clearer about why this is needed. It is
>> expected that the guest won't write to MSR_IA32_TSC or, if it does, it
>> will ignore any writes to it and not exit to the HV. So this is catching
>> the case where that behavior is not occurring.
>
> Unless it's architectural impossible for KVM to modify MSR_IA32_TSC, I don't see
> any reason for KVM to care.  If the guest wants to modify TSC, that's the guest's
> prerogative.
>
> If KVM _can't_ honor the write, then that's something else entirely, and the
> changelog should pretty much write itself.

How about the below changelog:

    KVM: SVM: Prevent writes to TSC MSR when Secure TSC is enabled

    Secure TSC enabled SNP guests should not write to the TSC MSR. Any such
    writes should be identified and ignored by the guest kernel in the #VC
    handler. As a safety measure, detect and disallow writes to MSR_IA32_TSC by
    Secure TSC enabled guests, as these writes are not expected to reach the
    hypervisor. Log the error and return #GP to the guest.

    Additionally, incorporate a check for protected guest state to allow the
    VMM to initialize the TSC MSR.

Regards,
Nikunj

Re: [PATCH v2 3/4] KVM: SVM: Prevent writes to TSC MSR when Secure TSC is enabled

[Sean Christopherson]

On Wed, Feb 12, 2025, Nikunj A Dadhania wrote:
> Sean Christopherson <seanjc@google.com> writes:
> 
> > On Mon, Feb 10, 2025, Tom Lendacky wrote:
> >> On 2/10/25 03:22, Nikunj A Dadhania wrote:
> >> > Disallow writes to MSR_IA32_TSC for Secure TSC enabled SNP guests, as such
> >> > writes are not expected. Log the error and return #GP to the guest.
> >> 
> >> Re-word this to make it a bit clearer about why this is needed. It is
> >> expected that the guest won't write to MSR_IA32_TSC or, if it does, it
> >> will ignore any writes to it and not exit to the HV. So this is catching
> >> the case where that behavior is not occurring.
> >
> > Unless it's architectural impossible for KVM to modify MSR_IA32_TSC, I don't see
> > any reason for KVM to care.  If the guest wants to modify TSC, that's the guest's
> > prerogative.
> >
> > If KVM _can't_ honor the write, then that's something else entirely, and the
> > changelog should pretty much write itself.
> 
> How about the below changelog:
> 
>     KVM: SVM: Prevent writes to TSC MSR when Secure TSC is enabled
> 
>     Secure TSC enabled SNP guests should not write to the TSC MSR. Any such

This is a host write, not a guest write.  What guest's "should" or should not do
is irrelevant.

>     writes should be identified and ignored by the guest kernel in the #VC

Again, I don't care what the guest does.  Talking about #VC just adds noise.
E.g. if the guest requests WRMSR emulation without ever doing WRMSR, there will
be no #VC.

>     handler. As a safety measure, detect and disallow writes to MSR_IA32_TSC by

No, KVM is not the trusted monitor.  "safety measure" makes it sound like KVM is
protecting the guest from a malicious VMM.  That is not KVM's responsibility.

>     Secure TSC enabled guests, as these writes are not expected to reach the
>     hypervisor. Log the error and return #GP to the guest.

Again, none of this ever says what actually happens if KVM tries to emulate a
write to MSR_IA32_TSC.  Based on what the APM says, the TSC fields in the control
area are ignored.  _That's_ what's relevant.

  The TSC value is first scaled with the GUEST_TSC_SCALE value from the VMSA and
  then is added to the VMSA GUEST_TSC_OFFSET value. The P0 frequency, TSC_RATIO
  (C001_0104h) and TSC_OFFSET (VMCB offset 50h) values are not used in the calculation.

Re: [PATCH v2 3/4] KVM: SVM: Prevent writes to TSC MSR when Secure TSC is enabled

[Nikunj A. Dadhania]

On 2/12/2025 7:34 PM, Sean Christopherson wrote:
> On Wed, Feb 12, 2025, Nikunj A Dadhania wrote:
>> Sean Christopherson <seanjc@google.com> writes:
>>     Secure TSC enabled guests, as these writes are not expected to reach the
>>     hypervisor. Log the error and return #GP to the guest.
> 
> Again, none of this ever says what actually happens if KVM tries to emulate a
> write to MSR_IA32_TSC.  Based on what the APM says, the TSC fields in the control
> area are ignored.  _That's_ what's relevant.
> >   The TSC value is first scaled with the GUEST_TSC_SCALE value from the VMSA and
>   then is added to the VMSA GUEST_TSC_OFFSET value. The P0 frequency, TSC_RATIO
>   (C001_0104h) and TSC_OFFSET (VMCB offset 50h) values are not used in the calculation.

Sure, I will update the commit.

Thanks,
Nikunj

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From: sj@kernel.org

Hi Bhagyashri,

On Thu, 3 Oct 2024 05:13:55 -0700 Bhagyashri Pathak <bhapathak@linux.microsoft.com> wrote:

> subscribe

I'm sorry but it is not easy to understand your real intention of this mail.
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Re: subscribe

[Piyush Thange]

On 03/10/24 21:30, SeongJae Park wrote:
> From: sj@kernel.org
> 
> Hi Bhagyashri,
> 
> On Thu, 3 Oct 2024 05:13:55 -0700 Bhagyashri Pathak <bhapathak@linux.microsoft.com> wrote:
> 
>> subscribe
> 
> I'm sorry but it is not easy to understand your real intention of this mail.
> But I guess you might wanted to subscribe to DAMON mailing list, following some
> deprecated mailing list control instructions?  If so, thank you for showing
> your interest, and welcome to DAMON community!
> 
> Nonetheless, this email wouldn't make you be subscribed to DAMON mailing list,
> to my understanding.  You could make the subscription following instructions on
> https://subspace.kernel.org/subscribing.html
> 
> In short, send any mail to damon+subscribe@lists.linux.dev
> 
> Pleae let me know if you have anyquestion.
> 
> 
> Thanks,
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> 

My bad, the mail just went to SJ. I'm writing it again.

Hello Bhagyashri, as I would suggest one more as follows

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Re: subscribe

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On Tue, Oct 01, 2024 at 04:57:11PM -0700, Leah Rumancik wrote:
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Re: subscribe

[Leah Rumancik]

Oopsies, silly me. Sorry for the noise :)

On Tue, Oct 1, 2024 at 5:05 PM Keith Busch <kbusch@kernel.org> wrote:
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> On Tue, Oct 01, 2024 at 04:57:11PM -0700, Leah Rumancik wrote:
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Re: subscribe

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Hi Yeo Reum,

On Thu, 26 Sep 2024 21:18:37 +0000 Yeo Reum Yun <YeoReum.Yun@arm.com> wrote:

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On Wed, Jul 12, 2023 at 04:08:38PM +0000, emile.stephan@orange.com wrote:
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[Matthew Bobrowski]

On Wed, Aug 28, 2019 at 08:44:02PM +1000, Matthew Bobrowski wrote:
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"Sud, Shivani A" <shivani.a.sud@intel.com> writes:
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