From: Zhao Liu <zhao1.liu@intel.com>
To: Ewan Hai <ewanhai-oc@zhaoxin.com>
Cc: pbonzini@redhat.com, qemu-devel@nongnu.org, ewanhai@zhaoxin.com,
cobechen@zhaoxin.com
Subject: Re: [PATCH v3 2/3] target/i386: Introduce Zhaoxin Shijidadao CPU model
Date: Wed, 21 Jan 2026 21:27:01 +0800 [thread overview]
Message-ID: <aXDUJdDp/ja9PXkJ@intel.com> (raw)
In-Reply-To: <20260109021028.83985-3-ewanhai-oc@zhaoxin.com>
On Thu, Jan 08, 2026 at 09:10:27PM -0500, Ewan Hai wrote:
> Date: Thu, 8 Jan 2026 21:10:27 -0500
> From: Ewan Hai <ewanhai-oc@zhaoxin.com>
> Subject: [PATCH v3 2/3] target/i386: Introduce Zhaoxin Shijidadao CPU model
> X-Mailer: git-send-email 2.34.1
>
> Introduce the Zhaoxin Shijidadao CPU model with two versions:
>
> - v1 (alias: Shijidadao-Server) - Server variant with CORE_CAPABILITY
> and SPLIT_LOCK_DETECT support
> - v2 (alias: Shijidadao-Client) - Client variant with different FMS
> (model=0x6b, stepping=1) and without CORE_CAPABILITY features
>
> The model_id for both variants is 'Zhaoxin Shijidadao Processor'.
>
> Signed-off-by: Ewan Hai <ewanhai-oc@zhaoxin.com>
> ---
> target/i386/cpu.c | 149 ++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 149 insertions(+)
LGTM,
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
next prev parent reply other threads:[~2026-01-21 13:02 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-09 2:10 [PATCH v3 0/3] target/i386: Add support for Zhaoxin Shijidadao vCPU model Ewan Hai
2026-01-09 2:10 ` [PATCH v3 1/3] target/i386: Add cache model for Zhaoxin Shijidadao vCPUs Ewan Hai
2026-01-21 13:26 ` Zhao Liu
2026-01-09 2:10 ` [PATCH v3 2/3] target/i386: Introduce Zhaoxin Shijidadao CPU model Ewan Hai
2026-01-21 13:27 ` Zhao Liu [this message]
2026-01-09 2:10 ` [PATCH v3 3/3] target/i386: Fix FEAT_C000_0001_EDX comment in Yongfeng model Ewan Hai
2026-01-21 13:29 ` Zhao Liu
2026-02-07 13:44 ` Paolo Bonzini
2026-02-09 8:15 ` Ewan Hai
2026-02-09 8:48 ` Paolo Bonzini
2026-02-09 9:03 ` Ewan Hai
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