Re: [PATCH v3 3/3] target/i386: Fix FEAT_C000_0001_EDX comment in Yongfeng model

[Zhao Liu <zhao1.liu@intel.com>]

On Thu, Jan 08, 2026 at 09:10:28PM -0500, Ewan Hai wrote:
> Date: Thu, 8 Jan 2026 21:10:28 -0500
> From: Ewan Hai <ewanhai-oc@zhaoxin.com>
> Subject: [PATCH v3 3/3] target/i386: Fix FEAT_C000_0001_EDX comment in
>  Yongfeng model
> X-Mailer: git-send-email 2.34.1
> 
> Update the comment for FEAT_C000_0001_EDX in YongFeng CPU model to
> accurately list the missing features instead of the generic TODO message.
> 
> As background, current Zhaoxin CPUs implement several CPUID.(EAX=0xC0000001,
> ECX=0):EDX feature bits that are not yet defined in the Linux kernel, for
> example SM2/SM2_EN, SM3/SM4 and their enable bits, PARALLAX/PARALLAX_EN,
> TM3/TM3_EN, RNG2/RNG2_EN, PHE2/PHE2_EN, and RSA/RSA_EN.
> 
> We previously tried to upstream all these extra feature bits in one patch
> (https://lore.kernel.org/all/20230414095334.8743-1-TonyWWang-oc@zhaoxin.com/),
> but the maintainer rejected it because there was no in-tree code using these
> features yet. So our current plan is to add the CPUID bits together with real
> kernel users step by step, Once full or partial in-tree implementations of
> these features are merged, we will update these definitions accordingly and
> potentially introduce corresponding support in QEMU.
> 
> Signed-off-by: Ewan Hai <ewanhai-oc@zhaoxin.com>
> ---
>  target/i386/cpu.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Good cleanup,

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>