[PATCH] drm/xe/reg_sr: Fix leak on xa

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* [PATCH] drm/xe/reg_sr: Fix leak on xa_store failure
@ 2026-02-03 17:36 Shuicheng Lin
  2026-02-03 18:09 ` ✓ CI.KUnit: success for " Patchwork
                   ` (5 more replies)
  0 siblings, 6 replies; 10+ messages in thread
From: Shuicheng Lin @ 2026-02-03 17:36 UTC (permalink / raw)
  To: intel-xe; +Cc: Shuicheng Lin, Matt Roper

Free the newly allocated entry when xa_store() fails to avoid a memory
leak on the error path.

Fixes: e5283bd4dfec ("drm/xe/reg_sr: Remove register pool")
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com>
---
 drivers/gpu/drm/xe/xe_reg_sr.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c
index d3e13ea33123..ce3dab8a0f47 100644
--- a/drivers/gpu/drm/xe/xe_reg_sr.c
+++ b/drivers/gpu/drm/xe/xe_reg_sr.c
@@ -74,6 +74,7 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
 {
 	unsigned long idx = e->reg.addr;
 	struct xe_reg_sr_entry *pentry = xa_load(&sr->xa, idx);
+	bool allocated = false;
 	int ret;
 
 	if (pentry) {
@@ -94,6 +95,7 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
 		ret = -ENOMEM;
 		goto fail;
 	}
+	allocated = true;
 
 	*pentry = *e;
 	ret = xa_err(xa_store(&sr->xa, idx, pentry, GFP_KERNEL));
@@ -103,6 +105,8 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
 	return 0;
 
 fail:
+	if (allocated)
+		kfree(pentry);
 	xe_gt_err(gt,
 		  "discarding save-restore reg %04lx (clear: %08x, set: %08x, masked: %s, mcr: %s): ret=%d\n",
 		  idx, e->clr_bits, e->set_bits,
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* ✓ CI.KUnit: success for drm/xe/reg_sr: Fix leak on xa_store failure
  2026-02-03 17:36 [PATCH] drm/xe/reg_sr: Fix leak on xa_store failure Shuicheng Lin
@ 2026-02-03 18:09 ` Patchwork
  2026-02-03 19:00 ` ✗ Xe.CI.BAT: failure " Patchwork
                   ` (4 subsequent siblings)
  5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-02-03 18:09 UTC (permalink / raw)
  To: Lin, Shuicheng; +Cc: intel-xe

== Series Details ==

Series: drm/xe/reg_sr: Fix leak on xa_store failure
URL   : https://patchwork.freedesktop.org/series/161102/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[18:08:01] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:08:06] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:08:38] Starting KUnit Kernel (1/1)...
[18:08:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:08:38] ================== guc_buf (11 subtests) ===================
[18:08:38] [PASSED] test_smallest
[18:08:38] [PASSED] test_largest
[18:08:38] [PASSED] test_granular
[18:08:38] [PASSED] test_unique
[18:08:38] [PASSED] test_overlap
[18:08:38] [PASSED] test_reusable
[18:08:38] [PASSED] test_too_big
[18:08:38] [PASSED] test_flush
[18:08:38] [PASSED] test_lookup
[18:08:38] [PASSED] test_data
[18:08:38] [PASSED] test_class
[18:08:38] ===================== [PASSED] guc_buf =====================
[18:08:38] =================== guc_dbm (7 subtests) ===================
[18:08:38] [PASSED] test_empty
[18:08:38] [PASSED] test_default
[18:08:38] ======================== test_size  ========================
[18:08:38] [PASSED] 4
[18:08:38] [PASSED] 8
[18:08:38] [PASSED] 32
[18:08:38] [PASSED] 256
[18:08:38] ==================== [PASSED] test_size ====================
[18:08:38] ======================= test_reuse  ========================
[18:08:38] [PASSED] 4
[18:08:38] [PASSED] 8
[18:08:38] [PASSED] 32
[18:08:38] [PASSED] 256
[18:08:38] =================== [PASSED] test_reuse ====================
[18:08:38] =================== test_range_overlap  ====================
[18:08:38] [PASSED] 4
[18:08:38] [PASSED] 8
[18:08:38] [PASSED] 32
[18:08:38] [PASSED] 256
[18:08:38] =============== [PASSED] test_range_overlap ================
[18:08:38] =================== test_range_compact  ====================
[18:08:38] [PASSED] 4
[18:08:38] [PASSED] 8
[18:08:38] [PASSED] 32
[18:08:38] [PASSED] 256
[18:08:38] =============== [PASSED] test_range_compact ================
[18:08:38] ==================== test_range_spare  =====================
[18:08:38] [PASSED] 4
[18:08:38] [PASSED] 8
[18:08:38] [PASSED] 32
[18:08:38] [PASSED] 256
[18:08:38] ================ [PASSED] test_range_spare =================
[18:08:38] ===================== [PASSED] guc_dbm =====================
[18:08:38] =================== guc_idm (6 subtests) ===================
[18:08:38] [PASSED] bad_init
[18:08:38] [PASSED] no_init
[18:08:38] [PASSED] init_fini
[18:08:38] [PASSED] check_used
[18:08:38] [PASSED] check_quota
[18:08:38] [PASSED] check_all
[18:08:38] ===================== [PASSED] guc_idm =====================
[18:08:38] ================== no_relay (3 subtests) ===================
[18:08:38] [PASSED] xe_drops_guc2pf_if_not_ready
[18:08:38] [PASSED] xe_drops_guc2vf_if_not_ready
[18:08:38] [PASSED] xe_rejects_send_if_not_ready
[18:08:38] ==================== [PASSED] no_relay =====================
[18:08:38] ================== pf_relay (14 subtests) ==================
[18:08:38] [PASSED] pf_rejects_guc2pf_too_short
[18:08:38] [PASSED] pf_rejects_guc2pf_too_long
[18:08:38] [PASSED] pf_rejects_guc2pf_no_payload
[18:08:38] [PASSED] pf_fails_no_payload
[18:08:38] [PASSED] pf_fails_bad_origin
[18:08:38] [PASSED] pf_fails_bad_type
[18:08:38] [PASSED] pf_txn_reports_error
[18:08:38] [PASSED] pf_txn_sends_pf2guc
[18:08:38] [PASSED] pf_sends_pf2guc
[18:08:38] [SKIPPED] pf_loopback_nop
[18:08:38] [SKIPPED] pf_loopback_echo
[18:08:38] [SKIPPED] pf_loopback_fail
[18:08:38] [SKIPPED] pf_loopback_busy
[18:08:38] [SKIPPED] pf_loopback_retry
[18:08:38] ==================== [PASSED] pf_relay =====================
[18:08:38] ================== vf_relay (3 subtests) ===================
[18:08:38] [PASSED] vf_rejects_guc2vf_too_short
[18:08:38] [PASSED] vf_rejects_guc2vf_too_long
[18:08:38] [PASSED] vf_rejects_guc2vf_no_payload
[18:08:38] ==================== [PASSED] vf_relay =====================
[18:08:38] ================ pf_gt_config (6 subtests) =================
[18:08:38] [PASSED] fair_contexts_1vf
[18:08:38] [PASSED] fair_doorbells_1vf
[18:08:38] [PASSED] fair_ggtt_1vf
[18:08:38] ====================== fair_contexts  ======================
[18:08:38] [PASSED] 1 VF
[18:08:38] [PASSED] 2 VFs
[18:08:38] [PASSED] 3 VFs
[18:08:38] [PASSED] 4 VFs
[18:08:38] [PASSED] 5 VFs
[18:08:38] [PASSED] 6 VFs
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[18:08:38] [PASSED] 11 VFs
[18:08:38] [PASSED] 12 VFs
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[18:08:38] [PASSED] 39 VFs
[18:08:38] [PASSED] 40 VFs
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[18:08:38] [PASSED] 44 VFs
[18:08:38] [PASSED] 45 VFs
[18:08:38] [PASSED] 46 VFs
[18:08:38] [PASSED] 47 VFs
[18:08:38] [PASSED] 48 VFs
[18:08:38] [PASSED] 49 VFs
[18:08:38] [PASSED] 50 VFs
[18:08:38] [PASSED] 51 VFs
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[18:08:38] [PASSED] 53 VFs
[18:08:38] [PASSED] 54 VFs
[18:08:38] [PASSED] 55 VFs
[18:08:38] [PASSED] 56 VFs
[18:08:38] [PASSED] 57 VFs
[18:08:38] [PASSED] 58 VFs
[18:08:38] [PASSED] 59 VFs
[18:08:38] [PASSED] 60 VFs
[18:08:38] [PASSED] 61 VFs
[18:08:38] [PASSED] 62 VFs
[18:08:38] [PASSED] 63 VFs
[18:08:38] ================== [PASSED] fair_contexts ==================
[18:08:38] ===================== fair_doorbells  ======================
[18:08:38] [PASSED] 1 VF
[18:08:38] [PASSED] 2 VFs
[18:08:38] [PASSED] 3 VFs
[18:08:38] [PASSED] 4 VFs
[18:08:38] [PASSED] 5 VFs
[18:08:38] [PASSED] 6 VFs
[18:08:38] [PASSED] 7 VFs
[18:08:38] [PASSED] 8 VFs
[18:08:38] [PASSED] 9 VFs
[18:08:38] [PASSED] 10 VFs
[18:08:38] [PASSED] 11 VFs
[18:08:38] [PASSED] 12 VFs
[18:08:38] [PASSED] 13 VFs
[18:08:38] [PASSED] 14 VFs
[18:08:38] [PASSED] 15 VFs
[18:08:38] [PASSED] 16 VFs
[18:08:38] [PASSED] 17 VFs
[18:08:38] [PASSED] 18 VFs
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[18:08:38] [PASSED] 29 VFs
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[18:08:38] [PASSED] 33 VFs
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[18:08:38] [PASSED] 38 VFs
[18:08:38] [PASSED] 39 VFs
[18:08:38] [PASSED] 40 VFs
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[18:08:38] [PASSED] 44 VFs
[18:08:38] [PASSED] 45 VFs
[18:08:38] [PASSED] 46 VFs
[18:08:39] [PASSED] 47 VFs
[18:08:39] [PASSED] 48 VFs
[18:08:39] [PASSED] 49 VFs
[18:08:39] [PASSED] 50 VFs
[18:08:39] [PASSED] 51 VFs
[18:08:39] [PASSED] 52 VFs
[18:08:39] [PASSED] 53 VFs
[18:08:39] [PASSED] 54 VFs
[18:08:39] [PASSED] 55 VFs
[18:08:39] [PASSED] 56 VFs
[18:08:39] [PASSED] 57 VFs
[18:08:39] [PASSED] 58 VFs
[18:08:39] [PASSED] 59 VFs
[18:08:39] [PASSED] 60 VFs
[18:08:39] [PASSED] 61 VFs
[18:08:39] [PASSED] 62 VFs
[18:08:39] [PASSED] 63 VFs
[18:08:39] ================= [PASSED] fair_doorbells ==================
[18:08:39] ======================== fair_ggtt  ========================
[18:08:39] [PASSED] 1 VF
[18:08:39] [PASSED] 2 VFs
[18:08:39] [PASSED] 3 VFs
[18:08:39] [PASSED] 4 VFs
[18:08:39] [PASSED] 5 VFs
[18:08:39] [PASSED] 6 VFs
[18:08:39] [PASSED] 7 VFs
[18:08:39] [PASSED] 8 VFs
[18:08:39] [PASSED] 9 VFs
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[18:08:39] [PASSED] 11 VFs
[18:08:39] [PASSED] 12 VFs
[18:08:39] [PASSED] 13 VFs
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[18:08:39] [PASSED] 15 VFs
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[18:08:39] [PASSED] 18 VFs
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[18:08:39] [PASSED] 22 VFs
[18:08:39] [PASSED] 23 VFs
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[18:08:39] [PASSED] 26 VFs
[18:08:39] [PASSED] 27 VFs
[18:08:39] [PASSED] 28 VFs
[18:08:39] [PASSED] 29 VFs
[18:08:39] [PASSED] 30 VFs
[18:08:39] [PASSED] 31 VFs
[18:08:39] [PASSED] 32 VFs
[18:08:39] [PASSED] 33 VFs
[18:08:39] [PASSED] 34 VFs
[18:08:39] [PASSED] 35 VFs
[18:08:39] [PASSED] 36 VFs
[18:08:39] [PASSED] 37 VFs
[18:08:39] [PASSED] 38 VFs
[18:08:39] [PASSED] 39 VFs
[18:08:39] [PASSED] 40 VFs
[18:08:39] [PASSED] 41 VFs
[18:08:39] [PASSED] 42 VFs
[18:08:39] [PASSED] 43 VFs
[18:08:39] [PASSED] 44 VFs
[18:08:39] [PASSED] 45 VFs
[18:08:39] [PASSED] 46 VFs
[18:08:39] [PASSED] 47 VFs
[18:08:39] [PASSED] 48 VFs
[18:08:39] [PASSED] 49 VFs
[18:08:39] [PASSED] 50 VFs
[18:08:39] [PASSED] 51 VFs
[18:08:39] [PASSED] 52 VFs
[18:08:39] [PASSED] 53 VFs
[18:08:39] [PASSED] 54 VFs
[18:08:39] [PASSED] 55 VFs
[18:08:39] [PASSED] 56 VFs
[18:08:39] [PASSED] 57 VFs
[18:08:39] [PASSED] 58 VFs
[18:08:39] [PASSED] 59 VFs
[18:08:39] [PASSED] 60 VFs
[18:08:39] [PASSED] 61 VFs
[18:08:39] [PASSED] 62 VFs
[18:08:39] [PASSED] 63 VFs
[18:08:39] ==================== [PASSED] fair_ggtt ====================
[18:08:39] ================== [PASSED] pf_gt_config ===================
[18:08:39] ===================== lmtt (1 subtest) =====================
[18:08:39] ======================== test_ops  =========================
[18:08:39] [PASSED] 2-level
[18:08:39] [PASSED] multi-level
[18:08:39] ==================== [PASSED] test_ops =====================
[18:08:39] ====================== [PASSED] lmtt =======================
[18:08:39] ================= pf_service (11 subtests) =================
[18:08:39] [PASSED] pf_negotiate_any
[18:08:39] [PASSED] pf_negotiate_base_match
[18:08:39] [PASSED] pf_negotiate_base_newer
[18:08:39] [PASSED] pf_negotiate_base_next
[18:08:39] [SKIPPED] pf_negotiate_base_older
[18:08:39] [PASSED] pf_negotiate_base_prev
[18:08:39] [PASSED] pf_negotiate_latest_match
[18:08:39] [PASSED] pf_negotiate_latest_newer
[18:08:39] [PASSED] pf_negotiate_latest_next
[18:08:39] [SKIPPED] pf_negotiate_latest_older
[18:08:39] [SKIPPED] pf_negotiate_latest_prev
[18:08:39] =================== [PASSED] pf_service ====================
[18:08:39] ================= xe_guc_g2g (2 subtests) ==================
[18:08:39] ============== xe_live_guc_g2g_kunit_default  ==============
[18:08:39] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[18:08:39] ============== xe_live_guc_g2g_kunit_allmem  ===============
[18:08:39] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[18:08:39] =================== [SKIPPED] xe_guc_g2g ===================
[18:08:39] =================== xe_mocs (2 subtests) ===================
[18:08:39] ================ xe_live_mocs_kernel_kunit  ================
[18:08:39] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[18:08:39] ================ xe_live_mocs_reset_kunit  =================
[18:08:39] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[18:08:39] ==================== [SKIPPED] xe_mocs =====================
[18:08:39] ================= xe_migrate (2 subtests) ==================
[18:08:39] ================= xe_migrate_sanity_kunit  =================
[18:08:39] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[18:08:39] ================== xe_validate_ccs_kunit  ==================
[18:08:39] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[18:08:39] =================== [SKIPPED] xe_migrate ===================
[18:08:39] ================== xe_dma_buf (1 subtest) ==================
[18:08:39] ==================== xe_dma_buf_kunit  =====================
[18:08:39] ================ [SKIPPED] xe_dma_buf_kunit ================
[18:08:39] =================== [SKIPPED] xe_dma_buf ===================
[18:08:39] ================= xe_bo_shrink (1 subtest) =================
[18:08:39] =================== xe_bo_shrink_kunit  ====================
[18:08:39] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[18:08:39] ================== [SKIPPED] xe_bo_shrink ==================
[18:08:39] ==================== xe_bo (2 subtests) ====================
[18:08:39] ================== xe_ccs_migrate_kunit  ===================
[18:08:39] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[18:08:39] ==================== xe_bo_evict_kunit  ====================
[18:08:39] =============== [SKIPPED] xe_bo_evict_kunit ================
[18:08:39] ===================== [SKIPPED] xe_bo ======================
[18:08:39] ==================== args (13 subtests) ====================
[18:08:39] [PASSED] count_args_test
[18:08:39] [PASSED] call_args_example
[18:08:39] [PASSED] call_args_test
[18:08:39] [PASSED] drop_first_arg_example
[18:08:39] [PASSED] drop_first_arg_test
[18:08:39] [PASSED] first_arg_example
[18:08:39] [PASSED] first_arg_test
[18:08:39] [PASSED] last_arg_example
[18:08:39] [PASSED] last_arg_test
[18:08:39] [PASSED] pick_arg_example
[18:08:39] [PASSED] if_args_example
[18:08:39] [PASSED] if_args_test
[18:08:39] [PASSED] sep_comma_example
[18:08:39] ====================== [PASSED] args =======================
[18:08:39] =================== xe_pci (3 subtests) ====================
[18:08:39] ==================== check_graphics_ip  ====================
[18:08:39] [PASSED] 12.00 Xe_LP
[18:08:39] [PASSED] 12.10 Xe_LP+
[18:08:39] [PASSED] 12.55 Xe_HPG
[18:08:39] [PASSED] 12.60 Xe_HPC
[18:08:39] [PASSED] 12.70 Xe_LPG
[18:08:39] [PASSED] 12.71 Xe_LPG
[18:08:39] [PASSED] 12.74 Xe_LPG+
[18:08:39] [PASSED] 20.01 Xe2_HPG
[18:08:39] [PASSED] 20.02 Xe2_HPG
[18:08:39] [PASSED] 20.04 Xe2_LPG
[18:08:39] [PASSED] 30.00 Xe3_LPG
[18:08:39] [PASSED] 30.01 Xe3_LPG
[18:08:39] [PASSED] 30.03 Xe3_LPG
[18:08:39] [PASSED] 30.04 Xe3_LPG
[18:08:39] [PASSED] 30.05 Xe3_LPG
[18:08:39] [PASSED] 35.11 Xe3p_XPC
[18:08:39] ================ [PASSED] check_graphics_ip ================
[18:08:39] ===================== check_media_ip  ======================
[18:08:39] [PASSED] 12.00 Xe_M
[18:08:39] [PASSED] 12.55 Xe_HPM
[18:08:39] [PASSED] 13.00 Xe_LPM+
[18:08:39] [PASSED] 13.01 Xe2_HPM
[18:08:39] [PASSED] 20.00 Xe2_LPM
[18:08:39] [PASSED] 30.00 Xe3_LPM
[18:08:39] [PASSED] 30.02 Xe3_LPM
[18:08:39] [PASSED] 35.00 Xe3p_LPM
[18:08:39] [PASSED] 35.03 Xe3p_HPM
[18:08:39] ================= [PASSED] check_media_ip ==================
[18:08:39] =================== check_platform_desc  ===================
[18:08:39] [PASSED] 0x9A60 (TIGERLAKE)
[18:08:39] [PASSED] 0x9A68 (TIGERLAKE)
[18:08:39] [PASSED] 0x9A70 (TIGERLAKE)
[18:08:39] [PASSED] 0x9A40 (TIGERLAKE)
[18:08:39] [PASSED] 0x9A49 (TIGERLAKE)
[18:08:39] [PASSED] 0x9A59 (TIGERLAKE)
[18:08:39] [PASSED] 0x9A78 (TIGERLAKE)
[18:08:39] [PASSED] 0x9AC0 (TIGERLAKE)
[18:08:39] [PASSED] 0x9AC9 (TIGERLAKE)
[18:08:39] [PASSED] 0x9AD9 (TIGERLAKE)
[18:08:39] [PASSED] 0x9AF8 (TIGERLAKE)
[18:08:39] [PASSED] 0x4C80 (ROCKETLAKE)
[18:08:39] [PASSED] 0x4C8A (ROCKETLAKE)
[18:08:39] [PASSED] 0x4C8B (ROCKETLAKE)
[18:08:39] [PASSED] 0x4C8C (ROCKETLAKE)
[18:08:39] [PASSED] 0x4C90 (ROCKETLAKE)
[18:08:39] [PASSED] 0x4C9A (ROCKETLAKE)
[18:08:39] [PASSED] 0x4680 (ALDERLAKE_S)
[18:08:39] [PASSED] 0x4682 (ALDERLAKE_S)
[18:08:39] [PASSED] 0x4688 (ALDERLAKE_S)
[18:08:39] [PASSED] 0x468A (ALDERLAKE_S)
[18:08:39] [PASSED] 0x468B (ALDERLAKE_S)
[18:08:39] [PASSED] 0x4690 (ALDERLAKE_S)
[18:08:39] [PASSED] 0x4692 (ALDERLAKE_S)
[18:08:39] [PASSED] 0x4693 (ALDERLAKE_S)
[18:08:39] [PASSED] 0x46A0 (ALDERLAKE_P)
[18:08:39] [PASSED] 0x46A1 (ALDERLAKE_P)
[18:08:39] [PASSED] 0x46A2 (ALDERLAKE_P)
[18:08:39] [PASSED] 0x46A3 (ALDERLAKE_P)
[18:08:39] [PASSED] 0x46A6 (ALDERLAKE_P)
[18:08:39] [PASSED] 0x46A8 (ALDERLAKE_P)
[18:08:39] [PASSED] 0x46AA (ALDERLAKE_P)
[18:08:39] [PASSED] 0x462A (ALDERLAKE_P)
[18:08:39] [PASSED] 0x4626 (ALDERLAKE_P)
[18:08:39] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[18:08:39] [PASSED] 0x46B0 (ALDERLAKE_P)
[18:08:39] [PASSED] 0x46B1 (ALDERLAKE_P)
[18:08:39] [PASSED] 0x46B2 (ALDERLAKE_P)
[18:08:39] [PASSED] 0x46B3 (ALDERLAKE_P)
[18:08:39] [PASSED] 0x46C0 (ALDERLAKE_P)
[18:08:39] [PASSED] 0x46C1 (ALDERLAKE_P)
[18:08:39] [PASSED] 0x46C2 (ALDERLAKE_P)
[18:08:39] [PASSED] 0x46C3 (ALDERLAKE_P)
[18:08:39] [PASSED] 0x46D0 (ALDERLAKE_N)
[18:08:39] [PASSED] 0x46D1 (ALDERLAKE_N)
[18:08:39] [PASSED] 0x46D2 (ALDERLAKE_N)
[18:08:39] [PASSED] 0x46D3 (ALDERLAKE_N)
[18:08:39] [PASSED] 0x46D4 (ALDERLAKE_N)
[18:08:39] [PASSED] 0xA721 (ALDERLAKE_P)
[18:08:39] [PASSED] 0xA7A1 (ALDERLAKE_P)
[18:08:39] [PASSED] 0xA7A9 (ALDERLAKE_P)
[18:08:39] [PASSED] 0xA7AC (ALDERLAKE_P)
[18:08:39] [PASSED] 0xA7AD (ALDERLAKE_P)
[18:08:39] [PASSED] 0xA720 (ALDERLAKE_P)
[18:08:39] [PASSED] 0xA7A0 (ALDERLAKE_P)
[18:08:39] [PASSED] 0xA7A8 (ALDERLAKE_P)
[18:08:39] [PASSED] 0xA7AA (ALDERLAKE_P)
[18:08:39] [PASSED] 0xA7AB (ALDERLAKE_P)
[18:08:39] [PASSED] 0xA780 (ALDERLAKE_S)
[18:08:39] [PASSED] 0xA781 (ALDERLAKE_S)
[18:08:39] [PASSED] 0xA782 (ALDERLAKE_S)
[18:08:39] [PASSED] 0xA783 (ALDERLAKE_S)
[18:08:39] [PASSED] 0xA788 (ALDERLAKE_S)
[18:08:39] [PASSED] 0xA789 (ALDERLAKE_S)
[18:08:39] [PASSED] 0xA78A (ALDERLAKE_S)
[18:08:39] [PASSED] 0xA78B (ALDERLAKE_S)
[18:08:39] [PASSED] 0x4905 (DG1)
[18:08:39] [PASSED] 0x4906 (DG1)
[18:08:39] [PASSED] 0x4907 (DG1)
[18:08:39] [PASSED] 0x4908 (DG1)
[18:08:39] [PASSED] 0x4909 (DG1)
[18:08:39] [PASSED] 0x56C0 (DG2)
[18:08:39] [PASSED] 0x56C2 (DG2)
[18:08:39] [PASSED] 0x56C1 (DG2)
[18:08:39] [PASSED] 0x7D51 (METEORLAKE)
[18:08:39] [PASSED] 0x7DD1 (METEORLAKE)
[18:08:39] [PASSED] 0x7D41 (METEORLAKE)
[18:08:39] [PASSED] 0x7D67 (METEORLAKE)
[18:08:39] [PASSED] 0xB640 (METEORLAKE)
[18:08:39] [PASSED] 0x56A0 (DG2)
[18:08:39] [PASSED] 0x56A1 (DG2)
[18:08:39] [PASSED] 0x56A2 (DG2)
[18:08:39] [PASSED] 0x56BE (DG2)
[18:08:39] [PASSED] 0x56BF (DG2)
[18:08:39] [PASSED] 0x5690 (DG2)
[18:08:39] [PASSED] 0x5691 (DG2)
[18:08:39] [PASSED] 0x5692 (DG2)
[18:08:39] [PASSED] 0x56A5 (DG2)
[18:08:39] [PASSED] 0x56A6 (DG2)
[18:08:39] [PASSED] 0x56B0 (DG2)
[18:08:39] [PASSED] 0x56B1 (DG2)
[18:08:39] [PASSED] 0x56BA (DG2)
[18:08:39] [PASSED] 0x56BB (DG2)
[18:08:39] [PASSED] 0x56BC (DG2)
[18:08:39] [PASSED] 0x56BD (DG2)
[18:08:39] [PASSED] 0x5693 (DG2)
[18:08:39] [PASSED] 0x5694 (DG2)
[18:08:39] [PASSED] 0x5695 (DG2)
[18:08:39] [PASSED] 0x56A3 (DG2)
[18:08:39] [PASSED] 0x56A4 (DG2)
[18:08:39] [PASSED] 0x56B2 (DG2)
[18:08:39] [PASSED] 0x56B3 (DG2)
[18:08:39] [PASSED] 0x5696 (DG2)
[18:08:39] [PASSED] 0x5697 (DG2)
[18:08:39] [PASSED] 0xB69 (PVC)
[18:08:39] [PASSED] 0xB6E (PVC)
[18:08:39] [PASSED] 0xBD4 (PVC)
[18:08:39] [PASSED] 0xBD5 (PVC)
[18:08:39] [PASSED] 0xBD6 (PVC)
[18:08:39] [PASSED] 0xBD7 (PVC)
[18:08:39] [PASSED] 0xBD8 (PVC)
[18:08:39] [PASSED] 0xBD9 (PVC)
[18:08:39] [PASSED] 0xBDA (PVC)
[18:08:39] [PASSED] 0xBDB (PVC)
[18:08:39] [PASSED] 0xBE0 (PVC)
[18:08:39] [PASSED] 0xBE1 (PVC)
[18:08:39] [PASSED] 0xBE5 (PVC)
[18:08:39] [PASSED] 0x7D40 (METEORLAKE)
[18:08:39] [PASSED] 0x7D45 (METEORLAKE)
[18:08:39] [PASSED] 0x7D55 (METEORLAKE)
[18:08:39] [PASSED] 0x7D60 (METEORLAKE)
[18:08:39] [PASSED] 0x7DD5 (METEORLAKE)
[18:08:39] [PASSED] 0x6420 (LUNARLAKE)
[18:08:39] [PASSED] 0x64A0 (LUNARLAKE)
[18:08:39] [PASSED] 0x64B0 (LUNARLAKE)
[18:08:39] [PASSED] 0xE202 (BATTLEMAGE)
[18:08:39] [PASSED] 0xE209 (BATTLEMAGE)
[18:08:39] [PASSED] 0xE20B (BATTLEMAGE)
[18:08:39] [PASSED] 0xE20C (BATTLEMAGE)
[18:08:39] [PASSED] 0xE20D (BATTLEMAGE)
[18:08:39] [PASSED] 0xE210 (BATTLEMAGE)
[18:08:39] [PASSED] 0xE211 (BATTLEMAGE)
[18:08:39] [PASSED] 0xE212 (BATTLEMAGE)
[18:08:39] [PASSED] 0xE216 (BATTLEMAGE)
[18:08:39] [PASSED] 0xE220 (BATTLEMAGE)
[18:08:39] [PASSED] 0xE221 (BATTLEMAGE)
[18:08:39] [PASSED] 0xE222 (BATTLEMAGE)
[18:08:39] [PASSED] 0xE223 (BATTLEMAGE)
[18:08:39] [PASSED] 0xB080 (PANTHERLAKE)
[18:08:39] [PASSED] 0xB081 (PANTHERLAKE)
[18:08:39] [PASSED] 0xB082 (PANTHERLAKE)
[18:08:39] [PASSED] 0xB083 (PANTHERLAKE)
[18:08:39] [PASSED] 0xB084 (PANTHERLAKE)
[18:08:39] [PASSED] 0xB085 (PANTHERLAKE)
[18:08:39] [PASSED] 0xB086 (PANTHERLAKE)
[18:08:39] [PASSED] 0xB087 (PANTHERLAKE)
[18:08:39] [PASSED] 0xB08F (PANTHERLAKE)
[18:08:39] [PASSED] 0xB090 (PANTHERLAKE)
[18:08:39] [PASSED] 0xB0A0 (PANTHERLAKE)
[18:08:39] [PASSED] 0xB0B0 (PANTHERLAKE)
[18:08:39] [PASSED] 0xFD80 (PANTHERLAKE)
[18:08:39] [PASSED] 0xFD81 (PANTHERLAKE)
[18:08:39] [PASSED] 0xD740 (NOVALAKE_S)
[18:08:39] [PASSED] 0xD741 (NOVALAKE_S)
[18:08:39] [PASSED] 0xD742 (NOVALAKE_S)
[18:08:39] [PASSED] 0xD743 (NOVALAKE_S)
[18:08:39] [PASSED] 0xD744 (NOVALAKE_S)
[18:08:39] [PASSED] 0xD745 (NOVALAKE_S)
[18:08:39] [PASSED] 0x674C (CRESCENTISLAND)
[18:08:39] =============== [PASSED] check_platform_desc ===============
[18:08:39] ===================== [PASSED] xe_pci ======================
[18:08:39] =================== xe_rtp (2 subtests) ====================
[18:08:39] =============== xe_rtp_process_to_sr_tests  ================
[18:08:39] [PASSED] coalesce-same-reg
[18:08:39] [PASSED] no-match-no-add
[18:08:39] [PASSED] match-or
[18:08:39] [PASSED] match-or-xfail
[18:08:39] [PASSED] no-match-no-add-multiple-rules
[18:08:39] [PASSED] two-regs-two-entries
[18:08:39] [PASSED] clr-one-set-other
[18:08:39] [PASSED] set-field
[18:08:39] [PASSED] conflict-duplicate
[18:08:39] [PASSED] conflict-not-disjoint
[18:08:39] [PASSED] conflict-reg-type
[18:08:39] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[18:08:39] ================== xe_rtp_process_tests  ===================
[18:08:39] [PASSED] active1
[18:08:39] [PASSED] active2
[18:08:39] [PASSED] active-inactive
[18:08:39] [PASSED] inactive-active
[18:08:39] [PASSED] inactive-1st_or_active-inactive
[18:08:39] [PASSED] inactive-2nd_or_active-inactive
[18:08:39] [PASSED] inactive-last_or_active-inactive
[18:08:39] [PASSED] inactive-no_or_active-inactive
[18:08:39] ============== [PASSED] xe_rtp_process_tests ===============
[18:08:39] ===================== [PASSED] xe_rtp ======================
[18:08:39] ==================== xe_wa (1 subtest) =====================
[18:08:39] ======================== xe_wa_gt  =========================
[18:08:39] [PASSED] TIGERLAKE B0
[18:08:39] [PASSED] DG1 A0
[18:08:39] [PASSED] DG1 B0
[18:08:39] [PASSED] ALDERLAKE_S A0
[18:08:39] [PASSED] ALDERLAKE_S B0
[18:08:39] [PASSED] ALDERLAKE_S C0
[18:08:39] [PASSED] ALDERLAKE_S D0
[18:08:39] [PASSED] ALDERLAKE_P A0
[18:08:39] [PASSED] ALDERLAKE_P B0
[18:08:39] [PASSED] ALDERLAKE_P C0
[18:08:39] [PASSED] ALDERLAKE_S RPLS D0
[18:08:39] [PASSED] ALDERLAKE_P RPLU E0
[18:08:39] [PASSED] DG2 G10 C0
[18:08:39] [PASSED] DG2 G11 B1
[18:08:39] [PASSED] DG2 G12 A1
[18:08:39] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:08:39] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:08:39] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[18:08:39] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[18:08:39] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[18:08:39] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[18:08:39] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[18:08:39] ==================== [PASSED] xe_wa_gt =====================
[18:08:39] ====================== [PASSED] xe_wa ======================
[18:08:39] ============================================================
[18:08:39] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[18:08:39] Elapsed time: 37.215s total, 4.255s configuring, 32.443s building, 0.480s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[18:08:39] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:08:40] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:09:06] Starting KUnit Kernel (1/1)...
[18:09:06] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:09:07] ============ drm_test_pick_cmdline (2 subtests) ============
[18:09:07] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[18:09:07] =============== drm_test_pick_cmdline_named  ===============
[18:09:07] [PASSED] NTSC
[18:09:07] [PASSED] NTSC-J
[18:09:07] [PASSED] PAL
[18:09:07] [PASSED] PAL-M
[18:09:07] =========== [PASSED] drm_test_pick_cmdline_named ===========
[18:09:07] ============== [PASSED] drm_test_pick_cmdline ==============
[18:09:07] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[18:09:07] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[18:09:07] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[18:09:07] =========== drm_validate_clone_mode (2 subtests) ===========
[18:09:07] ============== drm_test_check_in_clone_mode  ===============
[18:09:07] [PASSED] in_clone_mode
[18:09:07] [PASSED] not_in_clone_mode
[18:09:07] ========== [PASSED] drm_test_check_in_clone_mode ===========
[18:09:07] =============== drm_test_check_valid_clones  ===============
[18:09:07] [PASSED] not_in_clone_mode
[18:09:07] [PASSED] valid_clone
[18:09:07] [PASSED] invalid_clone
[18:09:07] =========== [PASSED] drm_test_check_valid_clones ===========
[18:09:07] ============= [PASSED] drm_validate_clone_mode =============
[18:09:07] ============= drm_validate_modeset (1 subtest) =============
[18:09:07] [PASSED] drm_test_check_connector_changed_modeset
[18:09:07] ============== [PASSED] drm_validate_modeset ===============
[18:09:07] ====== drm_test_bridge_get_current_state (2 subtests) ======
[18:09:07] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[18:09:07] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[18:09:07] ======== [PASSED] drm_test_bridge_get_current_state ========
[18:09:07] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[18:09:07] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[18:09:07] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[18:09:07] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[18:09:07] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[18:09:07] ============== drm_bridge_alloc (2 subtests) ===============
[18:09:07] [PASSED] drm_test_drm_bridge_alloc_basic
[18:09:07] [PASSED] drm_test_drm_bridge_alloc_get_put
[18:09:07] ================ [PASSED] drm_bridge_alloc =================
[18:09:07] ================== drm_buddy (9 subtests) ==================
[18:09:07] [PASSED] drm_test_buddy_alloc_limit
[18:09:07] [PASSED] drm_test_buddy_alloc_optimistic
[18:09:07] [PASSED] drm_test_buddy_alloc_pessimistic
[18:09:07] [PASSED] drm_test_buddy_alloc_pathological
[18:09:07] [PASSED] drm_test_buddy_alloc_contiguous
[18:09:07] [PASSED] drm_test_buddy_alloc_clear
[18:09:07] [PASSED] drm_test_buddy_alloc_range_bias
[18:09:07] [PASSED] drm_test_buddy_fragmentation_performance
[18:09:07] [PASSED] drm_test_buddy_alloc_exceeds_max_order
[18:09:07] ==================== [PASSED] drm_buddy ====================
[18:09:07] ============= drm_cmdline_parser (40 subtests) =============
[18:09:07] [PASSED] drm_test_cmdline_force_d_only
[18:09:07] [PASSED] drm_test_cmdline_force_D_only_dvi
[18:09:07] [PASSED] drm_test_cmdline_force_D_only_hdmi
[18:09:07] [PASSED] drm_test_cmdline_force_D_only_not_digital
[18:09:07] [PASSED] drm_test_cmdline_force_e_only
[18:09:07] [PASSED] drm_test_cmdline_res
[18:09:07] [PASSED] drm_test_cmdline_res_vesa
[18:09:07] [PASSED] drm_test_cmdline_res_vesa_rblank
[18:09:07] [PASSED] drm_test_cmdline_res_rblank
[18:09:07] [PASSED] drm_test_cmdline_res_bpp
[18:09:07] [PASSED] drm_test_cmdline_res_refresh
[18:09:07] [PASSED] drm_test_cmdline_res_bpp_refresh
[18:09:07] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[18:09:07] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[18:09:07] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[18:09:07] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[18:09:07] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[18:09:07] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[18:09:07] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[18:09:07] [PASSED] drm_test_cmdline_res_margins_force_on
[18:09:07] [PASSED] drm_test_cmdline_res_vesa_margins
[18:09:07] [PASSED] drm_test_cmdline_name
[18:09:07] [PASSED] drm_test_cmdline_name_bpp
[18:09:07] [PASSED] drm_test_cmdline_name_option
[18:09:07] [PASSED] drm_test_cmdline_name_bpp_option
[18:09:07] [PASSED] drm_test_cmdline_rotate_0
[18:09:07] [PASSED] drm_test_cmdline_rotate_90
[18:09:07] [PASSED] drm_test_cmdline_rotate_180
[18:09:07] [PASSED] drm_test_cmdline_rotate_270
[18:09:07] [PASSED] drm_test_cmdline_hmirror
[18:09:07] [PASSED] drm_test_cmdline_vmirror
[18:09:07] [PASSED] drm_test_cmdline_margin_options
[18:09:07] [PASSED] drm_test_cmdline_multiple_options
[18:09:07] [PASSED] drm_test_cmdline_bpp_extra_and_option
[18:09:07] [PASSED] drm_test_cmdline_extra_and_option
[18:09:07] [PASSED] drm_test_cmdline_freestanding_options
[18:09:07] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[18:09:07] [PASSED] drm_test_cmdline_panel_orientation
[18:09:07] ================ drm_test_cmdline_invalid  =================
[18:09:07] [PASSED] margin_only
[18:09:07] [PASSED] interlace_only
[18:09:07] [PASSED] res_missing_x
[18:09:07] [PASSED] res_missing_y
[18:09:07] [PASSED] res_bad_y
[18:09:07] [PASSED] res_missing_y_bpp
[18:09:07] [PASSED] res_bad_bpp
[18:09:07] [PASSED] res_bad_refresh
[18:09:07] [PASSED] res_bpp_refresh_force_on_off
[18:09:07] [PASSED] res_invalid_mode
[18:09:07] [PASSED] res_bpp_wrong_place_mode
[18:09:07] [PASSED] name_bpp_refresh
[18:09:07] [PASSED] name_refresh
[18:09:07] [PASSED] name_refresh_wrong_mode
[18:09:07] [PASSED] name_refresh_invalid_mode
[18:09:07] [PASSED] rotate_multiple
[18:09:07] [PASSED] rotate_invalid_val
[18:09:07] [PASSED] rotate_truncated
[18:09:07] [PASSED] invalid_option
[18:09:07] [PASSED] invalid_tv_option
[18:09:07] [PASSED] truncated_tv_option
[18:09:07] ============ [PASSED] drm_test_cmdline_invalid =============
[18:09:07] =============== drm_test_cmdline_tv_options  ===============
[18:09:07] [PASSED] NTSC
[18:09:07] [PASSED] NTSC_443
[18:09:07] [PASSED] NTSC_J
[18:09:07] [PASSED] PAL
[18:09:07] [PASSED] PAL_M
[18:09:07] [PASSED] PAL_N
[18:09:07] [PASSED] SECAM
[18:09:07] [PASSED] MONO_525
[18:09:07] [PASSED] MONO_625
[18:09:07] =========== [PASSED] drm_test_cmdline_tv_options ===========
[18:09:07] =============== [PASSED] drm_cmdline_parser ================
[18:09:07] ========== drmm_connector_hdmi_init (20 subtests) ==========
[18:09:07] [PASSED] drm_test_connector_hdmi_init_valid
[18:09:07] [PASSED] drm_test_connector_hdmi_init_bpc_8
[18:09:07] [PASSED] drm_test_connector_hdmi_init_bpc_10
[18:09:07] [PASSED] drm_test_connector_hdmi_init_bpc_12
[18:09:07] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[18:09:07] [PASSED] drm_test_connector_hdmi_init_bpc_null
[18:09:07] [PASSED] drm_test_connector_hdmi_init_formats_empty
[18:09:07] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[18:09:07] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[18:09:07] [PASSED] supported_formats=0x9 yuv420_allowed=1
[18:09:07] [PASSED] supported_formats=0x9 yuv420_allowed=0
[18:09:07] [PASSED] supported_formats=0x3 yuv420_allowed=1
[18:09:07] [PASSED] supported_formats=0x3 yuv420_allowed=0
[18:09:07] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[18:09:07] [PASSED] drm_test_connector_hdmi_init_null_ddc
[18:09:07] [PASSED] drm_test_connector_hdmi_init_null_product
[18:09:07] [PASSED] drm_test_connector_hdmi_init_null_vendor
[18:09:07] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[18:09:07] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[18:09:07] [PASSED] drm_test_connector_hdmi_init_product_valid
[18:09:07] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[18:09:07] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[18:09:07] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[18:09:07] ========= drm_test_connector_hdmi_init_type_valid  =========
[18:09:07] [PASSED] HDMI-A
[18:09:07] [PASSED] HDMI-B
[18:09:07] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[18:09:07] ======== drm_test_connector_hdmi_init_type_invalid  ========
[18:09:07] [PASSED] Unknown
[18:09:07] [PASSED] VGA
[18:09:07] [PASSED] DVI-I
[18:09:07] [PASSED] DVI-D
[18:09:07] [PASSED] DVI-A
[18:09:07] [PASSED] Composite
[18:09:07] [PASSED] SVIDEO
[18:09:07] [PASSED] LVDS
[18:09:07] [PASSED] Component
[18:09:07] [PASSED] DIN
[18:09:07] [PASSED] DP
[18:09:07] [PASSED] TV
[18:09:07] [PASSED] eDP
[18:09:07] [PASSED] Virtual
[18:09:07] [PASSED] DSI
[18:09:07] [PASSED] DPI
[18:09:07] [PASSED] Writeback
[18:09:07] [PASSED] SPI
[18:09:07] [PASSED] USB
[18:09:07] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[18:09:07] ============ [PASSED] drmm_connector_hdmi_init =============
[18:09:07] ============= drmm_connector_init (3 subtests) =============
[18:09:07] [PASSED] drm_test_drmm_connector_init
[18:09:07] [PASSED] drm_test_drmm_connector_init_null_ddc
[18:09:07] ========= drm_test_drmm_connector_init_type_valid  =========
[18:09:07] [PASSED] Unknown
[18:09:07] [PASSED] VGA
[18:09:07] [PASSED] DVI-I
[18:09:07] [PASSED] DVI-D
[18:09:07] [PASSED] DVI-A
[18:09:07] [PASSED] Composite
[18:09:07] [PASSED] SVIDEO
[18:09:07] [PASSED] LVDS
[18:09:07] [PASSED] Component
[18:09:07] [PASSED] DIN
[18:09:07] [PASSED] DP
[18:09:07] [PASSED] HDMI-A
[18:09:07] [PASSED] HDMI-B
[18:09:07] [PASSED] TV
[18:09:07] [PASSED] eDP
[18:09:07] [PASSED] Virtual
[18:09:07] [PASSED] DSI
[18:09:07] [PASSED] DPI
[18:09:07] [PASSED] Writeback
[18:09:07] [PASSED] SPI
[18:09:07] [PASSED] USB
[18:09:07] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[18:09:07] =============== [PASSED] drmm_connector_init ===============
[18:09:07] ========= drm_connector_dynamic_init (6 subtests) ==========
[18:09:07] [PASSED] drm_test_drm_connector_dynamic_init
[18:09:07] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[18:09:07] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[18:09:07] [PASSED] drm_test_drm_connector_dynamic_init_properties
[18:09:07] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[18:09:07] [PASSED] Unknown
[18:09:07] [PASSED] VGA
[18:09:07] [PASSED] DVI-I
[18:09:07] [PASSED] DVI-D
[18:09:07] [PASSED] DVI-A
[18:09:07] [PASSED] Composite
[18:09:07] [PASSED] SVIDEO
[18:09:07] [PASSED] LVDS
[18:09:07] [PASSED] Component
[18:09:07] [PASSED] DIN
[18:09:07] [PASSED] DP
[18:09:07] [PASSED] HDMI-A
[18:09:07] [PASSED] HDMI-B
[18:09:07] [PASSED] TV
[18:09:07] [PASSED] eDP
[18:09:07] [PASSED] Virtual
[18:09:07] [PASSED] DSI
[18:09:07] [PASSED] DPI
[18:09:07] [PASSED] Writeback
[18:09:07] [PASSED] SPI
[18:09:07] [PASSED] USB
[18:09:07] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[18:09:07] ======== drm_test_drm_connector_dynamic_init_name  =========
[18:09:07] [PASSED] Unknown
[18:09:07] [PASSED] VGA
[18:09:07] [PASSED] DVI-I
[18:09:07] [PASSED] DVI-D
[18:09:07] [PASSED] DVI-A
[18:09:07] [PASSED] Composite
[18:09:07] [PASSED] SVIDEO
[18:09:07] [PASSED] LVDS
[18:09:07] [PASSED] Component
[18:09:07] [PASSED] DIN
[18:09:07] [PASSED] DP
[18:09:07] [PASSED] HDMI-A
[18:09:07] [PASSED] HDMI-B
[18:09:07] [PASSED] TV
[18:09:07] [PASSED] eDP
[18:09:07] [PASSED] Virtual
[18:09:07] [PASSED] DSI
[18:09:07] [PASSED] DPI
[18:09:07] [PASSED] Writeback
[18:09:07] [PASSED] SPI
[18:09:07] [PASSED] USB
[18:09:07] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[18:09:07] =========== [PASSED] drm_connector_dynamic_init ============
[18:09:07] ==== drm_connector_dynamic_register_early (4 subtests) =====
[18:09:07] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[18:09:07] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[18:09:07] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[18:09:07] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[18:09:07] ====== [PASSED] drm_connector_dynamic_register_early =======
[18:09:07] ======= drm_connector_dynamic_register (7 subtests) ========
[18:09:07] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[18:09:07] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[18:09:07] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[18:09:07] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[18:09:07] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[18:09:07] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[18:09:07] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[18:09:07] ========= [PASSED] drm_connector_dynamic_register ==========
[18:09:07] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[18:09:07] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[18:09:07] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[18:09:07] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[18:09:07] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[18:09:07] ========== drm_test_get_tv_mode_from_name_valid  ===========
[18:09:07] [PASSED] NTSC
[18:09:07] [PASSED] NTSC-443
[18:09:07] [PASSED] NTSC-J
[18:09:07] [PASSED] PAL
[18:09:07] [PASSED] PAL-M
[18:09:07] [PASSED] PAL-N
[18:09:07] [PASSED] SECAM
[18:09:07] [PASSED] Mono
[18:09:07] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[18:09:07] [PASSED] drm_test_get_tv_mode_from_name_truncated
[18:09:07] ============ [PASSED] drm_get_tv_mode_from_name ============
[18:09:07] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[18:09:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[18:09:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[18:09:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[18:09:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[18:09:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[18:09:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[18:09:07] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[18:09:07] [PASSED] VIC 96
[18:09:07] [PASSED] VIC 97
[18:09:07] [PASSED] VIC 101
[18:09:07] [PASSED] VIC 102
[18:09:07] [PASSED] VIC 106
[18:09:07] [PASSED] VIC 107
[18:09:07] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[18:09:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[18:09:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[18:09:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[18:09:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[18:09:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[18:09:07] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[18:09:07] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[18:09:07] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[18:09:07] [PASSED] Automatic
[18:09:07] [PASSED] Full
[18:09:07] [PASSED] Limited 16:235
[18:09:07] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[18:09:07] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[18:09:07] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[18:09:07] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[18:09:07] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[18:09:07] [PASSED] RGB
[18:09:07] [PASSED] YUV 4:2:0
[18:09:07] [PASSED] YUV 4:2:2
[18:09:07] [PASSED] YUV 4:4:4
[18:09:07] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[18:09:07] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[18:09:07] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[18:09:07] ============= drm_damage_helper (21 subtests) ==============
[18:09:07] [PASSED] drm_test_damage_iter_no_damage
[18:09:07] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[18:09:07] [PASSED] drm_test_damage_iter_no_damage_src_moved
[18:09:07] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[18:09:07] [PASSED] drm_test_damage_iter_no_damage_not_visible
[18:09:07] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[18:09:07] [PASSED] drm_test_damage_iter_no_damage_no_fb
[18:09:07] [PASSED] drm_test_damage_iter_simple_damage
[18:09:07] [PASSED] drm_test_damage_iter_single_damage
[18:09:07] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[18:09:07] [PASSED] drm_test_damage_iter_single_damage_outside_src
[18:09:07] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[18:09:07] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[18:09:07] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[18:09:07] [PASSED] drm_test_damage_iter_single_damage_src_moved
[18:09:07] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[18:09:07] [PASSED] drm_test_damage_iter_damage
[18:09:07] [PASSED] drm_test_damage_iter_damage_one_intersect
[18:09:07] [PASSED] drm_test_damage_iter_damage_one_outside
[18:09:07] [PASSED] drm_test_damage_iter_damage_src_moved
[18:09:07] [PASSED] drm_test_damage_iter_damage_not_visible
[18:09:07] ================ [PASSED] drm_damage_helper ================
[18:09:07] ============== drm_dp_mst_helper (3 subtests) ==============
[18:09:07] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[18:09:07] [PASSED] Clock 154000 BPP 30 DSC disabled
[18:09:07] [PASSED] Clock 234000 BPP 30 DSC disabled
[18:09:07] [PASSED] Clock 297000 BPP 24 DSC disabled
[18:09:07] [PASSED] Clock 332880 BPP 24 DSC enabled
[18:09:07] [PASSED] Clock 324540 BPP 24 DSC enabled
[18:09:07] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[18:09:07] ============== drm_test_dp_mst_calc_pbn_div  ===============
[18:09:07] [PASSED] Link rate 2000000 lane count 4
[18:09:07] [PASSED] Link rate 2000000 lane count 2
[18:09:07] [PASSED] Link rate 2000000 lane count 1
[18:09:07] [PASSED] Link rate 1350000 lane count 4
[18:09:07] [PASSED] Link rate 1350000 lane count 2
[18:09:07] [PASSED] Link rate 1350000 lane count 1
[18:09:07] [PASSED] Link rate 1000000 lane count 4
[18:09:07] [PASSED] Link rate 1000000 lane count 2
[18:09:07] [PASSED] Link rate 1000000 lane count 1
[18:09:07] [PASSED] Link rate 810000 lane count 4
[18:09:07] [PASSED] Link rate 810000 lane count 2
[18:09:07] [PASSED] Link rate 810000 lane count 1
[18:09:07] [PASSED] Link rate 540000 lane count 4
[18:09:07] [PASSED] Link rate 540000 lane count 2
[18:09:07] [PASSED] Link rate 540000 lane count 1
[18:09:07] [PASSED] Link rate 270000 lane count 4
[18:09:07] [PASSED] Link rate 270000 lane count 2
[18:09:07] [PASSED] Link rate 270000 lane count 1
[18:09:07] [PASSED] Link rate 162000 lane count 4
[18:09:07] [PASSED] Link rate 162000 lane count 2
[18:09:07] [PASSED] Link rate 162000 lane count 1
[18:09:07] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[18:09:07] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[18:09:07] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[18:09:07] [PASSED] DP_POWER_UP_PHY with port number
[18:09:07] [PASSED] DP_POWER_DOWN_PHY with port number
[18:09:07] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[18:09:07] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[18:09:07] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[18:09:07] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[18:09:07] [PASSED] DP_QUERY_PAYLOAD with port number
[18:09:07] [PASSED] DP_QUERY_PAYLOAD with VCPI
[18:09:07] [PASSED] DP_REMOTE_DPCD_READ with port number
[18:09:07] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[18:09:07] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[18:09:07] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[18:09:07] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[18:09:07] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[18:09:07] [PASSED] DP_REMOTE_I2C_READ with port number
[18:09:07] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[18:09:07] [PASSED] DP_REMOTE_I2C_READ with transactions array
[18:09:07] [PASSED] DP_REMOTE_I2C_WRITE with port number
[18:09:07] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[18:09:07] [PASSED] DP_REMOTE_I2C_WRITE with data array
[18:09:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[18:09:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[18:09:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[18:09:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[18:09:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[18:09:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[18:09:07] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[18:09:07] ================ [PASSED] drm_dp_mst_helper ================
[18:09:07] ================== drm_exec (7 subtests) ===================
[18:09:07] [PASSED] sanitycheck
[18:09:07] [PASSED] test_lock
[18:09:07] [PASSED] test_lock_unlock
[18:09:07] [PASSED] test_duplicates
[18:09:07] [PASSED] test_prepare
[18:09:07] [PASSED] test_prepare_array
[18:09:07] [PASSED] test_multiple_loops
[18:09:07] ==================== [PASSED] drm_exec =====================
[18:09:07] =========== drm_format_helper_test (17 subtests) ===========
[18:09:07] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[18:09:07] [PASSED] single_pixel_source_buffer
[18:09:07] [PASSED] single_pixel_clip_rectangle
[18:09:07] [PASSED] well_known_colors
[18:09:07] [PASSED] destination_pitch
[18:09:07] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[18:09:07] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[18:09:07] [PASSED] single_pixel_source_buffer
[18:09:07] [PASSED] single_pixel_clip_rectangle
[18:09:07] [PASSED] well_known_colors
[18:09:07] [PASSED] destination_pitch
[18:09:07] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[18:09:07] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[18:09:07] [PASSED] single_pixel_source_buffer
[18:09:07] [PASSED] single_pixel_clip_rectangle
[18:09:07] [PASSED] well_known_colors
[18:09:07] [PASSED] destination_pitch
[18:09:07] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[18:09:07] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[18:09:07] [PASSED] single_pixel_source_buffer
[18:09:07] [PASSED] single_pixel_clip_rectangle
[18:09:07] [PASSED] well_known_colors
[18:09:07] [PASSED] destination_pitch
[18:09:07] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[18:09:07] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[18:09:07] [PASSED] single_pixel_source_buffer
[18:09:07] [PASSED] single_pixel_clip_rectangle
[18:09:07] [PASSED] well_known_colors
[18:09:07] [PASSED] destination_pitch
[18:09:07] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[18:09:07] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[18:09:07] [PASSED] single_pixel_source_buffer
[18:09:07] [PASSED] single_pixel_clip_rectangle
[18:09:07] [PASSED] well_known_colors
[18:09:07] [PASSED] destination_pitch
[18:09:07] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[18:09:07] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[18:09:07] [PASSED] single_pixel_source_buffer
[18:09:07] [PASSED] single_pixel_clip_rectangle
[18:09:07] [PASSED] well_known_colors
[18:09:07] [PASSED] destination_pitch
[18:09:07] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[18:09:07] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[18:09:07] [PASSED] single_pixel_source_buffer
[18:09:07] [PASSED] single_pixel_clip_rectangle
[18:09:07] [PASSED] well_known_colors
[18:09:07] [PASSED] destination_pitch
[18:09:07] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[18:09:07] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[18:09:07] [PASSED] single_pixel_source_buffer
[18:09:07] [PASSED] single_pixel_clip_rectangle
[18:09:07] [PASSED] well_known_colors
[18:09:07] [PASSED] destination_pitch
[18:09:07] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[18:09:07] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[18:09:07] [PASSED] single_pixel_source_buffer
[18:09:07] [PASSED] single_pixel_clip_rectangle
[18:09:07] [PASSED] well_known_colors
[18:09:07] [PASSED] destination_pitch
[18:09:07] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[18:09:07] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[18:09:07] [PASSED] single_pixel_source_buffer
[18:09:07] [PASSED] single_pixel_clip_rectangle
[18:09:07] [PASSED] well_known_colors
[18:09:07] [PASSED] destination_pitch
[18:09:07] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[18:09:07] ============== drm_test_fb_xrgb8888_to_mono  ===============
[18:09:07] [PASSED] single_pixel_source_buffer
[18:09:07] [PASSED] single_pixel_clip_rectangle
[18:09:07] [PASSED] well_known_colors
[18:09:07] [PASSED] destination_pitch
[18:09:07] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[18:09:07] ==================== drm_test_fb_swab  =====================
[18:09:07] [PASSED] single_pixel_source_buffer
[18:09:07] [PASSED] single_pixel_clip_rectangle
[18:09:07] [PASSED] well_known_colors
[18:09:07] [PASSED] destination_pitch
[18:09:07] ================ [PASSED] drm_test_fb_swab =================
[18:09:07] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[18:09:07] [PASSED] single_pixel_source_buffer
[18:09:07] [PASSED] single_pixel_clip_rectangle
[18:09:07] [PASSED] well_known_colors
[18:09:07] [PASSED] destination_pitch
[18:09:07] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[18:09:07] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[18:09:07] [PASSED] single_pixel_source_buffer
[18:09:07] [PASSED] single_pixel_clip_rectangle
[18:09:07] [PASSED] well_known_colors
[18:09:07] [PASSED] destination_pitch
[18:09:07] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[18:09:07] ================= drm_test_fb_clip_offset  =================
[18:09:07] [PASSED] pass through
[18:09:07] [PASSED] horizontal offset
[18:09:07] [PASSED] vertical offset
[18:09:07] [PASSED] horizontal and vertical offset
[18:09:07] [PASSED] horizontal offset (custom pitch)
[18:09:07] [PASSED] vertical offset (custom pitch)
[18:09:07] [PASSED] horizontal and vertical offset (custom pitch)
[18:09:07] ============= [PASSED] drm_test_fb_clip_offset =============
[18:09:07] =================== drm_test_fb_memcpy  ====================
[18:09:07] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[18:09:07] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[18:09:07] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[18:09:07] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[18:09:07] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[18:09:07] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[18:09:07] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[18:09:07] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[18:09:07] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[18:09:07] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[18:09:07] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[18:09:07] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[18:09:07] =============== [PASSED] drm_test_fb_memcpy ================
[18:09:07] ============= [PASSED] drm_format_helper_test ==============
[18:09:07] ================= drm_format (18 subtests) =================
[18:09:07] [PASSED] drm_test_format_block_width_invalid
[18:09:07] [PASSED] drm_test_format_block_width_one_plane
[18:09:07] [PASSED] drm_test_format_block_width_two_plane
[18:09:07] [PASSED] drm_test_format_block_width_three_plane
[18:09:07] [PASSED] drm_test_format_block_width_tiled
[18:09:07] [PASSED] drm_test_format_block_height_invalid
[18:09:07] [PASSED] drm_test_format_block_height_one_plane
[18:09:07] [PASSED] drm_test_format_block_height_two_plane
[18:09:07] [PASSED] drm_test_format_block_height_three_plane
[18:09:07] [PASSED] drm_test_format_block_height_tiled
[18:09:07] [PASSED] drm_test_format_min_pitch_invalid
[18:09:07] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[18:09:07] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[18:09:07] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[18:09:07] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[18:09:07] [PASSED] drm_test_format_min_pitch_two_plane
[18:09:07] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[18:09:07] [PASSED] drm_test_format_min_pitch_tiled
[18:09:07] =================== [PASSED] drm_format ====================
[18:09:07] ============== drm_framebuffer (10 subtests) ===============
[18:09:07] ========== drm_test_framebuffer_check_src_coords  ==========
[18:09:07] [PASSED] Success: source fits into fb
[18:09:07] [PASSED] Fail: overflowing fb with x-axis coordinate
[18:09:07] [PASSED] Fail: overflowing fb with y-axis coordinate
[18:09:07] [PASSED] Fail: overflowing fb with source width
[18:09:07] [PASSED] Fail: overflowing fb with source height
[18:09:07] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[18:09:07] [PASSED] drm_test_framebuffer_cleanup
[18:09:07] =============== drm_test_framebuffer_create  ===============
[18:09:07] [PASSED] ABGR8888 normal sizes
[18:09:07] [PASSED] ABGR8888 max sizes
[18:09:07] [PASSED] ABGR8888 pitch greater than min required
[18:09:07] [PASSED] ABGR8888 pitch less than min required
[18:09:07] [PASSED] ABGR8888 Invalid width
[18:09:07] [PASSED] ABGR8888 Invalid buffer handle
[18:09:07] [PASSED] No pixel format
[18:09:07] [PASSED] ABGR8888 Width 0
[18:09:07] [PASSED] ABGR8888 Height 0
[18:09:07] [PASSED] ABGR8888 Out of bound height * pitch combination
[18:09:07] [PASSED] ABGR8888 Large buffer offset
[18:09:07] [PASSED] ABGR8888 Buffer offset for inexistent plane
[18:09:07] [PASSED] ABGR8888 Invalid flag
[18:09:07] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[18:09:07] [PASSED] ABGR8888 Valid buffer modifier
[18:09:07] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[18:09:07] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[18:09:07] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[18:09:07] [PASSED] NV12 Normal sizes
[18:09:07] [PASSED] NV12 Max sizes
[18:09:07] [PASSED] NV12 Invalid pitch
[18:09:07] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[18:09:07] [PASSED] NV12 different  modifier per-plane
[18:09:07] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[18:09:07] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[18:09:07] [PASSED] NV12 Modifier for inexistent plane
[18:09:07] [PASSED] NV12 Handle for inexistent plane
[18:09:07] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[18:09:07] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[18:09:07] [PASSED] YVU420 Normal sizes
[18:09:07] [PASSED] YVU420 Max sizes
[18:09:07] [PASSED] YVU420 Invalid pitch
[18:09:07] [PASSED] YVU420 Different pitches
[18:09:07] [PASSED] YVU420 Different buffer offsets/pitches
[18:09:07] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[18:09:07] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[18:09:07] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[18:09:07] [PASSED] YVU420 Valid modifier
[18:09:07] [PASSED] YVU420 Different modifiers per plane
[18:09:07] [PASSED] YVU420 Modifier for inexistent plane
[18:09:07] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[18:09:07] [PASSED] X0L2 Normal sizes
[18:09:07] [PASSED] X0L2 Max sizes
[18:09:07] [PASSED] X0L2 Invalid pitch
[18:09:07] [PASSED] X0L2 Pitch greater than minimum required
[18:09:07] [PASSED] X0L2 Handle for inexistent plane
[18:09:07] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[18:09:07] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[18:09:07] [PASSED] X0L2 Valid modifier
[18:09:07] [PASSED] X0L2 Modifier for inexistent plane
[18:09:07] =========== [PASSED] drm_test_framebuffer_create ===========
[18:09:07] [PASSED] drm_test_framebuffer_free
[18:09:07] [PASSED] drm_test_framebuffer_init
[18:09:07] [PASSED] drm_test_framebuffer_init_bad_format
[18:09:07] [PASSED] drm_test_framebuffer_init_dev_mismatch
[18:09:07] [PASSED] drm_test_framebuffer_lookup
[18:09:07] [PASSED] drm_test_framebuffer_lookup_inexistent
[18:09:07] [PASSED] drm_test_framebuffer_modifiers_not_supported
[18:09:07] ================= [PASSED] drm_framebuffer =================
[18:09:07] ================ drm_gem_shmem (8 subtests) ================
[18:09:07] [PASSED] drm_gem_shmem_test_obj_create
[18:09:07] [PASSED] drm_gem_shmem_test_obj_create_private
[18:09:07] [PASSED] drm_gem_shmem_test_pin_pages
[18:09:07] [PASSED] drm_gem_shmem_test_vmap
[18:09:07] [PASSED] drm_gem_shmem_test_get_sg_table
[18:09:07] [PASSED] drm_gem_shmem_test_get_pages_sgt
[18:09:07] [PASSED] drm_gem_shmem_test_madvise
[18:09:07] [PASSED] drm_gem_shmem_test_purge
[18:09:07] ================== [PASSED] drm_gem_shmem ==================
[18:09:07] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[18:09:07] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[18:09:07] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[18:09:07] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[18:09:07] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[18:09:07] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[18:09:07] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[18:09:07] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[18:09:07] [PASSED] Automatic
[18:09:07] [PASSED] Full
[18:09:07] [PASSED] Limited 16:235
[18:09:07] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[18:09:07] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[18:09:07] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[18:09:07] [PASSED] drm_test_check_disable_connector
[18:09:07] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[18:09:07] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[18:09:07] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[18:09:07] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[18:09:07] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[18:09:07] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[18:09:07] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[18:09:07] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[18:09:07] [PASSED] drm_test_check_output_bpc_dvi
[18:09:07] [PASSED] drm_test_check_output_bpc_format_vic_1
[18:09:07] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[18:09:07] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[18:09:07] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[18:09:07] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[18:09:07] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[18:09:07] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[18:09:07] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[18:09:07] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[18:09:07] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[18:09:07] [PASSED] drm_test_check_broadcast_rgb_value
[18:09:07] [PASSED] drm_test_check_bpc_8_value
[18:09:07] [PASSED] drm_test_check_bpc_10_value
[18:09:07] [PASSED] drm_test_check_bpc_12_value
[18:09:07] [PASSED] drm_test_check_format_value
[18:09:07] [PASSED] drm_test_check_tmds_char_value
[18:09:07] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[18:09:07] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[18:09:07] [PASSED] drm_test_check_mode_valid
[18:09:07] [PASSED] drm_test_check_mode_valid_reject
[18:09:07] [PASSED] drm_test_check_mode_valid_reject_rate
[18:09:07] [PASSED] drm_test_check_mode_valid_reject_max_clock
[18:09:07] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[18:09:07] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[18:09:07] [PASSED] drm_test_check_infoframes
[18:09:07] [PASSED] drm_test_check_reject_avi_infoframe
[18:09:07] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[18:09:07] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[18:09:07] [PASSED] drm_test_check_reject_audio_infoframe
[18:09:07] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[18:09:07] ================= drm_managed (2 subtests) =================
[18:09:07] [PASSED] drm_test_managed_release_action
[18:09:07] [PASSED] drm_test_managed_run_action
[18:09:07] =================== [PASSED] drm_managed ===================
[18:09:07] =================== drm_mm (6 subtests) ====================
[18:09:07] [PASSED] drm_test_mm_init
[18:09:07] [PASSED] drm_test_mm_debug
[18:09:07] [PASSED] drm_test_mm_align32
[18:09:07] [PASSED] drm_test_mm_align64
[18:09:07] [PASSED] drm_test_mm_lowest
[18:09:07] [PASSED] drm_test_mm_highest
[18:09:07] ===================== [PASSED] drm_mm ======================
[18:09:07] ============= drm_modes_analog_tv (5 subtests) =============
[18:09:07] [PASSED] drm_test_modes_analog_tv_mono_576i
[18:09:07] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[18:09:07] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[18:09:07] [PASSED] drm_test_modes_analog_tv_pal_576i
[18:09:07] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[18:09:07] =============== [PASSED] drm_modes_analog_tv ===============
[18:09:07] ============== drm_plane_helper (2 subtests) ===============
[18:09:07] =============== drm_test_check_plane_state  ================
[18:09:07] [PASSED] clipping_simple
[18:09:07] [PASSED] clipping_rotate_reflect
[18:09:07] [PASSED] positioning_simple
[18:09:07] [PASSED] upscaling
[18:09:07] [PASSED] downscaling
[18:09:07] [PASSED] rounding1
[18:09:07] [PASSED] rounding2
[18:09:07] [PASSED] rounding3
[18:09:07] [PASSED] rounding4
[18:09:07] =========== [PASSED] drm_test_check_plane_state ============
[18:09:07] =========== drm_test_check_invalid_plane_state  ============
[18:09:07] [PASSED] positioning_invalid
[18:09:07] [PASSED] upscaling_invalid
[18:09:07] [PASSED] downscaling_invalid
[18:09:07] ======= [PASSED] drm_test_check_invalid_plane_state ========
[18:09:07] ================ [PASSED] drm_plane_helper =================
[18:09:07] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[18:09:07] ====== drm_test_connector_helper_tv_get_modes_check  =======
[18:09:07] [PASSED] None
[18:09:07] [PASSED] PAL
[18:09:07] [PASSED] NTSC
[18:09:07] [PASSED] Both, NTSC Default
[18:09:07] [PASSED] Both, PAL Default
[18:09:07] [PASSED] Both, NTSC Default, with PAL on command-line
[18:09:07] [PASSED] Both, PAL Default, with NTSC on command-line
[18:09:07] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[18:09:07] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[18:09:07] ================== drm_rect (9 subtests) ===================
[18:09:07] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[18:09:07] [PASSED] drm_test_rect_clip_scaled_not_clipped
[18:09:07] [PASSED] drm_test_rect_clip_scaled_clipped
[18:09:07] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[18:09:07] ================= drm_test_rect_intersect  =================
[18:09:07] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[18:09:07] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[18:09:07] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[18:09:07] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[18:09:07] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[18:09:07] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[18:09:07] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[18:09:07] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[18:09:07] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[18:09:07] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[18:09:07] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[18:09:07] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[18:09:07] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[18:09:07] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[18:09:07] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
stty: 'standard input': Inappropriate ioctl for device
[18:09:07] ============= [PASSED] drm_test_rect_intersect =============
[18:09:07] ================ drm_test_rect_calc_hscale  ================
[18:09:07] [PASSED] normal use
[18:09:07] [PASSED] out of max range
[18:09:07] [PASSED] out of min range
[18:09:07] [PASSED] zero dst
[18:09:07] [PASSED] negative src
[18:09:07] [PASSED] negative dst
[18:09:07] ============ [PASSED] drm_test_rect_calc_hscale ============
[18:09:07] ================ drm_test_rect_calc_vscale  ================
[18:09:07] [PASSED] normal use
[18:09:07] [PASSED] out of max range
[18:09:07] [PASSED] out of min range
[18:09:07] [PASSED] zero dst
[18:09:07] [PASSED] negative src
[18:09:07] [PASSED] negative dst
[18:09:07] ============ [PASSED] drm_test_rect_calc_vscale ============
[18:09:07] ================== drm_test_rect_rotate  ===================
[18:09:07] [PASSED] reflect-x
[18:09:07] [PASSED] reflect-y
[18:09:07] [PASSED] rotate-0
[18:09:07] [PASSED] rotate-90
[18:09:07] [PASSED] rotate-180
[18:09:07] [PASSED] rotate-270
[18:09:07] ============== [PASSED] drm_test_rect_rotate ===============
[18:09:07] ================ drm_test_rect_rotate_inv  =================
[18:09:07] [PASSED] reflect-x
[18:09:07] [PASSED] reflect-y
[18:09:07] [PASSED] rotate-0
[18:09:07] [PASSED] rotate-90
[18:09:07] [PASSED] rotate-180
[18:09:07] [PASSED] rotate-270
[18:09:07] ============ [PASSED] drm_test_rect_rotate_inv =============
[18:09:07] ==================== [PASSED] drm_rect =====================
[18:09:07] ============ drm_sysfb_modeset_test (1 subtest) ============
[18:09:07] ============ drm_test_sysfb_build_fourcc_list  =============
[18:09:07] [PASSED] no native formats
[18:09:07] [PASSED] XRGB8888 as native format
[18:09:07] [PASSED] remove duplicates
[18:09:07] [PASSED] convert alpha formats
[18:09:07] [PASSED] random formats
[18:09:07] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[18:09:07] ============= [PASSED] drm_sysfb_modeset_test ==============
[18:09:07] ================== drm_fixp (2 subtests) ===================
[18:09:07] [PASSED] drm_test_int2fixp
[18:09:07] [PASSED] drm_test_sm2fixp
[18:09:07] ==================== [PASSED] drm_fixp =====================
[18:09:07] ============================================================
[18:09:07] Testing complete. Ran 630 tests: passed: 630
[18:09:07] Elapsed time: 28.107s total, 1.699s configuring, 25.989s building, 0.387s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[18:09:07] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:09:09] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:09:18] Starting KUnit Kernel (1/1)...
[18:09:18] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:09:19] ================= ttm_device (5 subtests) ==================
[18:09:19] [PASSED] ttm_device_init_basic
[18:09:19] [PASSED] ttm_device_init_multiple
[18:09:19] [PASSED] ttm_device_fini_basic
[18:09:19] [PASSED] ttm_device_init_no_vma_man
[18:09:19] ================== ttm_device_init_pools  ==================
[18:09:19] [PASSED] No DMA allocations, no DMA32 required
[18:09:19] [PASSED] DMA allocations, DMA32 required
[18:09:19] [PASSED] No DMA allocations, DMA32 required
[18:09:19] [PASSED] DMA allocations, no DMA32 required
[18:09:19] ============== [PASSED] ttm_device_init_pools ==============
[18:09:19] =================== [PASSED] ttm_device ====================
[18:09:19] ================== ttm_pool (8 subtests) ===================
[18:09:19] ================== ttm_pool_alloc_basic  ===================
[18:09:19] [PASSED] One page
[18:09:19] [PASSED] More than one page
[18:09:19] [PASSED] Above the allocation limit
[18:09:19] [PASSED] One page, with coherent DMA mappings enabled
[18:09:19] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:09:19] ============== [PASSED] ttm_pool_alloc_basic ===============
[18:09:19] ============== ttm_pool_alloc_basic_dma_addr  ==============
[18:09:19] [PASSED] One page
[18:09:19] [PASSED] More than one page
[18:09:19] [PASSED] Above the allocation limit
[18:09:19] [PASSED] One page, with coherent DMA mappings enabled
[18:09:19] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:09:19] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[18:09:19] [PASSED] ttm_pool_alloc_order_caching_match
[18:09:19] [PASSED] ttm_pool_alloc_caching_mismatch
[18:09:19] [PASSED] ttm_pool_alloc_order_mismatch
[18:09:19] [PASSED] ttm_pool_free_dma_alloc
[18:09:19] [PASSED] ttm_pool_free_no_dma_alloc
[18:09:19] [PASSED] ttm_pool_fini_basic
[18:09:19] ==================== [PASSED] ttm_pool =====================
[18:09:19] ================ ttm_resource (8 subtests) =================
[18:09:19] ================= ttm_resource_init_basic  =================
[18:09:19] [PASSED] Init resource in TTM_PL_SYSTEM
[18:09:19] [PASSED] Init resource in TTM_PL_VRAM
[18:09:19] [PASSED] Init resource in a private placement
[18:09:19] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[18:09:19] ============= [PASSED] ttm_resource_init_basic =============
[18:09:19] [PASSED] ttm_resource_init_pinned
[18:09:19] [PASSED] ttm_resource_fini_basic
[18:09:19] [PASSED] ttm_resource_manager_init_basic
[18:09:19] [PASSED] ttm_resource_manager_usage_basic
[18:09:19] [PASSED] ttm_resource_manager_set_used_basic
[18:09:19] [PASSED] ttm_sys_man_alloc_basic
[18:09:19] [PASSED] ttm_sys_man_free_basic
[18:09:19] ================== [PASSED] ttm_resource ===================
[18:09:19] =================== ttm_tt (15 subtests) ===================
[18:09:19] ==================== ttm_tt_init_basic  ====================
[18:09:19] [PASSED] Page-aligned size
[18:09:19] [PASSED] Extra pages requested
[18:09:19] ================ [PASSED] ttm_tt_init_basic ================
[18:09:19] [PASSED] ttm_tt_init_misaligned
[18:09:19] [PASSED] ttm_tt_fini_basic
[18:09:19] [PASSED] ttm_tt_fini_sg
[18:09:19] [PASSED] ttm_tt_fini_shmem
[18:09:19] [PASSED] ttm_tt_create_basic
[18:09:19] [PASSED] ttm_tt_create_invalid_bo_type
[18:09:19] [PASSED] ttm_tt_create_ttm_exists
[18:09:19] [PASSED] ttm_tt_create_failed
[18:09:19] [PASSED] ttm_tt_destroy_basic
[18:09:19] [PASSED] ttm_tt_populate_null_ttm
[18:09:19] [PASSED] ttm_tt_populate_populated_ttm
[18:09:19] [PASSED] ttm_tt_unpopulate_basic
[18:09:19] [PASSED] ttm_tt_unpopulate_empty_ttm
[18:09:19] [PASSED] ttm_tt_swapin_basic
[18:09:19] ===================== [PASSED] ttm_tt ======================
[18:09:19] =================== ttm_bo (14 subtests) ===================
[18:09:19] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[18:09:19] [PASSED] Cannot be interrupted and sleeps
[18:09:19] [PASSED] Cannot be interrupted, locks straight away
[18:09:19] [PASSED] Can be interrupted, sleeps
[18:09:19] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[18:09:19] [PASSED] ttm_bo_reserve_locked_no_sleep
[18:09:19] [PASSED] ttm_bo_reserve_no_wait_ticket
[18:09:19] [PASSED] ttm_bo_reserve_double_resv
[18:09:19] [PASSED] ttm_bo_reserve_interrupted
[18:09:19] [PASSED] ttm_bo_reserve_deadlock
[18:09:19] [PASSED] ttm_bo_unreserve_basic
[18:09:19] [PASSED] ttm_bo_unreserve_pinned
[18:09:19] [PASSED] ttm_bo_unreserve_bulk
[18:09:19] [PASSED] ttm_bo_fini_basic
[18:09:19] [PASSED] ttm_bo_fini_shared_resv
[18:09:19] [PASSED] ttm_bo_pin_basic
[18:09:19] [PASSED] ttm_bo_pin_unpin_resource
[18:09:19] [PASSED] ttm_bo_multiple_pin_one_unpin
[18:09:19] ===================== [PASSED] ttm_bo ======================
[18:09:19] ============== ttm_bo_validate (21 subtests) ===============
[18:09:19] ============== ttm_bo_init_reserved_sys_man  ===============
[18:09:19] [PASSED] Buffer object for userspace
[18:09:19] [PASSED] Kernel buffer object
[18:09:19] [PASSED] Shared buffer object
[18:09:19] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[18:09:19] ============== ttm_bo_init_reserved_mock_man  ==============
[18:09:19] [PASSED] Buffer object for userspace
[18:09:19] [PASSED] Kernel buffer object
[18:09:19] [PASSED] Shared buffer object
[18:09:19] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[18:09:19] [PASSED] ttm_bo_init_reserved_resv
[18:09:19] ================== ttm_bo_validate_basic  ==================
[18:09:19] [PASSED] Buffer object for userspace
[18:09:19] [PASSED] Kernel buffer object
[18:09:19] [PASSED] Shared buffer object
[18:09:19] ============== [PASSED] ttm_bo_validate_basic ==============
[18:09:19] [PASSED] ttm_bo_validate_invalid_placement
[18:09:19] ============= ttm_bo_validate_same_placement  ==============
[18:09:19] [PASSED] System manager
[18:09:19] [PASSED] VRAM manager
[18:09:19] ========= [PASSED] ttm_bo_validate_same_placement ==========
[18:09:19] [PASSED] ttm_bo_validate_failed_alloc
[18:09:19] [PASSED] ttm_bo_validate_pinned
[18:09:19] [PASSED] ttm_bo_validate_busy_placement
[18:09:19] ================ ttm_bo_validate_multihop  =================
[18:09:19] [PASSED] Buffer object for userspace
[18:09:19] [PASSED] Kernel buffer object
[18:09:19] [PASSED] Shared buffer object
[18:09:19] ============ [PASSED] ttm_bo_validate_multihop =============
[18:09:19] ========== ttm_bo_validate_no_placement_signaled  ==========
[18:09:19] [PASSED] Buffer object in system domain, no page vector
[18:09:19] [PASSED] Buffer object in system domain with an existing page vector
[18:09:19] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[18:09:19] ======== ttm_bo_validate_no_placement_not_signaled  ========
[18:09:19] [PASSED] Buffer object for userspace
[18:09:19] [PASSED] Kernel buffer object
[18:09:19] [PASSED] Shared buffer object
[18:09:19] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[18:09:19] [PASSED] ttm_bo_validate_move_fence_signaled
[18:09:19] ========= ttm_bo_validate_move_fence_not_signaled  =========
[18:09:19] [PASSED] Waits for GPU
[18:09:19] [PASSED] Tries to lock straight away
[18:09:19] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[18:09:19] [PASSED] ttm_bo_validate_happy_evict
[18:09:19] [PASSED] ttm_bo_validate_all_pinned_evict
[18:09:19] [PASSED] ttm_bo_validate_allowed_only_evict
[18:09:19] [PASSED] ttm_bo_validate_deleted_evict
[18:09:19] [PASSED] ttm_bo_validate_busy_domain_evict
[18:09:19] [PASSED] ttm_bo_validate_evict_gutting
[18:09:19] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[18:09:19] ================= [PASSED] ttm_bo_validate =================
[18:09:19] ============================================================
[18:09:19] Testing complete. Ran 101 tests: passed: 101
[18:09:19] Elapsed time: 11.682s total, 1.694s configuring, 9.771s building, 0.183s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 10+ messages in thread

* ✗ Xe.CI.BAT: failure for drm/xe/reg_sr: Fix leak on xa_store failure
  2026-02-03 17:36 [PATCH] drm/xe/reg_sr: Fix leak on xa_store failure Shuicheng Lin
  2026-02-03 18:09 ` ✓ CI.KUnit: success for " Patchwork
@ 2026-02-03 19:00 ` Patchwork
  2026-02-03 23:13 ` ✓ CI.KUnit: success for drm/xe/reg_sr: Fix leak on xa_store failure (rev2) Patchwork
                   ` (3 subsequent siblings)
  5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-02-03 19:00 UTC (permalink / raw)
  To: Lin, Shuicheng; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 373 bytes --]

== Series Details ==

Series: drm/xe/reg_sr: Fix leak on xa_store failure
URL   : https://patchwork.freedesktop.org/series/161102/
State : failure

== Summary ==

ERROR: The runconfig 'xe-4491-4155204a236e5b9e6ca6962c13ae96b54a4d5021_BAT' does not exist in the database

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161102v1/index.html

[-- Attachment #2: Type: text/html, Size: 938 bytes --]

^ permalink raw reply	[flat|nested] 10+ messages in thread

* ✓ CI.KUnit: success for drm/xe/reg_sr: Fix leak on xa_store failure (rev2)
  2026-02-03 17:36 [PATCH] drm/xe/reg_sr: Fix leak on xa_store failure Shuicheng Lin
  2026-02-03 18:09 ` ✓ CI.KUnit: success for " Patchwork
  2026-02-03 19:00 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2026-02-03 23:13 ` Patchwork
  2026-02-03 23:46 ` ✗ Xe.CI.BAT: failure " Patchwork
                   ` (2 subsequent siblings)
  5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-02-03 23:13 UTC (permalink / raw)
  To: Lin, Shuicheng; +Cc: intel-xe

== Series Details ==

Series: drm/xe/reg_sr: Fix leak on xa_store failure (rev2)
URL   : https://patchwork.freedesktop.org/series/161102/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[23:11:40] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:11:44] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:12:16] Starting KUnit Kernel (1/1)...
[23:12:16] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:12:17] ================== guc_buf (11 subtests) ===================
[23:12:17] [PASSED] test_smallest
[23:12:17] [PASSED] test_largest
[23:12:17] [PASSED] test_granular
[23:12:17] [PASSED] test_unique
[23:12:17] [PASSED] test_overlap
[23:12:17] [PASSED] test_reusable
[23:12:17] [PASSED] test_too_big
[23:12:17] [PASSED] test_flush
[23:12:17] [PASSED] test_lookup
[23:12:17] [PASSED] test_data
[23:12:17] [PASSED] test_class
[23:12:17] ===================== [PASSED] guc_buf =====================
[23:12:17] =================== guc_dbm (7 subtests) ===================
[23:12:17] [PASSED] test_empty
[23:12:17] [PASSED] test_default
[23:12:17] ======================== test_size  ========================
[23:12:17] [PASSED] 4
[23:12:17] [PASSED] 8
[23:12:17] [PASSED] 32
[23:12:17] [PASSED] 256
[23:12:17] ==================== [PASSED] test_size ====================
[23:12:17] ======================= test_reuse  ========================
[23:12:17] [PASSED] 4
[23:12:17] [PASSED] 8
[23:12:17] [PASSED] 32
[23:12:17] [PASSED] 256
[23:12:17] =================== [PASSED] test_reuse ====================
[23:12:17] =================== test_range_overlap  ====================
[23:12:17] [PASSED] 4
[23:12:17] [PASSED] 8
[23:12:17] [PASSED] 32
[23:12:17] [PASSED] 256
[23:12:17] =============== [PASSED] test_range_overlap ================
[23:12:17] =================== test_range_compact  ====================
[23:12:17] [PASSED] 4
[23:12:17] [PASSED] 8
[23:12:17] [PASSED] 32
[23:12:17] [PASSED] 256
[23:12:17] =============== [PASSED] test_range_compact ================
[23:12:17] ==================== test_range_spare  =====================
[23:12:17] [PASSED] 4
[23:12:17] [PASSED] 8
[23:12:17] [PASSED] 32
[23:12:17] [PASSED] 256
[23:12:17] ================ [PASSED] test_range_spare =================
[23:12:17] ===================== [PASSED] guc_dbm =====================
[23:12:17] =================== guc_idm (6 subtests) ===================
[23:12:17] [PASSED] bad_init
[23:12:17] [PASSED] no_init
[23:12:17] [PASSED] init_fini
[23:12:17] [PASSED] check_used
[23:12:17] [PASSED] check_quota
[23:12:17] [PASSED] check_all
[23:12:17] ===================== [PASSED] guc_idm =====================
[23:12:17] ================== no_relay (3 subtests) ===================
[23:12:17] [PASSED] xe_drops_guc2pf_if_not_ready
[23:12:17] [PASSED] xe_drops_guc2vf_if_not_ready
[23:12:17] [PASSED] xe_rejects_send_if_not_ready
[23:12:17] ==================== [PASSED] no_relay =====================
[23:12:17] ================== pf_relay (14 subtests) ==================
[23:12:17] [PASSED] pf_rejects_guc2pf_too_short
[23:12:17] [PASSED] pf_rejects_guc2pf_too_long
[23:12:17] [PASSED] pf_rejects_guc2pf_no_payload
[23:12:17] [PASSED] pf_fails_no_payload
[23:12:17] [PASSED] pf_fails_bad_origin
[23:12:17] [PASSED] pf_fails_bad_type
[23:12:17] [PASSED] pf_txn_reports_error
[23:12:17] [PASSED] pf_txn_sends_pf2guc
[23:12:17] [PASSED] pf_sends_pf2guc
[23:12:17] [SKIPPED] pf_loopback_nop
[23:12:17] [SKIPPED] pf_loopback_echo
[23:12:17] [SKIPPED] pf_loopback_fail
[23:12:17] [SKIPPED] pf_loopback_busy
[23:12:17] [SKIPPED] pf_loopback_retry
[23:12:17] ==================== [PASSED] pf_relay =====================
[23:12:17] ================== vf_relay (3 subtests) ===================
[23:12:17] [PASSED] vf_rejects_guc2vf_too_short
[23:12:17] [PASSED] vf_rejects_guc2vf_too_long
[23:12:17] [PASSED] vf_rejects_guc2vf_no_payload
[23:12:17] ==================== [PASSED] vf_relay =====================
[23:12:17] ================ pf_gt_config (6 subtests) =================
[23:12:17] [PASSED] fair_contexts_1vf
[23:12:17] [PASSED] fair_doorbells_1vf
[23:12:17] [PASSED] fair_ggtt_1vf
[23:12:17] ====================== fair_contexts  ======================
[23:12:17] [PASSED] 1 VF
[23:12:17] [PASSED] 2 VFs
[23:12:17] [PASSED] 3 VFs
[23:12:17] [PASSED] 4 VFs
[23:12:17] [PASSED] 5 VFs
[23:12:17] [PASSED] 6 VFs
[23:12:17] [PASSED] 7 VFs
[23:12:17] [PASSED] 8 VFs
[23:12:17] [PASSED] 9 VFs
[23:12:17] [PASSED] 10 VFs
[23:12:17] [PASSED] 11 VFs
[23:12:17] [PASSED] 12 VFs
[23:12:17] [PASSED] 13 VFs
[23:12:17] [PASSED] 14 VFs
[23:12:17] [PASSED] 15 VFs
[23:12:17] [PASSED] 16 VFs
[23:12:17] [PASSED] 17 VFs
[23:12:17] [PASSED] 18 VFs
[23:12:17] [PASSED] 19 VFs
[23:12:17] [PASSED] 20 VFs
[23:12:17] [PASSED] 21 VFs
[23:12:17] [PASSED] 22 VFs
[23:12:17] [PASSED] 23 VFs
[23:12:17] [PASSED] 24 VFs
[23:12:17] [PASSED] 25 VFs
[23:12:17] [PASSED] 26 VFs
[23:12:17] [PASSED] 27 VFs
[23:12:17] [PASSED] 28 VFs
[23:12:17] [PASSED] 29 VFs
[23:12:17] [PASSED] 30 VFs
[23:12:17] [PASSED] 31 VFs
[23:12:17] [PASSED] 32 VFs
[23:12:17] [PASSED] 33 VFs
[23:12:17] [PASSED] 34 VFs
[23:12:17] [PASSED] 35 VFs
[23:12:17] [PASSED] 36 VFs
[23:12:17] [PASSED] 37 VFs
[23:12:17] [PASSED] 38 VFs
[23:12:17] [PASSED] 39 VFs
[23:12:17] [PASSED] 40 VFs
[23:12:17] [PASSED] 41 VFs
[23:12:17] [PASSED] 42 VFs
[23:12:17] [PASSED] 43 VFs
[23:12:17] [PASSED] 44 VFs
[23:12:17] [PASSED] 45 VFs
[23:12:17] [PASSED] 46 VFs
[23:12:17] [PASSED] 47 VFs
[23:12:17] [PASSED] 48 VFs
[23:12:17] [PASSED] 49 VFs
[23:12:17] [PASSED] 50 VFs
[23:12:17] [PASSED] 51 VFs
[23:12:17] [PASSED] 52 VFs
[23:12:17] [PASSED] 53 VFs
[23:12:17] [PASSED] 54 VFs
[23:12:17] [PASSED] 55 VFs
[23:12:17] [PASSED] 56 VFs
[23:12:17] [PASSED] 57 VFs
[23:12:17] [PASSED] 58 VFs
[23:12:17] [PASSED] 59 VFs
[23:12:17] [PASSED] 60 VFs
[23:12:17] [PASSED] 61 VFs
[23:12:17] [PASSED] 62 VFs
[23:12:17] [PASSED] 63 VFs
[23:12:17] ================== [PASSED] fair_contexts ==================
[23:12:17] ===================== fair_doorbells  ======================
[23:12:17] [PASSED] 1 VF
[23:12:17] [PASSED] 2 VFs
[23:12:17] [PASSED] 3 VFs
[23:12:17] [PASSED] 4 VFs
[23:12:17] [PASSED] 5 VFs
[23:12:17] [PASSED] 6 VFs
[23:12:17] [PASSED] 7 VFs
[23:12:17] [PASSED] 8 VFs
[23:12:17] [PASSED] 9 VFs
[23:12:17] [PASSED] 10 VFs
[23:12:17] [PASSED] 11 VFs
[23:12:17] [PASSED] 12 VFs
[23:12:17] [PASSED] 13 VFs
[23:12:17] [PASSED] 14 VFs
[23:12:17] [PASSED] 15 VFs
[23:12:17] [PASSED] 16 VFs
[23:12:17] [PASSED] 17 VFs
[23:12:17] [PASSED] 18 VFs
[23:12:17] [PASSED] 19 VFs
[23:12:17] [PASSED] 20 VFs
[23:12:17] [PASSED] 21 VFs
[23:12:17] [PASSED] 22 VFs
[23:12:17] [PASSED] 23 VFs
[23:12:17] [PASSED] 24 VFs
[23:12:17] [PASSED] 25 VFs
[23:12:17] [PASSED] 26 VFs
[23:12:17] [PASSED] 27 VFs
[23:12:17] [PASSED] 28 VFs
[23:12:17] [PASSED] 29 VFs
[23:12:17] [PASSED] 30 VFs
[23:12:17] [PASSED] 31 VFs
[23:12:17] [PASSED] 32 VFs
[23:12:17] [PASSED] 33 VFs
[23:12:17] [PASSED] 34 VFs
[23:12:17] [PASSED] 35 VFs
[23:12:17] [PASSED] 36 VFs
[23:12:17] [PASSED] 37 VFs
[23:12:17] [PASSED] 38 VFs
[23:12:17] [PASSED] 39 VFs
[23:12:17] [PASSED] 40 VFs
[23:12:17] [PASSED] 41 VFs
[23:12:17] [PASSED] 42 VFs
[23:12:17] [PASSED] 43 VFs
[23:12:17] [PASSED] 44 VFs
[23:12:17] [PASSED] 45 VFs
[23:12:17] [PASSED] 46 VFs
[23:12:17] [PASSED] 47 VFs
[23:12:17] [PASSED] 48 VFs
[23:12:17] [PASSED] 49 VFs
[23:12:17] [PASSED] 50 VFs
[23:12:17] [PASSED] 51 VFs
[23:12:17] [PASSED] 52 VFs
[23:12:17] [PASSED] 53 VFs
[23:12:17] [PASSED] 54 VFs
[23:12:17] [PASSED] 55 VFs
[23:12:17] [PASSED] 56 VFs
[23:12:17] [PASSED] 57 VFs
[23:12:17] [PASSED] 58 VFs
[23:12:17] [PASSED] 59 VFs
[23:12:17] [PASSED] 60 VFs
[23:12:17] [PASSED] 61 VFs
[23:12:17] [PASSED] 62 VFs
[23:12:17] [PASSED] 63 VFs
[23:12:17] ================= [PASSED] fair_doorbells ==================
[23:12:17] ======================== fair_ggtt  ========================
[23:12:17] [PASSED] 1 VF
[23:12:17] [PASSED] 2 VFs
[23:12:17] [PASSED] 3 VFs
[23:12:17] [PASSED] 4 VFs
[23:12:17] [PASSED] 5 VFs
[23:12:17] [PASSED] 6 VFs
[23:12:17] [PASSED] 7 VFs
[23:12:17] [PASSED] 8 VFs
[23:12:17] [PASSED] 9 VFs
[23:12:17] [PASSED] 10 VFs
[23:12:17] [PASSED] 11 VFs
[23:12:17] [PASSED] 12 VFs
[23:12:17] [PASSED] 13 VFs
[23:12:17] [PASSED] 14 VFs
[23:12:17] [PASSED] 15 VFs
[23:12:17] [PASSED] 16 VFs
[23:12:17] [PASSED] 17 VFs
[23:12:17] [PASSED] 18 VFs
[23:12:17] [PASSED] 19 VFs
[23:12:17] [PASSED] 20 VFs
[23:12:17] [PASSED] 21 VFs
[23:12:17] [PASSED] 22 VFs
[23:12:17] [PASSED] 23 VFs
[23:12:17] [PASSED] 24 VFs
[23:12:17] [PASSED] 25 VFs
[23:12:17] [PASSED] 26 VFs
[23:12:17] [PASSED] 27 VFs
[23:12:17] [PASSED] 28 VFs
[23:12:17] [PASSED] 29 VFs
[23:12:17] [PASSED] 30 VFs
[23:12:17] [PASSED] 31 VFs
[23:12:17] [PASSED] 32 VFs
[23:12:17] [PASSED] 33 VFs
[23:12:17] [PASSED] 34 VFs
[23:12:17] [PASSED] 35 VFs
[23:12:17] [PASSED] 36 VFs
[23:12:17] [PASSED] 37 VFs
[23:12:17] [PASSED] 38 VFs
[23:12:17] [PASSED] 39 VFs
[23:12:17] [PASSED] 40 VFs
[23:12:17] [PASSED] 41 VFs
[23:12:17] [PASSED] 42 VFs
[23:12:17] [PASSED] 43 VFs
[23:12:17] [PASSED] 44 VFs
[23:12:17] [PASSED] 45 VFs
[23:12:17] [PASSED] 46 VFs
[23:12:17] [PASSED] 47 VFs
[23:12:17] [PASSED] 48 VFs
[23:12:17] [PASSED] 49 VFs
[23:12:17] [PASSED] 50 VFs
[23:12:17] [PASSED] 51 VFs
[23:12:17] [PASSED] 52 VFs
[23:12:17] [PASSED] 53 VFs
[23:12:17] [PASSED] 54 VFs
[23:12:17] [PASSED] 55 VFs
[23:12:17] [PASSED] 56 VFs
[23:12:17] [PASSED] 57 VFs
[23:12:17] [PASSED] 58 VFs
[23:12:17] [PASSED] 59 VFs
[23:12:17] [PASSED] 60 VFs
[23:12:17] [PASSED] 61 VFs
[23:12:17] [PASSED] 62 VFs
[23:12:17] [PASSED] 63 VFs
[23:12:17] ==================== [PASSED] fair_ggtt ====================
[23:12:17] ================== [PASSED] pf_gt_config ===================
[23:12:17] ===================== lmtt (1 subtest) =====================
[23:12:17] ======================== test_ops  =========================
[23:12:17] [PASSED] 2-level
[23:12:17] [PASSED] multi-level
[23:12:17] ==================== [PASSED] test_ops =====================
[23:12:17] ====================== [PASSED] lmtt =======================
[23:12:17] ================= pf_service (11 subtests) =================
[23:12:17] [PASSED] pf_negotiate_any
[23:12:17] [PASSED] pf_negotiate_base_match
[23:12:17] [PASSED] pf_negotiate_base_newer
[23:12:17] [PASSED] pf_negotiate_base_next
[23:12:17] [SKIPPED] pf_negotiate_base_older
[23:12:17] [PASSED] pf_negotiate_base_prev
[23:12:17] [PASSED] pf_negotiate_latest_match
[23:12:17] [PASSED] pf_negotiate_latest_newer
[23:12:17] [PASSED] pf_negotiate_latest_next
[23:12:17] [SKIPPED] pf_negotiate_latest_older
[23:12:17] [SKIPPED] pf_negotiate_latest_prev
[23:12:17] =================== [PASSED] pf_service ====================
[23:12:17] ================= xe_guc_g2g (2 subtests) ==================
[23:12:17] ============== xe_live_guc_g2g_kunit_default  ==============
[23:12:17] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[23:12:17] ============== xe_live_guc_g2g_kunit_allmem  ===============
[23:12:17] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[23:12:17] =================== [SKIPPED] xe_guc_g2g ===================
[23:12:17] =================== xe_mocs (2 subtests) ===================
[23:12:17] ================ xe_live_mocs_kernel_kunit  ================
[23:12:17] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[23:12:17] ================ xe_live_mocs_reset_kunit  =================
[23:12:17] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[23:12:17] ==================== [SKIPPED] xe_mocs =====================
[23:12:17] ================= xe_migrate (2 subtests) ==================
[23:12:17] ================= xe_migrate_sanity_kunit  =================
[23:12:17] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[23:12:17] ================== xe_validate_ccs_kunit  ==================
[23:12:17] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[23:12:17] =================== [SKIPPED] xe_migrate ===================
[23:12:17] ================== xe_dma_buf (1 subtest) ==================
[23:12:17] ==================== xe_dma_buf_kunit  =====================
[23:12:17] ================ [SKIPPED] xe_dma_buf_kunit ================
[23:12:17] =================== [SKIPPED] xe_dma_buf ===================
[23:12:17] ================= xe_bo_shrink (1 subtest) =================
[23:12:17] =================== xe_bo_shrink_kunit  ====================
[23:12:17] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[23:12:17] ================== [SKIPPED] xe_bo_shrink ==================
[23:12:17] ==================== xe_bo (2 subtests) ====================
[23:12:17] ================== xe_ccs_migrate_kunit  ===================
[23:12:17] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[23:12:17] ==================== xe_bo_evict_kunit  ====================
[23:12:17] =============== [SKIPPED] xe_bo_evict_kunit ================
[23:12:17] ===================== [SKIPPED] xe_bo ======================
[23:12:17] ==================== args (13 subtests) ====================
[23:12:17] [PASSED] count_args_test
[23:12:17] [PASSED] call_args_example
[23:12:17] [PASSED] call_args_test
[23:12:17] [PASSED] drop_first_arg_example
[23:12:17] [PASSED] drop_first_arg_test
[23:12:17] [PASSED] first_arg_example
[23:12:17] [PASSED] first_arg_test
[23:12:17] [PASSED] last_arg_example
[23:12:17] [PASSED] last_arg_test
[23:12:17] [PASSED] pick_arg_example
[23:12:17] [PASSED] if_args_example
[23:12:17] [PASSED] if_args_test
[23:12:17] [PASSED] sep_comma_example
[23:12:17] ====================== [PASSED] args =======================
[23:12:17] =================== xe_pci (3 subtests) ====================
[23:12:17] ==================== check_graphics_ip  ====================
[23:12:17] [PASSED] 12.00 Xe_LP
[23:12:17] [PASSED] 12.10 Xe_LP+
[23:12:17] [PASSED] 12.55 Xe_HPG
[23:12:17] [PASSED] 12.60 Xe_HPC
[23:12:17] [PASSED] 12.70 Xe_LPG
[23:12:17] [PASSED] 12.71 Xe_LPG
[23:12:17] [PASSED] 12.74 Xe_LPG+
[23:12:17] [PASSED] 20.01 Xe2_HPG
[23:12:17] [PASSED] 20.02 Xe2_HPG
[23:12:17] [PASSED] 20.04 Xe2_LPG
[23:12:17] [PASSED] 30.00 Xe3_LPG
[23:12:17] [PASSED] 30.01 Xe3_LPG
[23:12:17] [PASSED] 30.03 Xe3_LPG
[23:12:17] [PASSED] 30.04 Xe3_LPG
[23:12:17] [PASSED] 30.05 Xe3_LPG
[23:12:17] [PASSED] 35.11 Xe3p_XPC
[23:12:17] ================ [PASSED] check_graphics_ip ================
[23:12:17] ===================== check_media_ip  ======================
[23:12:17] [PASSED] 12.00 Xe_M
[23:12:17] [PASSED] 12.55 Xe_HPM
[23:12:17] [PASSED] 13.00 Xe_LPM+
[23:12:17] [PASSED] 13.01 Xe2_HPM
[23:12:17] [PASSED] 20.00 Xe2_LPM
[23:12:17] [PASSED] 30.00 Xe3_LPM
[23:12:17] [PASSED] 30.02 Xe3_LPM
[23:12:17] [PASSED] 35.00 Xe3p_LPM
[23:12:17] [PASSED] 35.03 Xe3p_HPM
[23:12:17] ================= [PASSED] check_media_ip ==================
[23:12:17] =================== check_platform_desc  ===================
[23:12:17] [PASSED] 0x9A60 (TIGERLAKE)
[23:12:17] [PASSED] 0x9A68 (TIGERLAKE)
[23:12:17] [PASSED] 0x9A70 (TIGERLAKE)
[23:12:17] [PASSED] 0x9A40 (TIGERLAKE)
[23:12:17] [PASSED] 0x9A49 (TIGERLAKE)
[23:12:17] [PASSED] 0x9A59 (TIGERLAKE)
[23:12:17] [PASSED] 0x9A78 (TIGERLAKE)
[23:12:17] [PASSED] 0x9AC0 (TIGERLAKE)
[23:12:17] [PASSED] 0x9AC9 (TIGERLAKE)
[23:12:17] [PASSED] 0x9AD9 (TIGERLAKE)
[23:12:17] [PASSED] 0x9AF8 (TIGERLAKE)
[23:12:17] [PASSED] 0x4C80 (ROCKETLAKE)
[23:12:17] [PASSED] 0x4C8A (ROCKETLAKE)
[23:12:17] [PASSED] 0x4C8B (ROCKETLAKE)
[23:12:17] [PASSED] 0x4C8C (ROCKETLAKE)
[23:12:17] [PASSED] 0x4C90 (ROCKETLAKE)
[23:12:17] [PASSED] 0x4C9A (ROCKETLAKE)
[23:12:17] [PASSED] 0x4680 (ALDERLAKE_S)
[23:12:17] [PASSED] 0x4682 (ALDERLAKE_S)
[23:12:17] [PASSED] 0x4688 (ALDERLAKE_S)
[23:12:17] [PASSED] 0x468A (ALDERLAKE_S)
[23:12:17] [PASSED] 0x468B (ALDERLAKE_S)
[23:12:17] [PASSED] 0x4690 (ALDERLAKE_S)
[23:12:17] [PASSED] 0x4692 (ALDERLAKE_S)
[23:12:17] [PASSED] 0x4693 (ALDERLAKE_S)
[23:12:17] [PASSED] 0x46A0 (ALDERLAKE_P)
[23:12:17] [PASSED] 0x46A1 (ALDERLAKE_P)
[23:12:17] [PASSED] 0x46A2 (ALDERLAKE_P)
[23:12:17] [PASSED] 0x46A3 (ALDERLAKE_P)
[23:12:17] [PASSED] 0x46A6 (ALDERLAKE_P)
[23:12:17] [PASSED] 0x46A8 (ALDERLAKE_P)
[23:12:17] [PASSED] 0x46AA (ALDERLAKE_P)
[23:12:17] [PASSED] 0x462A (ALDERLAKE_P)
[23:12:17] [PASSED] 0x4626 (ALDERLAKE_P)
[23:12:17] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[23:12:17] [PASSED] 0x46B0 (ALDERLAKE_P)
[23:12:17] [PASSED] 0x46B1 (ALDERLAKE_P)
[23:12:17] [PASSED] 0x46B2 (ALDERLAKE_P)
[23:12:17] [PASSED] 0x46B3 (ALDERLAKE_P)
[23:12:17] [PASSED] 0x46C0 (ALDERLAKE_P)
[23:12:17] [PASSED] 0x46C1 (ALDERLAKE_P)
[23:12:17] [PASSED] 0x46C2 (ALDERLAKE_P)
[23:12:17] [PASSED] 0x46C3 (ALDERLAKE_P)
[23:12:17] [PASSED] 0x46D0 (ALDERLAKE_N)
[23:12:17] [PASSED] 0x46D1 (ALDERLAKE_N)
[23:12:17] [PASSED] 0x46D2 (ALDERLAKE_N)
[23:12:17] [PASSED] 0x46D3 (ALDERLAKE_N)
[23:12:17] [PASSED] 0x46D4 (ALDERLAKE_N)
[23:12:17] [PASSED] 0xA721 (ALDERLAKE_P)
[23:12:17] [PASSED] 0xA7A1 (ALDERLAKE_P)
[23:12:17] [PASSED] 0xA7A9 (ALDERLAKE_P)
[23:12:17] [PASSED] 0xA7AC (ALDERLAKE_P)
[23:12:17] [PASSED] 0xA7AD (ALDERLAKE_P)
[23:12:17] [PASSED] 0xA720 (ALDERLAKE_P)
[23:12:17] [PASSED] 0xA7A0 (ALDERLAKE_P)
[23:12:17] [PASSED] 0xA7A8 (ALDERLAKE_P)
[23:12:17] [PASSED] 0xA7AA (ALDERLAKE_P)
[23:12:17] [PASSED] 0xA7AB (ALDERLAKE_P)
[23:12:17] [PASSED] 0xA780 (ALDERLAKE_S)
[23:12:17] [PASSED] 0xA781 (ALDERLAKE_S)
[23:12:17] [PASSED] 0xA782 (ALDERLAKE_S)
[23:12:17] [PASSED] 0xA783 (ALDERLAKE_S)
[23:12:17] [PASSED] 0xA788 (ALDERLAKE_S)
[23:12:17] [PASSED] 0xA789 (ALDERLAKE_S)
[23:12:17] [PASSED] 0xA78A (ALDERLAKE_S)
[23:12:17] [PASSED] 0xA78B (ALDERLAKE_S)
[23:12:17] [PASSED] 0x4905 (DG1)
[23:12:17] [PASSED] 0x4906 (DG1)
[23:12:17] [PASSED] 0x4907 (DG1)
[23:12:17] [PASSED] 0x4908 (DG1)
[23:12:17] [PASSED] 0x4909 (DG1)
[23:12:17] [PASSED] 0x56C0 (DG2)
[23:12:17] [PASSED] 0x56C2 (DG2)
[23:12:17] [PASSED] 0x56C1 (DG2)
[23:12:17] [PASSED] 0x7D51 (METEORLAKE)
[23:12:17] [PASSED] 0x7DD1 (METEORLAKE)
[23:12:17] [PASSED] 0x7D41 (METEORLAKE)
[23:12:17] [PASSED] 0x7D67 (METEORLAKE)
[23:12:17] [PASSED] 0xB640 (METEORLAKE)
[23:12:17] [PASSED] 0x56A0 (DG2)
[23:12:17] [PASSED] 0x56A1 (DG2)
[23:12:17] [PASSED] 0x56A2 (DG2)
[23:12:17] [PASSED] 0x56BE (DG2)
[23:12:17] [PASSED] 0x56BF (DG2)
[23:12:17] [PASSED] 0x5690 (DG2)
[23:12:17] [PASSED] 0x5691 (DG2)
[23:12:17] [PASSED] 0x5692 (DG2)
[23:12:17] [PASSED] 0x56A5 (DG2)
[23:12:17] [PASSED] 0x56A6 (DG2)
[23:12:17] [PASSED] 0x56B0 (DG2)
[23:12:17] [PASSED] 0x56B1 (DG2)
[23:12:17] [PASSED] 0x56BA (DG2)
[23:12:17] [PASSED] 0x56BB (DG2)
[23:12:17] [PASSED] 0x56BC (DG2)
[23:12:17] [PASSED] 0x56BD (DG2)
[23:12:17] [PASSED] 0x5693 (DG2)
[23:12:17] [PASSED] 0x5694 (DG2)
[23:12:17] [PASSED] 0x5695 (DG2)
[23:12:17] [PASSED] 0x56A3 (DG2)
[23:12:17] [PASSED] 0x56A4 (DG2)
[23:12:17] [PASSED] 0x56B2 (DG2)
[23:12:17] [PASSED] 0x56B3 (DG2)
[23:12:17] [PASSED] 0x5696 (DG2)
[23:12:17] [PASSED] 0x5697 (DG2)
[23:12:17] [PASSED] 0xB69 (PVC)
[23:12:17] [PASSED] 0xB6E (PVC)
[23:12:17] [PASSED] 0xBD4 (PVC)
[23:12:17] [PASSED] 0xBD5 (PVC)
[23:12:17] [PASSED] 0xBD6 (PVC)
[23:12:17] [PASSED] 0xBD7 (PVC)
[23:12:17] [PASSED] 0xBD8 (PVC)
[23:12:17] [PASSED] 0xBD9 (PVC)
[23:12:17] [PASSED] 0xBDA (PVC)
[23:12:17] [PASSED] 0xBDB (PVC)
[23:12:17] [PASSED] 0xBE0 (PVC)
[23:12:17] [PASSED] 0xBE1 (PVC)
[23:12:17] [PASSED] 0xBE5 (PVC)
[23:12:17] [PASSED] 0x7D40 (METEORLAKE)
[23:12:17] [PASSED] 0x7D45 (METEORLAKE)
[23:12:17] [PASSED] 0x7D55 (METEORLAKE)
[23:12:17] [PASSED] 0x7D60 (METEORLAKE)
[23:12:17] [PASSED] 0x7DD5 (METEORLAKE)
[23:12:17] [PASSED] 0x6420 (LUNARLAKE)
[23:12:17] [PASSED] 0x64A0 (LUNARLAKE)
[23:12:17] [PASSED] 0x64B0 (LUNARLAKE)
[23:12:17] [PASSED] 0xE202 (BATTLEMAGE)
[23:12:17] [PASSED] 0xE209 (BATTLEMAGE)
[23:12:17] [PASSED] 0xE20B (BATTLEMAGE)
[23:12:17] [PASSED] 0xE20C (BATTLEMAGE)
[23:12:17] [PASSED] 0xE20D (BATTLEMAGE)
[23:12:17] [PASSED] 0xE210 (BATTLEMAGE)
[23:12:17] [PASSED] 0xE211 (BATTLEMAGE)
[23:12:17] [PASSED] 0xE212 (BATTLEMAGE)
[23:12:17] [PASSED] 0xE216 (BATTLEMAGE)
[23:12:17] [PASSED] 0xE220 (BATTLEMAGE)
[23:12:17] [PASSED] 0xE221 (BATTLEMAGE)
[23:12:17] [PASSED] 0xE222 (BATTLEMAGE)
[23:12:17] [PASSED] 0xE223 (BATTLEMAGE)
[23:12:17] [PASSED] 0xB080 (PANTHERLAKE)
[23:12:17] [PASSED] 0xB081 (PANTHERLAKE)
[23:12:17] [PASSED] 0xB082 (PANTHERLAKE)
[23:12:17] [PASSED] 0xB083 (PANTHERLAKE)
[23:12:17] [PASSED] 0xB084 (PANTHERLAKE)
[23:12:17] [PASSED] 0xB085 (PANTHERLAKE)
[23:12:17] [PASSED] 0xB086 (PANTHERLAKE)
[23:12:17] [PASSED] 0xB087 (PANTHERLAKE)
[23:12:17] [PASSED] 0xB08F (PANTHERLAKE)
[23:12:17] [PASSED] 0xB090 (PANTHERLAKE)
[23:12:17] [PASSED] 0xB0A0 (PANTHERLAKE)
[23:12:17] [PASSED] 0xB0B0 (PANTHERLAKE)
[23:12:17] [PASSED] 0xFD80 (PANTHERLAKE)
[23:12:17] [PASSED] 0xFD81 (PANTHERLAKE)
[23:12:17] [PASSED] 0xD740 (NOVALAKE_S)
[23:12:17] [PASSED] 0xD741 (NOVALAKE_S)
[23:12:17] [PASSED] 0xD742 (NOVALAKE_S)
[23:12:17] [PASSED] 0xD743 (NOVALAKE_S)
[23:12:17] [PASSED] 0xD744 (NOVALAKE_S)
[23:12:17] [PASSED] 0xD745 (NOVALAKE_S)
[23:12:17] [PASSED] 0x674C (CRESCENTISLAND)
[23:12:17] =============== [PASSED] check_platform_desc ===============
[23:12:17] ===================== [PASSED] xe_pci ======================
[23:12:17] =================== xe_rtp (2 subtests) ====================
[23:12:17] =============== xe_rtp_process_to_sr_tests  ================
[23:12:17] [PASSED] coalesce-same-reg
[23:12:17] [PASSED] no-match-no-add
[23:12:17] [PASSED] match-or
[23:12:17] [PASSED] match-or-xfail
[23:12:17] [PASSED] no-match-no-add-multiple-rules
[23:12:17] [PASSED] two-regs-two-entries
[23:12:17] [PASSED] clr-one-set-other
[23:12:17] [PASSED] set-field
[23:12:17] [PASSED] conflict-duplicate
[23:12:17] [PASSED] conflict-not-disjoint
[23:12:17] [PASSED] conflict-reg-type
[23:12:17] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[23:12:17] ================== xe_rtp_process_tests  ===================
[23:12:17] [PASSED] active1
[23:12:17] [PASSED] active2
[23:12:17] [PASSED] active-inactive
[23:12:17] [PASSED] inactive-active
[23:12:17] [PASSED] inactive-1st_or_active-inactive
[23:12:17] [PASSED] inactive-2nd_or_active-inactive
[23:12:17] [PASSED] inactive-last_or_active-inactive
[23:12:17] [PASSED] inactive-no_or_active-inactive
[23:12:17] ============== [PASSED] xe_rtp_process_tests ===============
[23:12:17] ===================== [PASSED] xe_rtp ======================
[23:12:17] ==================== xe_wa (1 subtest) =====================
[23:12:17] ======================== xe_wa_gt  =========================
[23:12:17] [PASSED] TIGERLAKE B0
[23:12:17] [PASSED] DG1 A0
[23:12:17] [PASSED] DG1 B0
[23:12:17] [PASSED] ALDERLAKE_S A0
[23:12:17] [PASSED] ALDERLAKE_S B0
[23:12:17] [PASSED] ALDERLAKE_S C0
[23:12:17] [PASSED] ALDERLAKE_S D0
[23:12:17] [PASSED] ALDERLAKE_P A0
[23:12:17] [PASSED] ALDERLAKE_P B0
[23:12:17] [PASSED] ALDERLAKE_P C0
[23:12:17] [PASSED] ALDERLAKE_S RPLS D0
[23:12:17] [PASSED] ALDERLAKE_P RPLU E0
[23:12:17] [PASSED] DG2 G10 C0
[23:12:17] [PASSED] DG2 G11 B1
[23:12:17] [PASSED] DG2 G12 A1
[23:12:17] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:12:17] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:12:17] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[23:12:17] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[23:12:17] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[23:12:17] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[23:12:17] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[23:12:17] ==================== [PASSED] xe_wa_gt =====================
[23:12:17] ====================== [PASSED] xe_wa ======================
[23:12:17] ============================================================
[23:12:17] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[23:12:17] Elapsed time: 36.995s total, 4.265s configuring, 32.256s building, 0.461s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[23:12:17] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:12:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:12:45] Starting KUnit Kernel (1/1)...
[23:12:45] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:12:45] ============ drm_test_pick_cmdline (2 subtests) ============
[23:12:45] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[23:12:45] =============== drm_test_pick_cmdline_named  ===============
[23:12:45] [PASSED] NTSC
[23:12:45] [PASSED] NTSC-J
[23:12:45] [PASSED] PAL
[23:12:45] [PASSED] PAL-M
[23:12:45] =========== [PASSED] drm_test_pick_cmdline_named ===========
[23:12:45] ============== [PASSED] drm_test_pick_cmdline ==============
[23:12:45] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[23:12:45] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[23:12:45] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[23:12:45] =========== drm_validate_clone_mode (2 subtests) ===========
[23:12:45] ============== drm_test_check_in_clone_mode  ===============
[23:12:45] [PASSED] in_clone_mode
[23:12:45] [PASSED] not_in_clone_mode
[23:12:45] ========== [PASSED] drm_test_check_in_clone_mode ===========
[23:12:45] =============== drm_test_check_valid_clones  ===============
[23:12:45] [PASSED] not_in_clone_mode
[23:12:45] [PASSED] valid_clone
[23:12:45] [PASSED] invalid_clone
[23:12:45] =========== [PASSED] drm_test_check_valid_clones ===========
[23:12:45] ============= [PASSED] drm_validate_clone_mode =============
[23:12:45] ============= drm_validate_modeset (1 subtest) =============
[23:12:45] [PASSED] drm_test_check_connector_changed_modeset
[23:12:45] ============== [PASSED] drm_validate_modeset ===============
[23:12:45] ====== drm_test_bridge_get_current_state (2 subtests) ======
[23:12:45] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[23:12:45] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[23:12:45] ======== [PASSED] drm_test_bridge_get_current_state ========
[23:12:45] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[23:12:45] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[23:12:45] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[23:12:45] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[23:12:45] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[23:12:45] ============== drm_bridge_alloc (2 subtests) ===============
[23:12:45] [PASSED] drm_test_drm_bridge_alloc_basic
[23:12:45] [PASSED] drm_test_drm_bridge_alloc_get_put
[23:12:45] ================ [PASSED] drm_bridge_alloc =================
[23:12:45] ================== drm_buddy (9 subtests) ==================
[23:12:45] [PASSED] drm_test_buddy_alloc_limit
[23:12:45] [PASSED] drm_test_buddy_alloc_optimistic
[23:12:45] [PASSED] drm_test_buddy_alloc_pessimistic
[23:12:45] [PASSED] drm_test_buddy_alloc_pathological
[23:12:45] [PASSED] drm_test_buddy_alloc_contiguous
[23:12:45] [PASSED] drm_test_buddy_alloc_clear
[23:12:45] [PASSED] drm_test_buddy_alloc_range_bias
[23:12:45] [PASSED] drm_test_buddy_fragmentation_performance
[23:12:45] [PASSED] drm_test_buddy_alloc_exceeds_max_order
[23:12:45] ==================== [PASSED] drm_buddy ====================
[23:12:45] ============= drm_cmdline_parser (40 subtests) =============
[23:12:45] [PASSED] drm_test_cmdline_force_d_only
[23:12:45] [PASSED] drm_test_cmdline_force_D_only_dvi
[23:12:45] [PASSED] drm_test_cmdline_force_D_only_hdmi
[23:12:45] [PASSED] drm_test_cmdline_force_D_only_not_digital
[23:12:45] [PASSED] drm_test_cmdline_force_e_only
[23:12:45] [PASSED] drm_test_cmdline_res
[23:12:45] [PASSED] drm_test_cmdline_res_vesa
[23:12:45] [PASSED] drm_test_cmdline_res_vesa_rblank
[23:12:45] [PASSED] drm_test_cmdline_res_rblank
[23:12:45] [PASSED] drm_test_cmdline_res_bpp
[23:12:45] [PASSED] drm_test_cmdline_res_refresh
[23:12:45] [PASSED] drm_test_cmdline_res_bpp_refresh
[23:12:45] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[23:12:45] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[23:12:45] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[23:12:45] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[23:12:45] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[23:12:45] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[23:12:45] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[23:12:45] [PASSED] drm_test_cmdline_res_margins_force_on
[23:12:45] [PASSED] drm_test_cmdline_res_vesa_margins
[23:12:45] [PASSED] drm_test_cmdline_name
[23:12:45] [PASSED] drm_test_cmdline_name_bpp
[23:12:45] [PASSED] drm_test_cmdline_name_option
[23:12:45] [PASSED] drm_test_cmdline_name_bpp_option
[23:12:45] [PASSED] drm_test_cmdline_rotate_0
[23:12:45] [PASSED] drm_test_cmdline_rotate_90
[23:12:45] [PASSED] drm_test_cmdline_rotate_180
[23:12:45] [PASSED] drm_test_cmdline_rotate_270
[23:12:45] [PASSED] drm_test_cmdline_hmirror
[23:12:45] [PASSED] drm_test_cmdline_vmirror
[23:12:45] [PASSED] drm_test_cmdline_margin_options
[23:12:45] [PASSED] drm_test_cmdline_multiple_options
[23:12:45] [PASSED] drm_test_cmdline_bpp_extra_and_option
[23:12:45] [PASSED] drm_test_cmdline_extra_and_option
[23:12:45] [PASSED] drm_test_cmdline_freestanding_options
[23:12:45] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[23:12:45] [PASSED] drm_test_cmdline_panel_orientation
[23:12:45] ================ drm_test_cmdline_invalid  =================
[23:12:45] [PASSED] margin_only
[23:12:45] [PASSED] interlace_only
[23:12:45] [PASSED] res_missing_x
[23:12:45] [PASSED] res_missing_y
[23:12:45] [PASSED] res_bad_y
[23:12:45] [PASSED] res_missing_y_bpp
[23:12:45] [PASSED] res_bad_bpp
[23:12:45] [PASSED] res_bad_refresh
[23:12:45] [PASSED] res_bpp_refresh_force_on_off
[23:12:45] [PASSED] res_invalid_mode
[23:12:45] [PASSED] res_bpp_wrong_place_mode
[23:12:45] [PASSED] name_bpp_refresh
[23:12:45] [PASSED] name_refresh
[23:12:45] [PASSED] name_refresh_wrong_mode
[23:12:45] [PASSED] name_refresh_invalid_mode
[23:12:45] [PASSED] rotate_multiple
[23:12:45] [PASSED] rotate_invalid_val
[23:12:45] [PASSED] rotate_truncated
[23:12:45] [PASSED] invalid_option
[23:12:45] [PASSED] invalid_tv_option
[23:12:45] [PASSED] truncated_tv_option
[23:12:45] ============ [PASSED] drm_test_cmdline_invalid =============
[23:12:45] =============== drm_test_cmdline_tv_options  ===============
[23:12:45] [PASSED] NTSC
[23:12:45] [PASSED] NTSC_443
[23:12:45] [PASSED] NTSC_J
[23:12:45] [PASSED] PAL
[23:12:45] [PASSED] PAL_M
[23:12:45] [PASSED] PAL_N
[23:12:45] [PASSED] SECAM
[23:12:45] [PASSED] MONO_525
[23:12:45] [PASSED] MONO_625
[23:12:45] =========== [PASSED] drm_test_cmdline_tv_options ===========
[23:12:45] =============== [PASSED] drm_cmdline_parser ================
[23:12:45] ========== drmm_connector_hdmi_init (20 subtests) ==========
[23:12:45] [PASSED] drm_test_connector_hdmi_init_valid
[23:12:45] [PASSED] drm_test_connector_hdmi_init_bpc_8
[23:12:45] [PASSED] drm_test_connector_hdmi_init_bpc_10
[23:12:45] [PASSED] drm_test_connector_hdmi_init_bpc_12
[23:12:45] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[23:12:45] [PASSED] drm_test_connector_hdmi_init_bpc_null
[23:12:45] [PASSED] drm_test_connector_hdmi_init_formats_empty
[23:12:45] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[23:12:45] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[23:12:45] [PASSED] supported_formats=0x9 yuv420_allowed=1
[23:12:45] [PASSED] supported_formats=0x9 yuv420_allowed=0
[23:12:45] [PASSED] supported_formats=0x3 yuv420_allowed=1
[23:12:45] [PASSED] supported_formats=0x3 yuv420_allowed=0
[23:12:45] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[23:12:45] [PASSED] drm_test_connector_hdmi_init_null_ddc
[23:12:45] [PASSED] drm_test_connector_hdmi_init_null_product
[23:12:45] [PASSED] drm_test_connector_hdmi_init_null_vendor
[23:12:45] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[23:12:45] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[23:12:45] [PASSED] drm_test_connector_hdmi_init_product_valid
[23:12:45] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[23:12:45] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[23:12:45] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[23:12:45] ========= drm_test_connector_hdmi_init_type_valid  =========
[23:12:45] [PASSED] HDMI-A
[23:12:45] [PASSED] HDMI-B
[23:12:45] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[23:12:45] ======== drm_test_connector_hdmi_init_type_invalid  ========
[23:12:45] [PASSED] Unknown
[23:12:45] [PASSED] VGA
[23:12:45] [PASSED] DVI-I
[23:12:45] [PASSED] DVI-D
[23:12:45] [PASSED] DVI-A
[23:12:45] [PASSED] Composite
[23:12:45] [PASSED] SVIDEO
[23:12:45] [PASSED] LVDS
[23:12:45] [PASSED] Component
[23:12:45] [PASSED] DIN
[23:12:45] [PASSED] DP
[23:12:45] [PASSED] TV
[23:12:45] [PASSED] eDP
[23:12:45] [PASSED] Virtual
[23:12:45] [PASSED] DSI
[23:12:45] [PASSED] DPI
[23:12:45] [PASSED] Writeback
[23:12:45] [PASSED] SPI
[23:12:45] [PASSED] USB
[23:12:45] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[23:12:45] ============ [PASSED] drmm_connector_hdmi_init =============
[23:12:45] ============= drmm_connector_init (3 subtests) =============
[23:12:45] [PASSED] drm_test_drmm_connector_init
[23:12:45] [PASSED] drm_test_drmm_connector_init_null_ddc
[23:12:45] ========= drm_test_drmm_connector_init_type_valid  =========
[23:12:45] [PASSED] Unknown
[23:12:45] [PASSED] VGA
[23:12:45] [PASSED] DVI-I
[23:12:45] [PASSED] DVI-D
[23:12:45] [PASSED] DVI-A
[23:12:45] [PASSED] Composite
[23:12:45] [PASSED] SVIDEO
[23:12:45] [PASSED] LVDS
[23:12:45] [PASSED] Component
[23:12:45] [PASSED] DIN
[23:12:45] [PASSED] DP
[23:12:45] [PASSED] HDMI-A
[23:12:45] [PASSED] HDMI-B
[23:12:45] [PASSED] TV
[23:12:45] [PASSED] eDP
[23:12:45] [PASSED] Virtual
[23:12:45] [PASSED] DSI
[23:12:45] [PASSED] DPI
[23:12:45] [PASSED] Writeback
[23:12:45] [PASSED] SPI
[23:12:45] [PASSED] USB
[23:12:45] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[23:12:45] =============== [PASSED] drmm_connector_init ===============
[23:12:45] ========= drm_connector_dynamic_init (6 subtests) ==========
[23:12:45] [PASSED] drm_test_drm_connector_dynamic_init
[23:12:45] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[23:12:45] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[23:12:45] [PASSED] drm_test_drm_connector_dynamic_init_properties
[23:12:45] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[23:12:45] [PASSED] Unknown
[23:12:45] [PASSED] VGA
[23:12:45] [PASSED] DVI-I
[23:12:45] [PASSED] DVI-D
[23:12:45] [PASSED] DVI-A
[23:12:45] [PASSED] Composite
[23:12:45] [PASSED] SVIDEO
[23:12:45] [PASSED] LVDS
[23:12:45] [PASSED] Component
[23:12:45] [PASSED] DIN
[23:12:45] [PASSED] DP
[23:12:45] [PASSED] HDMI-A
[23:12:45] [PASSED] HDMI-B
[23:12:45] [PASSED] TV
[23:12:45] [PASSED] eDP
[23:12:45] [PASSED] Virtual
[23:12:45] [PASSED] DSI
[23:12:45] [PASSED] DPI
[23:12:45] [PASSED] Writeback
[23:12:45] [PASSED] SPI
[23:12:45] [PASSED] USB
[23:12:45] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[23:12:45] ======== drm_test_drm_connector_dynamic_init_name  =========
[23:12:45] [PASSED] Unknown
[23:12:45] [PASSED] VGA
[23:12:45] [PASSED] DVI-I
[23:12:45] [PASSED] DVI-D
[23:12:45] [PASSED] DVI-A
[23:12:45] [PASSED] Composite
[23:12:45] [PASSED] SVIDEO
[23:12:45] [PASSED] LVDS
[23:12:45] [PASSED] Component
[23:12:45] [PASSED] DIN
[23:12:45] [PASSED] DP
[23:12:45] [PASSED] HDMI-A
[23:12:45] [PASSED] HDMI-B
[23:12:45] [PASSED] TV
[23:12:45] [PASSED] eDP
[23:12:45] [PASSED] Virtual
[23:12:45] [PASSED] DSI
[23:12:45] [PASSED] DPI
[23:12:45] [PASSED] Writeback
[23:12:45] [PASSED] SPI
[23:12:45] [PASSED] USB
[23:12:45] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[23:12:45] =========== [PASSED] drm_connector_dynamic_init ============
[23:12:45] ==== drm_connector_dynamic_register_early (4 subtests) =====
[23:12:45] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[23:12:45] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[23:12:45] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[23:12:45] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[23:12:45] ====== [PASSED] drm_connector_dynamic_register_early =======
[23:12:45] ======= drm_connector_dynamic_register (7 subtests) ========
[23:12:45] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[23:12:45] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[23:12:45] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[23:12:45] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[23:12:45] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[23:12:45] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[23:12:45] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[23:12:45] ========= [PASSED] drm_connector_dynamic_register ==========
[23:12:45] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[23:12:45] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[23:12:45] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[23:12:45] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[23:12:45] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[23:12:45] ========== drm_test_get_tv_mode_from_name_valid  ===========
[23:12:45] [PASSED] NTSC
[23:12:45] [PASSED] NTSC-443
[23:12:45] [PASSED] NTSC-J
[23:12:45] [PASSED] PAL
[23:12:45] [PASSED] PAL-M
[23:12:45] [PASSED] PAL-N
[23:12:45] [PASSED] SECAM
[23:12:45] [PASSED] Mono
[23:12:45] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[23:12:45] [PASSED] drm_test_get_tv_mode_from_name_truncated
[23:12:45] ============ [PASSED] drm_get_tv_mode_from_name ============
[23:12:45] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[23:12:45] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[23:12:45] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[23:12:45] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[23:12:45] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[23:12:45] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[23:12:45] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[23:12:45] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[23:12:45] [PASSED] VIC 96
[23:12:45] [PASSED] VIC 97
[23:12:45] [PASSED] VIC 101
[23:12:45] [PASSED] VIC 102
[23:12:45] [PASSED] VIC 106
[23:12:45] [PASSED] VIC 107
[23:12:45] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[23:12:45] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[23:12:45] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[23:12:45] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[23:12:45] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[23:12:45] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[23:12:45] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[23:12:45] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[23:12:45] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[23:12:45] [PASSED] Automatic
[23:12:45] [PASSED] Full
[23:12:45] [PASSED] Limited 16:235
[23:12:45] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[23:12:45] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[23:12:45] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[23:12:45] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[23:12:45] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[23:12:45] [PASSED] RGB
[23:12:45] [PASSED] YUV 4:2:0
[23:12:45] [PASSED] YUV 4:2:2
[23:12:45] [PASSED] YUV 4:4:4
[23:12:45] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[23:12:45] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[23:12:45] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[23:12:45] ============= drm_damage_helper (21 subtests) ==============
[23:12:45] [PASSED] drm_test_damage_iter_no_damage
[23:12:45] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[23:12:45] [PASSED] drm_test_damage_iter_no_damage_src_moved
[23:12:45] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[23:12:45] [PASSED] drm_test_damage_iter_no_damage_not_visible
[23:12:45] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[23:12:45] [PASSED] drm_test_damage_iter_no_damage_no_fb
[23:12:45] [PASSED] drm_test_damage_iter_simple_damage
[23:12:45] [PASSED] drm_test_damage_iter_single_damage
[23:12:45] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[23:12:45] [PASSED] drm_test_damage_iter_single_damage_outside_src
[23:12:45] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[23:12:45] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[23:12:45] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[23:12:45] [PASSED] drm_test_damage_iter_single_damage_src_moved
[23:12:45] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[23:12:45] [PASSED] drm_test_damage_iter_damage
[23:12:45] [PASSED] drm_test_damage_iter_damage_one_intersect
[23:12:45] [PASSED] drm_test_damage_iter_damage_one_outside
[23:12:45] [PASSED] drm_test_damage_iter_damage_src_moved
[23:12:45] [PASSED] drm_test_damage_iter_damage_not_visible
[23:12:45] ================ [PASSED] drm_damage_helper ================
[23:12:45] ============== drm_dp_mst_helper (3 subtests) ==============
[23:12:45] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[23:12:45] [PASSED] Clock 154000 BPP 30 DSC disabled
[23:12:45] [PASSED] Clock 234000 BPP 30 DSC disabled
[23:12:45] [PASSED] Clock 297000 BPP 24 DSC disabled
[23:12:45] [PASSED] Clock 332880 BPP 24 DSC enabled
[23:12:45] [PASSED] Clock 324540 BPP 24 DSC enabled
[23:12:45] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[23:12:45] ============== drm_test_dp_mst_calc_pbn_div  ===============
[23:12:45] [PASSED] Link rate 2000000 lane count 4
[23:12:45] [PASSED] Link rate 2000000 lane count 2
[23:12:45] [PASSED] Link rate 2000000 lane count 1
[23:12:45] [PASSED] Link rate 1350000 lane count 4
[23:12:45] [PASSED] Link rate 1350000 lane count 2
[23:12:45] [PASSED] Link rate 1350000 lane count 1
[23:12:45] [PASSED] Link rate 1000000 lane count 4
[23:12:45] [PASSED] Link rate 1000000 lane count 2
[23:12:45] [PASSED] Link rate 1000000 lane count 1
[23:12:45] [PASSED] Link rate 810000 lane count 4
[23:12:45] [PASSED] Link rate 810000 lane count 2
[23:12:45] [PASSED] Link rate 810000 lane count 1
[23:12:45] [PASSED] Link rate 540000 lane count 4
[23:12:45] [PASSED] Link rate 540000 lane count 2
[23:12:45] [PASSED] Link rate 540000 lane count 1
[23:12:45] [PASSED] Link rate 270000 lane count 4
[23:12:45] [PASSED] Link rate 270000 lane count 2
[23:12:45] [PASSED] Link rate 270000 lane count 1
[23:12:45] [PASSED] Link rate 162000 lane count 4
[23:12:45] [PASSED] Link rate 162000 lane count 2
[23:12:45] [PASSED] Link rate 162000 lane count 1
[23:12:45] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[23:12:45] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[23:12:45] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[23:12:45] [PASSED] DP_POWER_UP_PHY with port number
[23:12:45] [PASSED] DP_POWER_DOWN_PHY with port number
[23:12:45] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[23:12:45] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[23:12:45] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[23:12:45] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[23:12:45] [PASSED] DP_QUERY_PAYLOAD with port number
[23:12:45] [PASSED] DP_QUERY_PAYLOAD with VCPI
[23:12:45] [PASSED] DP_REMOTE_DPCD_READ with port number
[23:12:45] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[23:12:45] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[23:12:45] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[23:12:45] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[23:12:45] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[23:12:45] [PASSED] DP_REMOTE_I2C_READ with port number
[23:12:45] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[23:12:45] [PASSED] DP_REMOTE_I2C_READ with transactions array
[23:12:45] [PASSED] DP_REMOTE_I2C_WRITE with port number
[23:12:45] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[23:12:45] [PASSED] DP_REMOTE_I2C_WRITE with data array
[23:12:45] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[23:12:45] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[23:12:45] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[23:12:45] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[23:12:45] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[23:12:45] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[23:12:45] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[23:12:45] ================ [PASSED] drm_dp_mst_helper ================
[23:12:45] ================== drm_exec (7 subtests) ===================
[23:12:45] [PASSED] sanitycheck
[23:12:45] [PASSED] test_lock
[23:12:45] [PASSED] test_lock_unlock
[23:12:45] [PASSED] test_duplicates
[23:12:45] [PASSED] test_prepare
[23:12:45] [PASSED] test_prepare_array
[23:12:45] [PASSED] test_multiple_loops
[23:12:45] ==================== [PASSED] drm_exec =====================
[23:12:45] =========== drm_format_helper_test (17 subtests) ===========
[23:12:45] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[23:12:45] [PASSED] single_pixel_source_buffer
[23:12:45] [PASSED] single_pixel_clip_rectangle
[23:12:45] [PASSED] well_known_colors
[23:12:45] [PASSED] destination_pitch
[23:12:45] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[23:12:45] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[23:12:45] [PASSED] single_pixel_source_buffer
[23:12:45] [PASSED] single_pixel_clip_rectangle
[23:12:45] [PASSED] well_known_colors
[23:12:45] [PASSED] destination_pitch
[23:12:45] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[23:12:45] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[23:12:45] [PASSED] single_pixel_source_buffer
[23:12:45] [PASSED] single_pixel_clip_rectangle
[23:12:45] [PASSED] well_known_colors
[23:12:45] [PASSED] destination_pitch
[23:12:45] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[23:12:45] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[23:12:45] [PASSED] single_pixel_source_buffer
[23:12:45] [PASSED] single_pixel_clip_rectangle
[23:12:45] [PASSED] well_known_colors
[23:12:45] [PASSED] destination_pitch
[23:12:45] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[23:12:45] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[23:12:45] [PASSED] single_pixel_source_buffer
[23:12:45] [PASSED] single_pixel_clip_rectangle
[23:12:45] [PASSED] well_known_colors
[23:12:45] [PASSED] destination_pitch
[23:12:45] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[23:12:45] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[23:12:45] [PASSED] single_pixel_source_buffer
[23:12:45] [PASSED] single_pixel_clip_rectangle
[23:12:45] [PASSED] well_known_colors
[23:12:45] [PASSED] destination_pitch
[23:12:45] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[23:12:45] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[23:12:45] [PASSED] single_pixel_source_buffer
[23:12:45] [PASSED] single_pixel_clip_rectangle
[23:12:45] [PASSED] well_known_colors
[23:12:45] [PASSED] destination_pitch
[23:12:45] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[23:12:45] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[23:12:45] [PASSED] single_pixel_source_buffer
[23:12:45] [PASSED] single_pixel_clip_rectangle
[23:12:45] [PASSED] well_known_colors
[23:12:45] [PASSED] destination_pitch
[23:12:45] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[23:12:45] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[23:12:45] [PASSED] single_pixel_source_buffer
[23:12:45] [PASSED] single_pixel_clip_rectangle
[23:12:45] [PASSED] well_known_colors
[23:12:45] [PASSED] destination_pitch
[23:12:45] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[23:12:45] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[23:12:45] [PASSED] single_pixel_source_buffer
[23:12:45] [PASSED] single_pixel_clip_rectangle
[23:12:45] [PASSED] well_known_colors
[23:12:45] [PASSED] destination_pitch
[23:12:45] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[23:12:45] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[23:12:45] [PASSED] single_pixel_source_buffer
[23:12:45] [PASSED] single_pixel_clip_rectangle
[23:12:45] [PASSED] well_known_colors
[23:12:45] [PASSED] destination_pitch
[23:12:45] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[23:12:45] ============== drm_test_fb_xrgb8888_to_mono  ===============
[23:12:45] [PASSED] single_pixel_source_buffer
[23:12:45] [PASSED] single_pixel_clip_rectangle
[23:12:45] [PASSED] well_known_colors
[23:12:45] [PASSED] destination_pitch
[23:12:45] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[23:12:45] ==================== drm_test_fb_swab  =====================
[23:12:45] [PASSED] single_pixel_source_buffer
[23:12:45] [PASSED] single_pixel_clip_rectangle
[23:12:45] [PASSED] well_known_colors
[23:12:45] [PASSED] destination_pitch
[23:12:45] ================ [PASSED] drm_test_fb_swab =================
[23:12:45] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[23:12:45] [PASSED] single_pixel_source_buffer
[23:12:45] [PASSED] single_pixel_clip_rectangle
[23:12:45] [PASSED] well_known_colors
[23:12:45] [PASSED] destination_pitch
[23:12:45] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[23:12:45] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[23:12:45] [PASSED] single_pixel_source_buffer
[23:12:45] [PASSED] single_pixel_clip_rectangle
[23:12:45] [PASSED] well_known_colors
[23:12:45] [PASSED] destination_pitch
[23:12:45] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[23:12:45] ================= drm_test_fb_clip_offset  =================
[23:12:45] [PASSED] pass through
[23:12:45] [PASSED] horizontal offset
[23:12:45] [PASSED] vertical offset
[23:12:45] [PASSED] horizontal and vertical offset
[23:12:45] [PASSED] horizontal offset (custom pitch)
[23:12:45] [PASSED] vertical offset (custom pitch)
[23:12:45] [PASSED] horizontal and vertical offset (custom pitch)
[23:12:45] ============= [PASSED] drm_test_fb_clip_offset =============
[23:12:45] =================== drm_test_fb_memcpy  ====================
[23:12:45] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[23:12:45] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[23:12:45] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[23:12:45] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[23:12:45] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[23:12:45] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[23:12:45] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[23:12:45] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[23:12:45] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[23:12:45] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[23:12:45] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[23:12:45] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[23:12:45] =============== [PASSED] drm_test_fb_memcpy ================
[23:12:45] ============= [PASSED] drm_format_helper_test ==============
[23:12:45] ================= drm_format (18 subtests) =================
[23:12:45] [PASSED] drm_test_format_block_width_invalid
[23:12:45] [PASSED] drm_test_format_block_width_one_plane
[23:12:45] [PASSED] drm_test_format_block_width_two_plane
[23:12:45] [PASSED] drm_test_format_block_width_three_plane
[23:12:45] [PASSED] drm_test_format_block_width_tiled
[23:12:45] [PASSED] drm_test_format_block_height_invalid
[23:12:45] [PASSED] drm_test_format_block_height_one_plane
[23:12:45] [PASSED] drm_test_format_block_height_two_plane
[23:12:45] [PASSED] drm_test_format_block_height_three_plane
[23:12:45] [PASSED] drm_test_format_block_height_tiled
[23:12:45] [PASSED] drm_test_format_min_pitch_invalid
[23:12:45] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[23:12:45] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[23:12:45] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[23:12:45] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[23:12:45] [PASSED] drm_test_format_min_pitch_two_plane
[23:12:45] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[23:12:45] [PASSED] drm_test_format_min_pitch_tiled
[23:12:45] =================== [PASSED] drm_format ====================
[23:12:45] ============== drm_framebuffer (10 subtests) ===============
[23:12:45] ========== drm_test_framebuffer_check_src_coords  ==========
[23:12:45] [PASSED] Success: source fits into fb
[23:12:45] [PASSED] Fail: overflowing fb with x-axis coordinate
[23:12:45] [PASSED] Fail: overflowing fb with y-axis coordinate
[23:12:45] [PASSED] Fail: overflowing fb with source width
[23:12:45] [PASSED] Fail: overflowing fb with source height
[23:12:45] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[23:12:45] [PASSED] drm_test_framebuffer_cleanup
[23:12:45] =============== drm_test_framebuffer_create  ===============
[23:12:45] [PASSED] ABGR8888 normal sizes
[23:12:45] [PASSED] ABGR8888 max sizes
[23:12:45] [PASSED] ABGR8888 pitch greater than min required
[23:12:45] [PASSED] ABGR8888 pitch less than min required
[23:12:45] [PASSED] ABGR8888 Invalid width
[23:12:45] [PASSED] ABGR8888 Invalid buffer handle
[23:12:45] [PASSED] No pixel format
[23:12:45] [PASSED] ABGR8888 Width 0
[23:12:45] [PASSED] ABGR8888 Height 0
[23:12:45] [PASSED] ABGR8888 Out of bound height * pitch combination
[23:12:45] [PASSED] ABGR8888 Large buffer offset
[23:12:45] [PASSED] ABGR8888 Buffer offset for inexistent plane
[23:12:45] [PASSED] ABGR8888 Invalid flag
[23:12:45] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[23:12:45] [PASSED] ABGR8888 Valid buffer modifier
[23:12:45] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[23:12:45] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[23:12:45] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[23:12:45] [PASSED] NV12 Normal sizes
[23:12:45] [PASSED] NV12 Max sizes
[23:12:45] [PASSED] NV12 Invalid pitch
[23:12:45] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[23:12:45] [PASSED] NV12 different  modifier per-plane
[23:12:45] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[23:12:45] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[23:12:45] [PASSED] NV12 Modifier for inexistent plane
[23:12:45] [PASSED] NV12 Handle for inexistent plane
[23:12:45] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[23:12:45] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[23:12:45] [PASSED] YVU420 Normal sizes
[23:12:45] [PASSED] YVU420 Max sizes
[23:12:45] [PASSED] YVU420 Invalid pitch
[23:12:45] [PASSED] YVU420 Different pitches
[23:12:45] [PASSED] YVU420 Different buffer offsets/pitches
[23:12:45] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[23:12:45] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[23:12:45] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[23:12:45] [PASSED] YVU420 Valid modifier
[23:12:45] [PASSED] YVU420 Different modifiers per plane
[23:12:45] [PASSED] YVU420 Modifier for inexistent plane
[23:12:45] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[23:12:45] [PASSED] X0L2 Normal sizes
[23:12:45] [PASSED] X0L2 Max sizes
[23:12:45] [PASSED] X0L2 Invalid pitch
[23:12:45] [PASSED] X0L2 Pitch greater than minimum required
[23:12:45] [PASSED] X0L2 Handle for inexistent plane
[23:12:45] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[23:12:45] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[23:12:45] [PASSED] X0L2 Valid modifier
[23:12:45] [PASSED] X0L2 Modifier for inexistent plane
[23:12:45] =========== [PASSED] drm_test_framebuffer_create ===========
[23:12:45] [PASSED] drm_test_framebuffer_free
[23:12:45] [PASSED] drm_test_framebuffer_init
[23:12:45] [PASSED] drm_test_framebuffer_init_bad_format
[23:12:45] [PASSED] drm_test_framebuffer_init_dev_mismatch
[23:12:45] [PASSED] drm_test_framebuffer_lookup
[23:12:45] [PASSED] drm_test_framebuffer_lookup_inexistent
[23:12:45] [PASSED] drm_test_framebuffer_modifiers_not_supported
[23:12:45] ================= [PASSED] drm_framebuffer =================
[23:12:45] ================ drm_gem_shmem (8 subtests) ================
[23:12:45] [PASSED] drm_gem_shmem_test_obj_create
[23:12:45] [PASSED] drm_gem_shmem_test_obj_create_private
[23:12:45] [PASSED] drm_gem_shmem_test_pin_pages
[23:12:45] [PASSED] drm_gem_shmem_test_vmap
[23:12:45] [PASSED] drm_gem_shmem_test_get_sg_table
[23:12:45] [PASSED] drm_gem_shmem_test_get_pages_sgt
[23:12:45] [PASSED] drm_gem_shmem_test_madvise
[23:12:45] [PASSED] drm_gem_shmem_test_purge
[23:12:45] ================== [PASSED] drm_gem_shmem ==================
[23:12:45] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[23:12:45] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[23:12:45] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[23:12:45] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[23:12:45] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[23:12:45] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[23:12:45] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[23:12:45] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[23:12:45] [PASSED] Automatic
[23:12:45] [PASSED] Full
[23:12:45] [PASSED] Limited 16:235
[23:12:45] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[23:12:45] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[23:12:45] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[23:12:45] [PASSED] drm_test_check_disable_connector
[23:12:45] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[23:12:45] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[23:12:45] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[23:12:45] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[23:12:45] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[23:12:45] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[23:12:45] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[23:12:45] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[23:12:45] [PASSED] drm_test_check_output_bpc_dvi
[23:12:45] [PASSED] drm_test_check_output_bpc_format_vic_1
[23:12:45] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[23:12:45] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[23:12:45] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[23:12:45] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[23:12:45] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[23:12:45] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[23:12:45] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[23:12:45] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[23:12:45] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[23:12:45] [PASSED] drm_test_check_broadcast_rgb_value
[23:12:45] [PASSED] drm_test_check_bpc_8_value
[23:12:45] [PASSED] drm_test_check_bpc_10_value
[23:12:45] [PASSED] drm_test_check_bpc_12_value
[23:12:45] [PASSED] drm_test_check_format_value
[23:12:45] [PASSED] drm_test_check_tmds_char_value
[23:12:45] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[23:12:45] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[23:12:45] [PASSED] drm_test_check_mode_valid
[23:12:45] [PASSED] drm_test_check_mode_valid_reject
[23:12:45] [PASSED] drm_test_check_mode_valid_reject_rate
[23:12:45] [PASSED] drm_test_check_mode_valid_reject_max_clock
[23:12:45] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[23:12:45] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[23:12:45] [PASSED] drm_test_check_infoframes
[23:12:45] [PASSED] drm_test_check_reject_avi_infoframe
[23:12:45] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[23:12:45] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[23:12:45] [PASSED] drm_test_check_reject_audio_infoframe
[23:12:45] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[23:12:45] ================= drm_managed (2 subtests) =================
[23:12:45] [PASSED] drm_test_managed_release_action
[23:12:45] [PASSED] drm_test_managed_run_action
[23:12:45] =================== [PASSED] drm_managed ===================
[23:12:45] =================== drm_mm (6 subtests) ====================
[23:12:45] [PASSED] drm_test_mm_init
[23:12:45] [PASSED] drm_test_mm_debug
[23:12:45] [PASSED] drm_test_mm_align32
[23:12:45] [PASSED] drm_test_mm_align64
[23:12:45] [PASSED] drm_test_mm_lowest
[23:12:45] [PASSED] drm_test_mm_highest
[23:12:45] ===================== [PASSED] drm_mm ======================
[23:12:45] ============= drm_modes_analog_tv (5 subtests) =============
[23:12:45] [PASSED] drm_test_modes_analog_tv_mono_576i
[23:12:45] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[23:12:45] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[23:12:45] [PASSED] drm_test_modes_analog_tv_pal_576i
[23:12:45] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[23:12:45] =============== [PASSED] drm_modes_analog_tv ===============
[23:12:45] ============== drm_plane_helper (2 subtests) ===============
[23:12:45] =============== drm_test_check_plane_state  ================
[23:12:45] [PASSED] clipping_simple
[23:12:45] [PASSED] clipping_rotate_reflect
[23:12:45] [PASSED] positioning_simple
[23:12:45] [PASSED] upscaling
[23:12:45] [PASSED] downscaling
[23:12:45] [PASSED] rounding1
[23:12:45] [PASSED] rounding2
[23:12:45] [PASSED] rounding3
[23:12:45] [PASSED] rounding4
[23:12:45] =========== [PASSED] drm_test_check_plane_state ============
[23:12:45] =========== drm_test_check_invalid_plane_state  ============
[23:12:45] [PASSED] positioning_invalid
[23:12:45] [PASSED] upscaling_invalid
[23:12:45] [PASSED] downscaling_invalid
[23:12:45] ======= [PASSED] drm_test_check_invalid_plane_state ========
[23:12:45] ================ [PASSED] drm_plane_helper =================
[23:12:45] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[23:12:45] ====== drm_test_connector_helper_tv_get_modes_check  =======
[23:12:45] [PASSED] None
[23:12:45] [PASSED] PAL
[23:12:45] [PASSED] NTSC
[23:12:45] [PASSED] Both, NTSC Default
[23:12:45] [PASSED] Both, PAL Default
[23:12:45] [PASSED] Both, NTSC Default, with PAL on command-line
[23:12:45] [PASSED] Both, PAL Default, with NTSC on command-line
[23:12:45] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[23:12:45] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[23:12:45] ================== drm_rect (9 subtests) ===================
[23:12:45] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[23:12:45] [PASSED] drm_test_rect_clip_scaled_not_clipped
[23:12:45] [PASSED] drm_test_rect_clip_scaled_clipped
[23:12:45] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[23:12:45] ================= drm_test_rect_intersect  =================
[23:12:45] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[23:12:45] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[23:12:45] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[23:12:45] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[23:12:45] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[23:12:45] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[23:12:45] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[23:12:45] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[23:12:45] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[23:12:45] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[23:12:45] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[23:12:45] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[23:12:45] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[23:12:45] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[23:12:45] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
stty: 'standard input': Inappropriate ioctl for device
[23:12:45] ============= [PASSED] drm_test_rect_intersect =============
[23:12:45] ================ drm_test_rect_calc_hscale  ================
[23:12:45] [PASSED] normal use
[23:12:45] [PASSED] out of max range
[23:12:45] [PASSED] out of min range
[23:12:45] [PASSED] zero dst
[23:12:45] [PASSED] negative src
[23:12:45] [PASSED] negative dst
[23:12:45] ============ [PASSED] drm_test_rect_calc_hscale ============
[23:12:45] ================ drm_test_rect_calc_vscale  ================
[23:12:45] [PASSED] normal use
[23:12:45] [PASSED] out of max range
[23:12:45] [PASSED] out of min range
[23:12:45] [PASSED] zero dst
[23:12:45] [PASSED] negative src
[23:12:45] [PASSED] negative dst
[23:12:45] ============ [PASSED] drm_test_rect_calc_vscale ============
[23:12:45] ================== drm_test_rect_rotate  ===================
[23:12:45] [PASSED] reflect-x
[23:12:45] [PASSED] reflect-y
[23:12:45] [PASSED] rotate-0
[23:12:45] [PASSED] rotate-90
[23:12:45] [PASSED] rotate-180
[23:12:45] [PASSED] rotate-270
[23:12:45] ============== [PASSED] drm_test_rect_rotate ===============
[23:12:45] ================ drm_test_rect_rotate_inv  =================
[23:12:45] [PASSED] reflect-x
[23:12:45] [PASSED] reflect-y
[23:12:45] [PASSED] rotate-0
[23:12:45] [PASSED] rotate-90
[23:12:45] [PASSED] rotate-180
[23:12:45] [PASSED] rotate-270
[23:12:45] ============ [PASSED] drm_test_rect_rotate_inv =============
[23:12:45] ==================== [PASSED] drm_rect =====================
[23:12:45] ============ drm_sysfb_modeset_test (1 subtest) ============
[23:12:45] ============ drm_test_sysfb_build_fourcc_list  =============
[23:12:45] [PASSED] no native formats
[23:12:45] [PASSED] XRGB8888 as native format
[23:12:45] [PASSED] remove duplicates
[23:12:45] [PASSED] convert alpha formats
[23:12:45] [PASSED] random formats
[23:12:45] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[23:12:45] ============= [PASSED] drm_sysfb_modeset_test ==============
[23:12:45] ================== drm_fixp (2 subtests) ===================
[23:12:45] [PASSED] drm_test_int2fixp
[23:12:45] [PASSED] drm_test_sm2fixp
[23:12:45] ==================== [PASSED] drm_fixp =====================
[23:12:45] ============================================================
[23:12:45] Testing complete. Ran 630 tests: passed: 630
[23:12:45] Elapsed time: 28.104s total, 1.683s configuring, 26.002s building, 0.401s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[23:12:45] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:12:47] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:12:57] Starting KUnit Kernel (1/1)...
[23:12:57] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:12:57] ================= ttm_device (5 subtests) ==================
[23:12:57] [PASSED] ttm_device_init_basic
[23:12:57] [PASSED] ttm_device_init_multiple
[23:12:57] [PASSED] ttm_device_fini_basic
[23:12:57] [PASSED] ttm_device_init_no_vma_man
[23:12:57] ================== ttm_device_init_pools  ==================
[23:12:57] [PASSED] No DMA allocations, no DMA32 required
[23:12:57] [PASSED] DMA allocations, DMA32 required
[23:12:57] [PASSED] No DMA allocations, DMA32 required
[23:12:57] [PASSED] DMA allocations, no DMA32 required
[23:12:57] ============== [PASSED] ttm_device_init_pools ==============
[23:12:57] =================== [PASSED] ttm_device ====================
[23:12:57] ================== ttm_pool (8 subtests) ===================
[23:12:57] ================== ttm_pool_alloc_basic  ===================
[23:12:57] [PASSED] One page
[23:12:57] [PASSED] More than one page
[23:12:57] [PASSED] Above the allocation limit
[23:12:57] [PASSED] One page, with coherent DMA mappings enabled
[23:12:57] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:12:57] ============== [PASSED] ttm_pool_alloc_basic ===============
[23:12:57] ============== ttm_pool_alloc_basic_dma_addr  ==============
[23:12:57] [PASSED] One page
[23:12:57] [PASSED] More than one page
[23:12:57] [PASSED] Above the allocation limit
[23:12:57] [PASSED] One page, with coherent DMA mappings enabled
[23:12:57] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:12:57] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[23:12:57] [PASSED] ttm_pool_alloc_order_caching_match
[23:12:57] [PASSED] ttm_pool_alloc_caching_mismatch
[23:12:57] [PASSED] ttm_pool_alloc_order_mismatch
[23:12:57] [PASSED] ttm_pool_free_dma_alloc
[23:12:57] [PASSED] ttm_pool_free_no_dma_alloc
[23:12:57] [PASSED] ttm_pool_fini_basic
[23:12:57] ==================== [PASSED] ttm_pool =====================
[23:12:57] ================ ttm_resource (8 subtests) =================
[23:12:57] ================= ttm_resource_init_basic  =================
[23:12:57] [PASSED] Init resource in TTM_PL_SYSTEM
[23:12:57] [PASSED] Init resource in TTM_PL_VRAM
[23:12:57] [PASSED] Init resource in a private placement
[23:12:57] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[23:12:57] ============= [PASSED] ttm_resource_init_basic =============
[23:12:57] [PASSED] ttm_resource_init_pinned
[23:12:57] [PASSED] ttm_resource_fini_basic
[23:12:57] [PASSED] ttm_resource_manager_init_basic
[23:12:57] [PASSED] ttm_resource_manager_usage_basic
[23:12:57] [PASSED] ttm_resource_manager_set_used_basic
[23:12:57] [PASSED] ttm_sys_man_alloc_basic
[23:12:57] [PASSED] ttm_sys_man_free_basic
[23:12:57] ================== [PASSED] ttm_resource ===================
[23:12:57] =================== ttm_tt (15 subtests) ===================
[23:12:57] ==================== ttm_tt_init_basic  ====================
[23:12:57] [PASSED] Page-aligned size
[23:12:57] [PASSED] Extra pages requested
[23:12:57] ================ [PASSED] ttm_tt_init_basic ================
[23:12:57] [PASSED] ttm_tt_init_misaligned
[23:12:57] [PASSED] ttm_tt_fini_basic
[23:12:57] [PASSED] ttm_tt_fini_sg
[23:12:57] [PASSED] ttm_tt_fini_shmem
[23:12:57] [PASSED] ttm_tt_create_basic
[23:12:57] [PASSED] ttm_tt_create_invalid_bo_type
[23:12:57] [PASSED] ttm_tt_create_ttm_exists
[23:12:57] [PASSED] ttm_tt_create_failed
[23:12:57] [PASSED] ttm_tt_destroy_basic
[23:12:57] [PASSED] ttm_tt_populate_null_ttm
[23:12:57] [PASSED] ttm_tt_populate_populated_ttm
[23:12:57] [PASSED] ttm_tt_unpopulate_basic
[23:12:57] [PASSED] ttm_tt_unpopulate_empty_ttm
[23:12:57] [PASSED] ttm_tt_swapin_basic
[23:12:57] ===================== [PASSED] ttm_tt ======================
[23:12:57] =================== ttm_bo (14 subtests) ===================
[23:12:57] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[23:12:57] [PASSED] Cannot be interrupted and sleeps
[23:12:57] [PASSED] Cannot be interrupted, locks straight away
[23:12:57] [PASSED] Can be interrupted, sleeps
[23:12:57] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[23:12:57] [PASSED] ttm_bo_reserve_locked_no_sleep
[23:12:57] [PASSED] ttm_bo_reserve_no_wait_ticket
[23:12:57] [PASSED] ttm_bo_reserve_double_resv
[23:12:57] [PASSED] ttm_bo_reserve_interrupted
[23:12:57] [PASSED] ttm_bo_reserve_deadlock
[23:12:57] [PASSED] ttm_bo_unreserve_basic
[23:12:57] [PASSED] ttm_bo_unreserve_pinned
[23:12:57] [PASSED] ttm_bo_unreserve_bulk
[23:12:57] [PASSED] ttm_bo_fini_basic
[23:12:57] [PASSED] ttm_bo_fini_shared_resv
[23:12:57] [PASSED] ttm_bo_pin_basic
[23:12:57] [PASSED] ttm_bo_pin_unpin_resource
[23:12:57] [PASSED] ttm_bo_multiple_pin_one_unpin
[23:12:57] ===================== [PASSED] ttm_bo ======================
[23:12:57] ============== ttm_bo_validate (21 subtests) ===============
[23:12:57] ============== ttm_bo_init_reserved_sys_man  ===============
[23:12:57] [PASSED] Buffer object for userspace
[23:12:57] [PASSED] Kernel buffer object
[23:12:57] [PASSED] Shared buffer object
[23:12:57] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[23:12:57] ============== ttm_bo_init_reserved_mock_man  ==============
[23:12:57] [PASSED] Buffer object for userspace
[23:12:57] [PASSED] Kernel buffer object
[23:12:57] [PASSED] Shared buffer object
[23:12:57] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[23:12:57] [PASSED] ttm_bo_init_reserved_resv
[23:12:57] ================== ttm_bo_validate_basic  ==================
[23:12:57] [PASSED] Buffer object for userspace
[23:12:57] [PASSED] Kernel buffer object
[23:12:57] [PASSED] Shared buffer object
[23:12:57] ============== [PASSED] ttm_bo_validate_basic ==============
[23:12:57] [PASSED] ttm_bo_validate_invalid_placement
[23:12:57] ============= ttm_bo_validate_same_placement  ==============
[23:12:57] [PASSED] System manager
[23:12:57] [PASSED] VRAM manager
[23:12:57] ========= [PASSED] ttm_bo_validate_same_placement ==========
[23:12:57] [PASSED] ttm_bo_validate_failed_alloc
[23:12:57] [PASSED] ttm_bo_validate_pinned
[23:12:57] [PASSED] ttm_bo_validate_busy_placement
[23:12:57] ================ ttm_bo_validate_multihop  =================
[23:12:57] [PASSED] Buffer object for userspace
[23:12:57] [PASSED] Kernel buffer object
[23:12:57] [PASSED] Shared buffer object
[23:12:57] ============ [PASSED] ttm_bo_validate_multihop =============
[23:12:57] ========== ttm_bo_validate_no_placement_signaled  ==========
[23:12:57] [PASSED] Buffer object in system domain, no page vector
[23:12:57] [PASSED] Buffer object in system domain with an existing page vector
[23:12:57] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[23:12:57] ======== ttm_bo_validate_no_placement_not_signaled  ========
[23:12:57] [PASSED] Buffer object for userspace
[23:12:57] [PASSED] Kernel buffer object
[23:12:57] [PASSED] Shared buffer object
[23:12:57] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[23:12:57] [PASSED] ttm_bo_validate_move_fence_signaled
[23:12:57] ========= ttm_bo_validate_move_fence_not_signaled  =========
[23:12:57] [PASSED] Waits for GPU
[23:12:57] [PASSED] Tries to lock straight away
[23:12:57] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[23:12:57] [PASSED] ttm_bo_validate_happy_evict
[23:12:57] [PASSED] ttm_bo_validate_all_pinned_evict
[23:12:57] [PASSED] ttm_bo_validate_allowed_only_evict
[23:12:57] [PASSED] ttm_bo_validate_deleted_evict
[23:12:57] [PASSED] ttm_bo_validate_busy_domain_evict
[23:12:57] [PASSED] ttm_bo_validate_evict_gutting
[23:12:57] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[23:12:57] ================= [PASSED] ttm_bo_validate =================
[23:12:57] ============================================================
[23:12:57] Testing complete. Ran 101 tests: passed: 101
[23:12:57] Elapsed time: 11.591s total, 1.651s configuring, 9.724s building, 0.179s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 10+ messages in thread

* ✗ Xe.CI.BAT: failure for drm/xe/reg_sr: Fix leak on xa_store failure (rev2)
  2026-02-03 17:36 [PATCH] drm/xe/reg_sr: Fix leak on xa_store failure Shuicheng Lin
                   ` (2 preceding siblings ...)
  2026-02-03 23:13 ` ✓ CI.KUnit: success for drm/xe/reg_sr: Fix leak on xa_store failure (rev2) Patchwork
@ 2026-02-03 23:46 ` Patchwork
  2026-02-04 13:43 ` ✗ Xe.CI.FULL: " Patchwork
  2026-02-04 16:12 ` [PATCH] drm/xe/reg_sr: Fix leak on xa_store failure Vivekanandan, Balasubramani
  5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-02-03 23:46 UTC (permalink / raw)
  To: Lin, Shuicheng; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 380 bytes --]

== Series Details ==

Series: drm/xe/reg_sr: Fix leak on xa_store failure (rev2)
URL   : https://patchwork.freedesktop.org/series/161102/
State : failure

== Summary ==

ERROR: The runconfig 'xe-4493-ff449f153b0966cfd7a7291670c927f6b6971d2a_BAT' does not exist in the database

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161102v2/index.html

[-- Attachment #2: Type: text/html, Size: 945 bytes --]

^ permalink raw reply	[flat|nested] 10+ messages in thread

* ✗ Xe.CI.FULL: failure for drm/xe/reg_sr: Fix leak on xa_store failure (rev2)
  2026-02-03 17:36 [PATCH] drm/xe/reg_sr: Fix leak on xa_store failure Shuicheng Lin
                   ` (3 preceding siblings ...)
  2026-02-03 23:46 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2026-02-04 13:43 ` Patchwork
  2026-02-04 16:12 ` [PATCH] drm/xe/reg_sr: Fix leak on xa_store failure Vivekanandan, Balasubramani
  5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-02-04 13:43 UTC (permalink / raw)
  To: Lin, Shuicheng; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 381 bytes --]

== Series Details ==

Series: drm/xe/reg_sr: Fix leak on xa_store failure (rev2)
URL   : https://patchwork.freedesktop.org/series/161102/
State : failure

== Summary ==

ERROR: The runconfig 'xe-4493-ff449f153b0966cfd7a7291670c927f6b6971d2a_FULL' does not exist in the database

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161102v2/index.html

[-- Attachment #2: Type: text/html, Size: 946 bytes --]

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] drm/xe/reg_sr: Fix leak on xa_store failure
  2026-02-03 17:36 [PATCH] drm/xe/reg_sr: Fix leak on xa_store failure Shuicheng Lin
                   ` (4 preceding siblings ...)
  2026-02-04 13:43 ` ✗ Xe.CI.FULL: " Patchwork
@ 2026-02-04 16:12 ` Vivekanandan, Balasubramani
  2026-02-04 17:35   ` Matt Roper
  5 siblings, 1 reply; 10+ messages in thread
From: Vivekanandan, Balasubramani @ 2026-02-04 16:12 UTC (permalink / raw)
  To: Shuicheng Lin, intel-xe; +Cc: Matt Roper

On 03.02.2026 17:36, Shuicheng Lin wrote:
> Free the newly allocated entry when xa_store() fails to avoid a memory
> leak on the error path.
> 
> Fixes: e5283bd4dfec ("drm/xe/reg_sr: Remove register pool")
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_reg_sr.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c
> index d3e13ea33123..ce3dab8a0f47 100644
> --- a/drivers/gpu/drm/xe/xe_reg_sr.c
> +++ b/drivers/gpu/drm/xe/xe_reg_sr.c
> @@ -74,6 +74,7 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
>  {
>  	unsigned long idx = e->reg.addr;
>  	struct xe_reg_sr_entry *pentry = xa_load(&sr->xa, idx);
> +	bool allocated = false;
>  	int ret;
>  
>  	if (pentry) {
> @@ -94,6 +95,7 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
>  		ret = -ENOMEM;
>  		goto fail;
>  	}
> +	allocated = true;
>  
>  	*pentry = *e;
>  	ret = xa_err(xa_store(&sr->xa, idx, pentry, GFP_KERNEL));
> @@ -103,6 +105,8 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
>  	return 0;
>  

I would suggest create a new label above *fail:* which does kfree and
jump to it whenever pentry has to freed.

fail_free:
	kfree(pentry);


Regards,
Bala

>  fail:
> +	if (allocated)
> +		kfree(pentry);
>  	xe_gt_err(gt,
>  		  "discarding save-restore reg %04lx (clear: %08x, set: %08x, masked: %s, mcr: %s): ret=%d\n",
>  		  idx, e->clr_bits, e->set_bits,
> -- 
> 2.50.1
> 

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] drm/xe/reg_sr: Fix leak on xa_store failure
  2026-02-04 16:12 ` [PATCH] drm/xe/reg_sr: Fix leak on xa_store failure Vivekanandan, Balasubramani
@ 2026-02-04 17:35   ` Matt Roper
  2026-02-04 17:56     ` Lin, Shuicheng
  0 siblings, 1 reply; 10+ messages in thread
From: Matt Roper @ 2026-02-04 17:35 UTC (permalink / raw)
  To: Vivekanandan, Balasubramani; +Cc: Shuicheng Lin, intel-xe

On Wed, Feb 04, 2026 at 09:42:20PM +0530, Vivekanandan, Balasubramani wrote:
> On 03.02.2026 17:36, Shuicheng Lin wrote:
> > Free the newly allocated entry when xa_store() fails to avoid a memory
> > leak on the error path.
> > 
> > Fixes: e5283bd4dfec ("drm/xe/reg_sr: Remove register pool")
> > Cc: Matt Roper <matthew.d.roper@intel.com>
> > Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com>
> > ---
> >  drivers/gpu/drm/xe/xe_reg_sr.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c
> > index d3e13ea33123..ce3dab8a0f47 100644
> > --- a/drivers/gpu/drm/xe/xe_reg_sr.c
> > +++ b/drivers/gpu/drm/xe/xe_reg_sr.c
> > @@ -74,6 +74,7 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
> >  {
> >  	unsigned long idx = e->reg.addr;
> >  	struct xe_reg_sr_entry *pentry = xa_load(&sr->xa, idx);
> > +	bool allocated = false;
> >  	int ret;
> >  
> >  	if (pentry) {
> > @@ -94,6 +95,7 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
> >  		ret = -ENOMEM;
> >  		goto fail;
> >  	}
> > +	allocated = true;
> >  
> >  	*pentry = *e;
> >  	ret = xa_err(xa_store(&sr->xa, idx, pentry, GFP_KERNEL));
> > @@ -103,6 +105,8 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
> >  	return 0;
> >  
> 
> I would suggest create a new label above *fail:* which does kfree and
> jump to it whenever pentry has to freed.
> 
> fail_free:
> 	kfree(pentry);

I agree that using a separate label for the free is the more common
idiom in our driver so we should probably do that for consistency.

Another option would be DEFINE_FREE + no_free_ptr for automatic
scope-based cleanup, although I'm not sure it's worth it do do for just
this one function; we may want to explore that later as a broader
cleanup of large sections of the driver, similar to what we did with
force_wake and runtime_pm a while back.


Matt

> 
> 
> Regards,
> Bala
> 
> >  fail:
> > +	if (allocated)
> > +		kfree(pentry);
> >  	xe_gt_err(gt,
> >  		  "discarding save-restore reg %04lx (clear: %08x, set: %08x, masked: %s, mcr: %s): ret=%d\n",
> >  		  idx, e->clr_bits, e->set_bits,
> > -- 
> > 2.50.1
> > 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

^ permalink raw reply	[flat|nested] 10+ messages in thread

* RE: [PATCH] drm/xe/reg_sr: Fix leak on xa_store failure
  2026-02-04 17:35   ` Matt Roper
@ 2026-02-04 17:56     ` Lin, Shuicheng
  2026-02-04 18:15       ` Matt Roper
  0 siblings, 1 reply; 10+ messages in thread
From: Lin, Shuicheng @ 2026-02-04 17:56 UTC (permalink / raw)
  To: Roper, Matthew D, Vivekanandan, Balasubramani
  Cc: intel-xe@lists.freedesktop.org

On Wed, Feb 4, 2026 9:36 AM Matt Roper wrote:
> On Wed, Feb 04, 2026 at 09:42:20PM +0530, Vivekanandan, Balasubramani
> wrote:
> > On 03.02.2026 17:36, Shuicheng Lin wrote:
> > > Free the newly allocated entry when xa_store() fails to avoid a
> > > memory leak on the error path.
> > >
> > > Fixes: e5283bd4dfec ("drm/xe/reg_sr: Remove register pool")
> > > Cc: Matt Roper <matthew.d.roper@intel.com>
> > > Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com>
> > > ---
> > >  drivers/gpu/drm/xe/xe_reg_sr.c | 4 ++++
> > >  1 file changed, 4 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c
> > > b/drivers/gpu/drm/xe/xe_reg_sr.c index d3e13ea33123..ce3dab8a0f47
> > > 100644
> > > --- a/drivers/gpu/drm/xe/xe_reg_sr.c
> > > +++ b/drivers/gpu/drm/xe/xe_reg_sr.c
> > > @@ -74,6 +74,7 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,  {
> > >  	unsigned long idx = e->reg.addr;
> > >  	struct xe_reg_sr_entry *pentry = xa_load(&sr->xa, idx);
> > > +	bool allocated = false;
> > >  	int ret;
> > >
> > >  	if (pentry) {
> > > @@ -94,6 +95,7 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
> > >  		ret = -ENOMEM;
> > >  		goto fail;
> > >  	}
> > > +	allocated = true;
> > >
> > >  	*pentry = *e;
> > >  	ret = xa_err(xa_store(&sr->xa, idx, pentry, GFP_KERNEL)); @@
> > > -103,6 +105,8 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
> > >  	return 0;
> > >
> >
> > I would suggest create a new label above *fail:* which does kfree and
> > jump to it whenever pentry has to freed.
> >
> > fail_free:
> > 	kfree(pentry);
> 
> I agree that using a separate label for the free is the more common idiom in
> our driver so we should probably do that for consistency.
> 
> Another option would be DEFINE_FREE + no_free_ptr for automatic scope-
> based cleanup, although I'm not sure it's worth it do do for just this one
> function; we may want to explore that later as a broader cleanup of large
> sections of the driver, similar to what we did with force_wake and runtime_pm
> a while back.

Do you mean __free(kfree)? I did consider it also. And I really like this auto cleanup idea.
But it may not work in this case for below 2 reasons:
1. pentry is an input parameter, not a local parameter, and is allocated when the input is NULL.
2. pentry is freed only in failure path, for pass path, it is stored and will be freed later.

Shuicheng 

> 
> 
> Matt
> 
> >
> >
> > Regards,
> > Bala
> >
> > >  fail:
> > > +	if (allocated)
> > > +		kfree(pentry);
> > >  	xe_gt_err(gt,
> > >  		  "discarding save-restore reg %04lx (clear: %08x, set: %08x,
> masked: %s, mcr: %s): ret=%d\n",
> > >  		  idx, e->clr_bits, e->set_bits,
> > > --
> > > 2.50.1
> > >
> 
> --
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] drm/xe/reg_sr: Fix leak on xa_store failure
  2026-02-04 17:56     ` Lin, Shuicheng
@ 2026-02-04 18:15       ` Matt Roper
  0 siblings, 0 replies; 10+ messages in thread
From: Matt Roper @ 2026-02-04 18:15 UTC (permalink / raw)
  To: Lin, Shuicheng
  Cc: Vivekanandan, Balasubramani, intel-xe@lists.freedesktop.org

On Wed, Feb 04, 2026 at 05:56:30PM +0000, Lin, Shuicheng wrote:
> On Wed, Feb 4, 2026 9:36 AM Matt Roper wrote:
> > On Wed, Feb 04, 2026 at 09:42:20PM +0530, Vivekanandan, Balasubramani
> > wrote:
> > > On 03.02.2026 17:36, Shuicheng Lin wrote:
> > > > Free the newly allocated entry when xa_store() fails to avoid a
> > > > memory leak on the error path.
> > > >
> > > > Fixes: e5283bd4dfec ("drm/xe/reg_sr: Remove register pool")
> > > > Cc: Matt Roper <matthew.d.roper@intel.com>
> > > > Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/xe/xe_reg_sr.c | 4 ++++
> > > >  1 file changed, 4 insertions(+)
> > > >
> > > > diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c
> > > > b/drivers/gpu/drm/xe/xe_reg_sr.c index d3e13ea33123..ce3dab8a0f47
> > > > 100644
> > > > --- a/drivers/gpu/drm/xe/xe_reg_sr.c
> > > > +++ b/drivers/gpu/drm/xe/xe_reg_sr.c
> > > > @@ -74,6 +74,7 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,  {
> > > >  	unsigned long idx = e->reg.addr;
> > > >  	struct xe_reg_sr_entry *pentry = xa_load(&sr->xa, idx);
> > > > +	bool allocated = false;
> > > >  	int ret;
> > > >
> > > >  	if (pentry) {
> > > > @@ -94,6 +95,7 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
> > > >  		ret = -ENOMEM;
> > > >  		goto fail;
> > > >  	}
> > > > +	allocated = true;
> > > >
> > > >  	*pentry = *e;
> > > >  	ret = xa_err(xa_store(&sr->xa, idx, pentry, GFP_KERNEL)); @@
> > > > -103,6 +105,8 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
> > > >  	return 0;
> > > >
> > >
> > > I would suggest create a new label above *fail:* which does kfree and
> > > jump to it whenever pentry has to freed.
> > >
> > > fail_free:
> > > 	kfree(pentry);
> > 
> > I agree that using a separate label for the free is the more common idiom in
> > our driver so we should probably do that for consistency.
> > 
> > Another option would be DEFINE_FREE + no_free_ptr for automatic scope-
> > based cleanup, although I'm not sure it's worth it do do for just this one
> > function; we may want to explore that later as a broader cleanup of large
> > sections of the driver, similar to what we did with force_wake and runtime_pm
> > a while back.
> 
> Do you mean __free(kfree)? I did consider it also. And I really like this auto cleanup idea.
> But it may not work in this case for below 2 reasons:
> 1. pentry is an input parameter, not a local parameter, and is allocated when the input is NULL.

I think it would work if you allocated via a different variable rather
than allocating directly into the parameter.  E.g.,

        new_entry = kmalloc(sizeof(*new_entry), GFP_KERNEL);
        ...
        pentry = new_entry;

and put the handler on new_entry instead of pentry.  If you used a
passed-in pentry and never kmalloc'd, then new_entry would just stay
NULL forever.  The auto-cleanup would only be needed when new_entry is
non-NULL because you did a local allocation.

> 2. pentry is freed only in failure path, for pass path, it is stored and will be freed later.

On the success path,

        no_free_ptr(new_entry);
        return 0;

would inhibit deallocation in cases where everything went successfully.
But leaving the function by any other means that didn't call
no_free_ptr() would trigger the cleanup.


Matt

> 
> Shuicheng 
> 
> > 
> > 
> > Matt
> > 
> > >
> > >
> > > Regards,
> > > Bala
> > >
> > > >  fail:
> > > > +	if (allocated)
> > > > +		kfree(pentry);
> > > >  	xe_gt_err(gt,
> > > >  		  "discarding save-restore reg %04lx (clear: %08x, set: %08x,
> > masked: %s, mcr: %s): ret=%d\n",
> > > >  		  idx, e->clr_bits, e->set_bits,
> > > > --
> > > > 2.50.1
> > > >
> > 
> > --
> > Matt Roper
> > Graphics Software Engineer
> > Linux GPU Platform Enablement
> > Intel Corporation

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2026-02-04 18:15 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-02-03 17:36 [PATCH] drm/xe/reg_sr: Fix leak on xa_store failure Shuicheng Lin
2026-02-03 18:09 ` ✓ CI.KUnit: success for " Patchwork
2026-02-03 19:00 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-02-03 23:13 ` ✓ CI.KUnit: success for drm/xe/reg_sr: Fix leak on xa_store failure (rev2) Patchwork
2026-02-03 23:46 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-02-04 13:43 ` ✗ Xe.CI.FULL: " Patchwork
2026-02-04 16:12 ` [PATCH] drm/xe/reg_sr: Fix leak on xa_store failure Vivekanandan, Balasubramani
2026-02-04 17:35   ` Matt Roper
2026-02-04 17:56     ` Lin, Shuicheng
2026-02-04 18:15       ` Matt Roper

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