* [PATCH 01/11] target/sparc: Introduce sparc_cpu_register_gdb_regs() stub
2026-02-16 22:52 [PATCH 00/11] monitor/hmp: Automatically handle gdb-xml exposed registers Philippe Mathieu-Daudé
@ 2026-02-16 22:52 ` Philippe Mathieu-Daudé
2026-02-16 22:52 ` [PATCH 02/11] target/sparc: Restore 'gdb-xml/sparc64-cp0.xml' Philippe Mathieu-Daudé
` (9 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-16 22:52 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Dr. David Alan Gilbert, Nicholas Piggin,
Chinmay Rath, Alex Bennée, Zhao Liu, Mark Cave-Ayland,
Pierrick Bouvier, Artyom Tarasenko, Akihiko Odaki, Gustavo Romero,
Paolo Bonzini, unisono, Philippe Mathieu-Daudé, qemu-ppc
Introduce sparc_cpu_register_gdb_regs() which we are going
to fill in the next commits.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/sparc/cpu.h | 1 +
target/sparc/cpu.c | 2 ++
target/sparc/gdbstub.c | 9 +++++++++
3 files changed, 12 insertions(+)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 7169a502432..0139732e4cc 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -586,6 +586,7 @@ hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
void sparc_cpu_do_interrupt(CPUState *cpu);
int sparc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int sparc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+void sparc_cpu_register_gdb_regs(CPUState *cs);
G_NORETURN void sparc_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
MMUAccessType access_type,
int mmu_idx,
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 3991681d1d1..f58d0298966 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -897,6 +897,8 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
return;
}
+ sparc_cpu_register_gdb_regs(cs);
+
qemu_init_vcpu(cs);
scc->parent_realize(dev, errp);
diff --git a/target/sparc/gdbstub.c b/target/sparc/gdbstub.c
index 134617fb232..79d661fbc10 100644
--- a/target/sparc/gdbstub.c
+++ b/target/sparc/gdbstub.c
@@ -215,3 +215,12 @@ int sparc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
return 8;
#endif
}
+
+void sparc_cpu_register_gdb_regs(CPUState *cs)
+{
+#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
+ /* Not yet supported */
+#else
+ /* Not yet supported */
+#endif
+}
--
2.52.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH 02/11] target/sparc: Restore 'gdb-xml/sparc64-cp0.xml'
2026-02-16 22:52 [PATCH 00/11] monitor/hmp: Automatically handle gdb-xml exposed registers Philippe Mathieu-Daudé
2026-02-16 22:52 ` [PATCH 01/11] target/sparc: Introduce sparc_cpu_register_gdb_regs() stub Philippe Mathieu-Daudé
@ 2026-02-16 22:52 ` Philippe Mathieu-Daudé
2026-02-16 22:52 ` [PATCH 03/11] target/sparc: Restore 'gdb-xml/sparc64-fpu.xml' Philippe Mathieu-Daudé
` (8 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-16 22:52 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Dr. David Alan Gilbert, Nicholas Piggin,
Chinmay Rath, Alex Bennée, Zhao Liu, Mark Cave-Ayland,
Pierrick Bouvier, Artyom Tarasenko, Akihiko Odaki, Gustavo Romero,
Paolo Bonzini, unisono, Philippe Mathieu-Daudé, qemu-ppc
Restore gdb-xml/sparc64-cp0.xml from mainstream binutils, tag
'binutils-2_46', found in the gdb/features/sparc/folder [*].
Extract sparc_cp0_gdb_write_register() out of
sparc_cpu_gdb_read_register() and sparc_cp0_gdb_write_register()
out of sparc_cpu_gdb_write_register(), taking care to update the
register indexes in the switch cases.
Register these helpers with a call to gdb_register_coprocessor()
in sparc_cpu_register_gdb_regs().
[*] https://sourceware.org/git/?p=binutils-gdb.git;a=tree;f=gdb/features/sparc;hb=refs/tags/binutils-2_46
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
configs/targets/sparc64-linux-user.mak | 2 +-
configs/targets/sparc64-softmmu.mak | 2 +-
target/sparc/cpu.c | 2 +-
target/sparc/gdbstub.c | 193 ++++++++++++++-----------
gdb-xml/sparc64-core.xml | 7 -
gdb-xml/sparc64-cp0.xml | 16 ++
6 files changed, 131 insertions(+), 91 deletions(-)
create mode 100644 gdb-xml/sparc64-cp0.xml
diff --git a/configs/targets/sparc64-linux-user.mak b/configs/targets/sparc64-linux-user.mak
index 3bbd8495210..930f7e13ab9 100644
--- a/configs/targets/sparc64-linux-user.mak
+++ b/configs/targets/sparc64-linux-user.mak
@@ -4,6 +4,6 @@ TARGET_ABI_DIR=sparc
TARGET_SYSTBL_ABI=common,64
TARGET_SYSTBL=syscall.tbl
TARGET_BIG_ENDIAN=y
-TARGET_XML_FILES=gdb-xml/sparc64-core.xml
+TARGET_XML_FILES=gdb-xml/sparc64-core.xml gdb-xml/sparc64-cp0.xml
TARGET_LONG_BITS=64
TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
diff --git a/configs/targets/sparc64-softmmu.mak b/configs/targets/sparc64-softmmu.mak
index 8a0290c2093..22e7f3c94a7 100644
--- a/configs/targets/sparc64-softmmu.mak
+++ b/configs/targets/sparc64-softmmu.mak
@@ -1,7 +1,7 @@
TARGET_ARCH=sparc64
TARGET_BASE_ARCH=sparc
TARGET_BIG_ENDIAN=y
-TARGET_XML_FILES=gdb-xml/sparc64-core.xml
+TARGET_XML_FILES=gdb-xml/sparc64-core.xml gdb-xml/sparc64-cp0.xml
TARGET_LONG_BITS=64
TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index f58d0298966..6f7b250abb3 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -1094,7 +1094,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, const void *data)
#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
cc->gdb_core_xml_file = "sparc64-core.xml";
- cc->gdb_num_core_regs = 86;
+ cc->gdb_num_core_regs = 80;
#else
cc->gdb_num_core_regs = 72;
#endif
diff --git a/target/sparc/gdbstub.c b/target/sparc/gdbstub.c
index 79d661fbc10..bdd759dd0a9 100644
--- a/target/sparc/gdbstub.c
+++ b/target/sparc/gdbstub.c
@@ -18,6 +18,7 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
+#include "exec/gdbstub.h"
#include "cpu.h"
#include "gdbstub/helpers.h"
@@ -48,27 +49,6 @@ int sparc_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.upper);
}
}
- /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
- switch (n) {
- case 64:
- return gdb_get_rega(mem_buf, env->y);
- case 65:
- return gdb_get_rega(mem_buf, cpu_get_psr(env));
- case 66:
- return gdb_get_rega(mem_buf, env->wim);
- case 67:
- return gdb_get_rega(mem_buf, env->tbr);
- case 68:
- return gdb_get_rega(mem_buf, env->pc);
- case 69:
- return gdb_get_rega(mem_buf, env->npc);
- case 70:
- return gdb_get_rega(mem_buf, cpu_get_fsr(env));
- case 71:
- return gdb_get_rega(mem_buf, 0); /* csr */
- default:
- return gdb_get_rega(mem_buf, 0);
- }
#else
if (n < 64) {
/* f0-f31 */
@@ -87,21 +67,51 @@ int sparc_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
*/
return gdb_get_reg64(mem_buf, env->fpr[(n - 64) + 16].ll);
}
+#endif
+ return 0;
+}
+
+__attribute__((unused))
+static int sparc_cp0_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
+{
+ CPUSPARCState *env = cpu_env(cs);
+
+#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
+ /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
switch (n) {
- case 80:
+ case 0:
+ return gdb_get_rega(mem_buf, env->y);
+ case 1:
+ return gdb_get_rega(mem_buf, cpu_get_psr(env));
+ case 2:
+ return gdb_get_rega(mem_buf, env->wim);
+ case 3:
+ return gdb_get_rega(mem_buf, env->tbr);
+ case 4:
+ return gdb_get_rega(mem_buf, env->pc);
+ case 5:
+ return gdb_get_rega(mem_buf, env->npc);
+ case 6:
+ return gdb_get_rega(mem_buf, cpu_get_fsr(env));
+ case 7:
+ return gdb_get_rega(mem_buf, 0); /* csr */
+ }
+#else
+ switch (n) {
+ case 0:
return gdb_get_regl(mem_buf, env->pc);
- case 81:
+ case 1:
return gdb_get_regl(mem_buf, env->npc);
- case 82:
+ case 2:
return gdb_get_regl(mem_buf, (cpu_get_ccr(env) << 32) |
((env->asi & 0xff) << 24) |
((env->pstate & 0xfff) << 8) |
cpu_get_cwp64(env));
- case 83:
+ case 3:
return gdb_get_regl(mem_buf, cpu_get_fsr(env));
- case 84:
+ case 4:
return gdb_get_regl(mem_buf, env->fprs);
- case 85:
+ case 5:
return gdb_get_regl(mem_buf, env->y);
}
#endif
@@ -138,33 +148,6 @@ int sparc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
} else {
env->fpr[(n - 32) / 2].l.upper = tmp;
}
- } else {
- /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
- switch (n) {
- case 64:
- env->y = tmp;
- break;
- case 65:
- cpu_put_psr(env, tmp);
- break;
- case 66:
- env->wim = tmp;
- break;
- case 67:
- env->tbr = tmp;
- break;
- case 68:
- env->pc = tmp;
- break;
- case 69:
- env->npc = tmp;
- break;
- case 70:
- cpu_put_fsr(env, tmp);
- break;
- default:
- return 0;
- }
}
return 4;
#else
@@ -185,32 +168,77 @@ int sparc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
* n == 79: f62 : env->fpr[31]
*/
env->fpr[(n - 64) + 16].ll = tmp;
- } else {
- switch (n) {
- case 80:
- env->pc = tmp;
- break;
- case 81:
- env->npc = tmp;
- break;
- case 82:
- cpu_put_ccr(env, tmp >> 32);
- env->asi = (tmp >> 24) & 0xff;
- env->pstate = (tmp >> 8) & 0xfff;
- cpu_put_cwp64(env, tmp & 0xff);
- break;
- case 83:
- cpu_put_fsr(env, tmp);
- break;
- case 84:
- env->fprs = tmp;
- break;
- case 85:
- env->y = tmp;
- break;
- default:
- return 0;
- }
+ }
+ return 8;
+#endif
+}
+
+__attribute__((unused))
+static int sparc_cp0_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
+{
+ CPUSPARCState *env = cpu_env(cs);
+
+#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
+ uint32_t tmp;
+
+ tmp = ldl_p(mem_buf);
+
+ /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
+ switch (n) {
+ case 0:
+ env->y = tmp;
+ break;
+ case 1:
+ cpu_put_psr(env, tmp);
+ break;
+ case 2:
+ env->wim = tmp;
+ break;
+ case 3:
+ env->tbr = tmp;
+ break;
+ case 4:
+ env->pc = tmp;
+ break;
+ case 5:
+ env->npc = tmp;
+ break;
+ case 6:
+ cpu_put_fsr(env, tmp);
+ break;
+ default:
+ return 0;
+ }
+ return 4;
+#else
+ uint64_t tmp;
+
+ tmp = ldq_p(mem_buf);
+
+ switch (n) {
+ case 0:
+ env->pc = tmp;
+ break;
+ case 1:
+ env->npc = tmp;
+ break;
+ case 2:
+ cpu_put_ccr(env, tmp >> 32);
+ env->asi = (tmp >> 24) & 0xff;
+ env->pstate = (tmp >> 8) & 0xfff;
+ cpu_put_cwp64(env, tmp & 0xff);
+ break;
+ case 3:
+ cpu_put_fsr(env, tmp);
+ break;
+ case 4:
+ env->fprs = tmp;
+ break;
+ case 5:
+ env->y = tmp;
+ break;
+ default:
+ return 0;
}
return 8;
#endif
@@ -221,6 +249,9 @@ void sparc_cpu_register_gdb_regs(CPUState *cs)
#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
/* Not yet supported */
#else
- /* Not yet supported */
+ gdb_register_coprocessor(cs, sparc_cp0_gdb_read_register,
+ sparc_cp0_gdb_write_register,
+ gdb_find_static_feature("sparc64-cp0.xml"),
+ 0);
#endif
}
diff --git a/gdb-xml/sparc64-core.xml b/gdb-xml/sparc64-core.xml
index 375b9bb0cc6..1c26d8c01c1 100644
--- a/gdb-xml/sparc64-core.xml
+++ b/gdb-xml/sparc64-core.xml
@@ -89,11 +89,4 @@
<reg name="f58" bitsize="64" type="ieee_double" regnum="77"/>
<reg name="f60" bitsize="64" type="ieee_double" regnum="78"/>
<reg name="f62" bitsize="64" type="ieee_double" regnum="79"/>
-
- <reg name="pc" bitsize="64" type="code_ptr" regnum="80"/>
- <reg name="npc" bitsize="64" type="code_ptr" regnum="81"/>
- <reg name="state" bitsize="64" type="uint64" regnum="82"/>
- <reg name="fsr" bitsize="64" type="uint64" regnum="83"/>
- <reg name="fprs" bitsize="64" type="uint64" regnum="84"/>
- <reg name="y" bitsize="64" type="uint64" regnum="85"/>
</feature>
diff --git a/gdb-xml/sparc64-cp0.xml b/gdb-xml/sparc64-cp0.xml
new file mode 100644
index 00000000000..9b938dc7ecc
--- /dev/null
+++ b/gdb-xml/sparc64-cp0.xml
@@ -0,0 +1,16 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2013-2026 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.sparc.cp0">
+ <reg name="pc" bitsize="64" type="code_ptr" regnum="80"/>
+ <reg name="npc" bitsize="64" type="code_ptr" regnum="81"/>
+ <reg name="state" bitsize="64" type="uint64" regnum="82"/>
+ <reg name="fsr" bitsize="64" type="uint64" regnum="83"/>
+ <reg name="fprs" bitsize="64" type="uint64" regnum="84"/>
+ <reg name="y" bitsize="64" type="uint64" regnum="85"/>
+</feature>
--
2.52.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH 03/11] target/sparc: Restore 'gdb-xml/sparc64-fpu.xml'
2026-02-16 22:52 [PATCH 00/11] monitor/hmp: Automatically handle gdb-xml exposed registers Philippe Mathieu-Daudé
2026-02-16 22:52 ` [PATCH 01/11] target/sparc: Introduce sparc_cpu_register_gdb_regs() stub Philippe Mathieu-Daudé
2026-02-16 22:52 ` [PATCH 02/11] target/sparc: Restore 'gdb-xml/sparc64-cp0.xml' Philippe Mathieu-Daudé
@ 2026-02-16 22:52 ` Philippe Mathieu-Daudé
2026-02-16 22:52 ` [PATCH 04/11] target/sparc: Restore 'gdb-xml/sparc64-cpu.xml' Philippe Mathieu-Daudé
` (7 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-16 22:52 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Dr. David Alan Gilbert, Nicholas Piggin,
Chinmay Rath, Alex Bennée, Zhao Liu, Mark Cave-Ayland,
Pierrick Bouvier, Artyom Tarasenko, Akihiko Odaki, Gustavo Romero,
Paolo Bonzini, unisono, Philippe Mathieu-Daudé, qemu-ppc
Restore gdb-xml/sparc64-fpu.xml from mainstream binutils, tag
'binutils-2_46', found in the gdb/features/sparc/folder [*].
Extract sparc_fpu_gdb_write_register() out of
sparc_cpu_gdb_read_register() and sparc_fpu_gdb_write_register()
out of sparc_cpu_gdb_write_register(), taking care to update the
register indexes in the switch cases.
Register these helpers with a call to gdb_register_coprocessor()
in sparc_cpu_register_gdb_regs().
[*] https://sourceware.org/git/?p=binutils-gdb.git;a=tree;f=gdb/features/sparc;hb=refs/tags/binutils-2_46
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
configs/targets/sparc64-linux-user.mak | 2 +-
configs/targets/sparc64-softmmu.mak | 2 +-
target/sparc/cpu.c | 2 +-
target/sparc/gdbstub.c | 88 +++++++++++++++++---------
gdb-xml/sparc64-core.xml | 50 ---------------
gdb-xml/sparc64-fpu.xml | 59 +++++++++++++++++
6 files changed, 120 insertions(+), 83 deletions(-)
create mode 100644 gdb-xml/sparc64-fpu.xml
diff --git a/configs/targets/sparc64-linux-user.mak b/configs/targets/sparc64-linux-user.mak
index 930f7e13ab9..a5f8f8d51a2 100644
--- a/configs/targets/sparc64-linux-user.mak
+++ b/configs/targets/sparc64-linux-user.mak
@@ -4,6 +4,6 @@ TARGET_ABI_DIR=sparc
TARGET_SYSTBL_ABI=common,64
TARGET_SYSTBL=syscall.tbl
TARGET_BIG_ENDIAN=y
-TARGET_XML_FILES=gdb-xml/sparc64-core.xml gdb-xml/sparc64-cp0.xml
+TARGET_XML_FILES=gdb-xml/sparc64-core.xml gdb-xml/sparc64-fpu.xml gdb-xml/sparc64-cp0.xml
TARGET_LONG_BITS=64
TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
diff --git a/configs/targets/sparc64-softmmu.mak b/configs/targets/sparc64-softmmu.mak
index 22e7f3c94a7..c35b6b1bb8a 100644
--- a/configs/targets/sparc64-softmmu.mak
+++ b/configs/targets/sparc64-softmmu.mak
@@ -1,7 +1,7 @@
TARGET_ARCH=sparc64
TARGET_BASE_ARCH=sparc
TARGET_BIG_ENDIAN=y
-TARGET_XML_FILES=gdb-xml/sparc64-core.xml gdb-xml/sparc64-cp0.xml
+TARGET_XML_FILES=gdb-xml/sparc64-core.xml gdb-xml/sparc64-fpu.xml gdb-xml/sparc64-cp0.xml
TARGET_LONG_BITS=64
TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 6f7b250abb3..2db34d88b97 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -1094,7 +1094,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, const void *data)
#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
cc->gdb_core_xml_file = "sparc64-core.xml";
- cc->gdb_num_core_regs = 80;
+ cc->gdb_num_core_regs = 32;
#else
cc->gdb_num_core_regs = 72;
#endif
diff --git a/target/sparc/gdbstub.c b/target/sparc/gdbstub.c
index bdd759dd0a9..b5b1494950a 100644
--- a/target/sparc/gdbstub.c
+++ b/target/sparc/gdbstub.c
@@ -40,32 +40,40 @@ int sparc_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
/* register window */
return gdb_get_rega(mem_buf, env->regwptr[n - 8]);
}
+ return 0;
+}
+
+__attribute__((unused))
+static int sparc_fpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
+{
+ CPUSPARCState *env = cpu_env(cs);
+
#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
- if (n < 64) {
+ if (n < 32) {
/* fprs */
if (n & 1) {
- return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.lower);
+ return gdb_get_reg32(mem_buf, env->fpr[n / 2].l.lower);
} else {
- return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.upper);
+ return gdb_get_reg32(mem_buf, env->fpr[n / 2].l.upper);
}
}
#else
- if (n < 64) {
+ if (n < 32) {
/* f0-f31 */
if (n & 1) {
- return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.lower);
+ return gdb_get_reg32(mem_buf, env->fpr[n / 2].l.lower);
} else {
- return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.upper);
+ return gdb_get_reg32(mem_buf, env->fpr[n / 2].l.upper);
}
}
- if (n < 80) {
+ if (n < 48) {
/* f32-f62 (16 double width registers, even register numbers only)
- * n == 64: f32 : env->fpr[16]
- * n == 65: f34 : env->fpr[17]
+ * n == 32: f32 : env->fpr[16]
+ * n == 33: f34 : env->fpr[17]
* etc...
- * n == 79: f62 : env->fpr[31]
+ * n == 47: f62 : env->fpr[31]
*/
- return gdb_get_reg64(mem_buf, env->fpr[(n - 64) + 16].ll);
+ return gdb_get_reg64(mem_buf, env->fpr[(n - 32) + 16].ll);
}
#endif
return 0;
@@ -135,39 +143,55 @@ int sparc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
if (n < 8) {
/* g0..g7 */
env->gregs[n] = tmp;
- } else if (n < 32) {
+ } else {
/* register window */
env->regwptr[n - 8] = tmp;
}
#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
- else if (n < 64) {
- /* fprs */
- /* f0-f31 */
- if (n & 1) {
- env->fpr[(n - 32) / 2].l.lower = tmp;
- } else {
- env->fpr[(n - 32) / 2].l.upper = tmp;
- }
- }
return 4;
#else
- else if (n < 64) {
+ return 8;
+#endif
+}
+
+__attribute__((unused))
+static int sparc_fpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
+{
+ CPUSPARCState *env = cpu_env(cs);
+
+#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
+ uint32_t tmp;
+
+ tmp = ldl_p(mem_buf);
+
+ /* fprs */
+ /* f0-f31 */
+ if (n & 1) {
+ env->fpr[n / 2].l.lower = tmp;
+ } else {
+ env->fpr[n / 2].l.upper = tmp;
+ }
+
+ return 4;
+#else
+ if (n < 32) {
/* f0-f31 */
- tmp = ldl_p(mem_buf);
+ uint32_t tmp = ldl_p(mem_buf);
if (n & 1) {
- env->fpr[(n - 32) / 2].l.lower = tmp;
+ env->fpr[n / 2].l.lower = tmp;
} else {
- env->fpr[(n - 32) / 2].l.upper = tmp;
+ env->fpr[n / 2].l.upper = tmp;
}
return 4;
- } else if (n < 80) {
+ } else {
+ uint64_t tmp = ldq_p(mem_buf);
/* f32-f62 (16 double width registers, even register numbers only)
- * n == 64: f32 : env->fpr[16]
- * n == 65: f34 : env->fpr[17]
+ * n == 32: f32 : env->fpr[16]
+ * n == 33: f34 : env->fpr[17]
* etc...
- * n == 79: f62 : env->fpr[31]
+ * n == 47: f62 : env->fpr[31]
*/
- env->fpr[(n - 64) + 16].ll = tmp;
+ env->fpr[(n - 32) + 16].ll = tmp;
}
return 8;
#endif
@@ -249,6 +273,10 @@ void sparc_cpu_register_gdb_regs(CPUState *cs)
#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
/* Not yet supported */
#else
+ gdb_register_coprocessor(cs, sparc_fpu_gdb_read_register,
+ sparc_fpu_gdb_write_register,
+ gdb_find_static_feature("sparc64-fpu.xml"),
+ 0);
gdb_register_coprocessor(cs, sparc_cp0_gdb_read_register,
sparc_cp0_gdb_write_register,
gdb_find_static_feature("sparc64-cp0.xml"),
diff --git a/gdb-xml/sparc64-core.xml b/gdb-xml/sparc64-core.xml
index 1c26d8c01c1..85b0820a408 100644
--- a/gdb-xml/sparc64-core.xml
+++ b/gdb-xml/sparc64-core.xml
@@ -39,54 +39,4 @@
<reg name="i5" bitsize="64" type="uint64" regnum="29"/>
<reg name="fp" bitsize="64" type="uint64" regnum="30"/>
<reg name="i7" bitsize="64" type="uint64" regnum="31"/>
-
- <reg name="f0" bitsize="32" type="ieee_single" regnum="32"/>
- <reg name="f1" bitsize="32" type="ieee_single" regnum="33"/>
- <reg name="f2" bitsize="32" type="ieee_single" regnum="34"/>
- <reg name="f3" bitsize="32" type="ieee_single" regnum="35"/>
- <reg name="f4" bitsize="32" type="ieee_single" regnum="36"/>
- <reg name="f5" bitsize="32" type="ieee_single" regnum="37"/>
- <reg name="f6" bitsize="32" type="ieee_single" regnum="38"/>
- <reg name="f7" bitsize="32" type="ieee_single" regnum="39"/>
- <reg name="f8" bitsize="32" type="ieee_single" regnum="40"/>
- <reg name="f9" bitsize="32" type="ieee_single" regnum="41"/>
- <reg name="f10" bitsize="32" type="ieee_single" regnum="42"/>
- <reg name="f11" bitsize="32" type="ieee_single" regnum="43"/>
- <reg name="f12" bitsize="32" type="ieee_single" regnum="44"/>
- <reg name="f13" bitsize="32" type="ieee_single" regnum="45"/>
- <reg name="f14" bitsize="32" type="ieee_single" regnum="46"/>
- <reg name="f15" bitsize="32" type="ieee_single" regnum="47"/>
- <reg name="f16" bitsize="32" type="ieee_single" regnum="48"/>
- <reg name="f17" bitsize="32" type="ieee_single" regnum="49"/>
- <reg name="f18" bitsize="32" type="ieee_single" regnum="50"/>
- <reg name="f19" bitsize="32" type="ieee_single" regnum="51"/>
- <reg name="f20" bitsize="32" type="ieee_single" regnum="52"/>
- <reg name="f21" bitsize="32" type="ieee_single" regnum="53"/>
- <reg name="f22" bitsize="32" type="ieee_single" regnum="54"/>
- <reg name="f23" bitsize="32" type="ieee_single" regnum="55"/>
- <reg name="f24" bitsize="32" type="ieee_single" regnum="56"/>
- <reg name="f25" bitsize="32" type="ieee_single" regnum="57"/>
- <reg name="f26" bitsize="32" type="ieee_single" regnum="58"/>
- <reg name="f27" bitsize="32" type="ieee_single" regnum="59"/>
- <reg name="f28" bitsize="32" type="ieee_single" regnum="60"/>
- <reg name="f29" bitsize="32" type="ieee_single" regnum="61"/>
- <reg name="f30" bitsize="32" type="ieee_single" regnum="62"/>
- <reg name="f31" bitsize="32" type="ieee_single" regnum="63"/>
-
- <reg name="f32" bitsize="64" type="ieee_double" regnum="64"/>
- <reg name="f34" bitsize="64" type="ieee_double" regnum="65"/>
- <reg name="f36" bitsize="64" type="ieee_double" regnum="66"/>
- <reg name="f38" bitsize="64" type="ieee_double" regnum="67"/>
- <reg name="f40" bitsize="64" type="ieee_double" regnum="68"/>
- <reg name="f42" bitsize="64" type="ieee_double" regnum="69"/>
- <reg name="f44" bitsize="64" type="ieee_double" regnum="70"/>
- <reg name="f46" bitsize="64" type="ieee_double" regnum="71"/>
- <reg name="f48" bitsize="64" type="ieee_double" regnum="72"/>
- <reg name="f50" bitsize="64" type="ieee_double" regnum="73"/>
- <reg name="f52" bitsize="64" type="ieee_double" regnum="74"/>
- <reg name="f54" bitsize="64" type="ieee_double" regnum="75"/>
- <reg name="f56" bitsize="64" type="ieee_double" regnum="76"/>
- <reg name="f58" bitsize="64" type="ieee_double" regnum="77"/>
- <reg name="f60" bitsize="64" type="ieee_double" regnum="78"/>
- <reg name="f62" bitsize="64" type="ieee_double" regnum="79"/>
</feature>
diff --git a/gdb-xml/sparc64-fpu.xml b/gdb-xml/sparc64-fpu.xml
new file mode 100644
index 00000000000..d7151b34c7f
--- /dev/null
+++ b/gdb-xml/sparc64-fpu.xml
@@ -0,0 +1,59 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2013-2026 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.sparc.fpu">
+ <reg name="f0" bitsize="32" type="ieee_single" regnum="32"/>
+ <reg name="f1" bitsize="32" type="ieee_single" regnum="33"/>
+ <reg name="f2" bitsize="32" type="ieee_single" regnum="34"/>
+ <reg name="f3" bitsize="32" type="ieee_single" regnum="35"/>
+ <reg name="f4" bitsize="32" type="ieee_single" regnum="36"/>
+ <reg name="f5" bitsize="32" type="ieee_single" regnum="37"/>
+ <reg name="f6" bitsize="32" type="ieee_single" regnum="38"/>
+ <reg name="f7" bitsize="32" type="ieee_single" regnum="39"/>
+ <reg name="f8" bitsize="32" type="ieee_single" regnum="40"/>
+ <reg name="f9" bitsize="32" type="ieee_single" regnum="41"/>
+ <reg name="f10" bitsize="32" type="ieee_single" regnum="42"/>
+ <reg name="f11" bitsize="32" type="ieee_single" regnum="43"/>
+ <reg name="f12" bitsize="32" type="ieee_single" regnum="44"/>
+ <reg name="f13" bitsize="32" type="ieee_single" regnum="45"/>
+ <reg name="f14" bitsize="32" type="ieee_single" regnum="46"/>
+ <reg name="f15" bitsize="32" type="ieee_single" regnum="47"/>
+ <reg name="f16" bitsize="32" type="ieee_single" regnum="48"/>
+ <reg name="f17" bitsize="32" type="ieee_single" regnum="49"/>
+ <reg name="f18" bitsize="32" type="ieee_single" regnum="50"/>
+ <reg name="f19" bitsize="32" type="ieee_single" regnum="51"/>
+ <reg name="f20" bitsize="32" type="ieee_single" regnum="52"/>
+ <reg name="f21" bitsize="32" type="ieee_single" regnum="53"/>
+ <reg name="f22" bitsize="32" type="ieee_single" regnum="54"/>
+ <reg name="f23" bitsize="32" type="ieee_single" regnum="55"/>
+ <reg name="f24" bitsize="32" type="ieee_single" regnum="56"/>
+ <reg name="f25" bitsize="32" type="ieee_single" regnum="57"/>
+ <reg name="f26" bitsize="32" type="ieee_single" regnum="58"/>
+ <reg name="f27" bitsize="32" type="ieee_single" regnum="59"/>
+ <reg name="f28" bitsize="32" type="ieee_single" regnum="60"/>
+ <reg name="f29" bitsize="32" type="ieee_single" regnum="61"/>
+ <reg name="f30" bitsize="32" type="ieee_single" regnum="62"/>
+ <reg name="f31" bitsize="32" type="ieee_single" regnum="63"/>
+
+ <reg name="f32" bitsize="64" type="ieee_double" regnum="64"/>
+ <reg name="f34" bitsize="64" type="ieee_double" regnum="65"/>
+ <reg name="f36" bitsize="64" type="ieee_double" regnum="66"/>
+ <reg name="f38" bitsize="64" type="ieee_double" regnum="67"/>
+ <reg name="f40" bitsize="64" type="ieee_double" regnum="68"/>
+ <reg name="f42" bitsize="64" type="ieee_double" regnum="69"/>
+ <reg name="f44" bitsize="64" type="ieee_double" regnum="70"/>
+ <reg name="f46" bitsize="64" type="ieee_double" regnum="71"/>
+ <reg name="f48" bitsize="64" type="ieee_double" regnum="72"/>
+ <reg name="f50" bitsize="64" type="ieee_double" regnum="73"/>
+ <reg name="f52" bitsize="64" type="ieee_double" regnum="74"/>
+ <reg name="f54" bitsize="64" type="ieee_double" regnum="75"/>
+ <reg name="f56" bitsize="64" type="ieee_double" regnum="76"/>
+ <reg name="f58" bitsize="64" type="ieee_double" regnum="77"/>
+ <reg name="f60" bitsize="64" type="ieee_double" regnum="78"/>
+ <reg name="f62" bitsize="64" type="ieee_double" regnum="79"/>
+</feature>
--
2.52.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH 04/11] target/sparc: Restore 'gdb-xml/sparc64-cpu.xml'
2026-02-16 22:52 [PATCH 00/11] monitor/hmp: Automatically handle gdb-xml exposed registers Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2026-02-16 22:52 ` [PATCH 03/11] target/sparc: Restore 'gdb-xml/sparc64-fpu.xml' Philippe Mathieu-Daudé
@ 2026-02-16 22:52 ` Philippe Mathieu-Daudé
2026-02-16 22:52 ` [PATCH 05/11] target/sparc: Expose gdbstub registers to sparc32plus target Philippe Mathieu-Daudé
` (6 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-16 22:52 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Dr. David Alan Gilbert, Nicholas Piggin,
Chinmay Rath, Alex Bennée, Zhao Liu, Mark Cave-Ayland,
Pierrick Bouvier, Artyom Tarasenko, Akihiko Odaki, Gustavo Romero,
Paolo Bonzini, unisono, Philippe Mathieu-Daudé, qemu-ppc
Restore gdb-xml/sparc64-cpu.xml from mainstream binutils, tag
'binutils-2_46', found in the gdb/features/sparc/folder [*].
[*] https://sourceware.org/git/?p=binutils-gdb.git;a=tree;f=gdb/features/sparc;hb=refs/tags/binutils-2_46
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
configs/targets/sparc64-linux-user.mak | 2 +-
configs/targets/sparc64-softmmu.mak | 2 +-
target/sparc/cpu.c | 2 +-
gdb-xml/{sparc64-core.xml => sparc64-cpu.xml} | 4 ++--
4 files changed, 5 insertions(+), 5 deletions(-)
rename gdb-xml/{sparc64-core.xml => sparc64-cpu.xml} (95%)
diff --git a/configs/targets/sparc64-linux-user.mak b/configs/targets/sparc64-linux-user.mak
index a5f8f8d51a2..81d18fcc85b 100644
--- a/configs/targets/sparc64-linux-user.mak
+++ b/configs/targets/sparc64-linux-user.mak
@@ -4,6 +4,6 @@ TARGET_ABI_DIR=sparc
TARGET_SYSTBL_ABI=common,64
TARGET_SYSTBL=syscall.tbl
TARGET_BIG_ENDIAN=y
-TARGET_XML_FILES=gdb-xml/sparc64-core.xml gdb-xml/sparc64-fpu.xml gdb-xml/sparc64-cp0.xml
+TARGET_XML_FILES=gdb-xml/sparc64-cpu.xml gdb-xml/sparc64-fpu.xml gdb-xml/sparc64-cp0.xml
TARGET_LONG_BITS=64
TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
diff --git a/configs/targets/sparc64-softmmu.mak b/configs/targets/sparc64-softmmu.mak
index c35b6b1bb8a..602783ef0f6 100644
--- a/configs/targets/sparc64-softmmu.mak
+++ b/configs/targets/sparc64-softmmu.mak
@@ -1,7 +1,7 @@
TARGET_ARCH=sparc64
TARGET_BASE_ARCH=sparc
TARGET_BIG_ENDIAN=y
-TARGET_XML_FILES=gdb-xml/sparc64-core.xml gdb-xml/sparc64-fpu.xml gdb-xml/sparc64-cp0.xml
+TARGET_XML_FILES=gdb-xml/sparc64-cpu.xml gdb-xml/sparc64-fpu.xml gdb-xml/sparc64-cp0.xml
TARGET_LONG_BITS=64
TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 2db34d88b97..08ebbd3640b 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -1093,7 +1093,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, const void *data)
cc->disas_set_info = cpu_sparc_disas_set_info;
#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
- cc->gdb_core_xml_file = "sparc64-core.xml";
+ cc->gdb_core_xml_file = "sparc64-cpu.xml";
cc->gdb_num_core_regs = 32;
#else
cc->gdb_num_core_regs = 72;
diff --git a/gdb-xml/sparc64-core.xml b/gdb-xml/sparc64-cpu.xml
similarity index 95%
rename from gdb-xml/sparc64-core.xml
rename to gdb-xml/sparc64-cpu.xml
index 85b0820a408..a9bfc95ea65 100644
--- a/gdb-xml/sparc64-core.xml
+++ b/gdb-xml/sparc64-cpu.xml
@@ -1,12 +1,12 @@
<?xml version="1.0"?>
-<!-- Copyright (C) 2013-2025 Free Software Foundation, Inc.
+<!-- Copyright (C) 2013-2026 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
-<feature name="org.gnu.gdb.sparc.core">
+<feature name="org.gnu.gdb.sparc.cpu">
<reg name="g0" bitsize="64" type="uint64" regnum="0"/>
<reg name="g1" bitsize="64" type="uint64" regnum="1"/>
<reg name="g2" bitsize="64" type="uint64" regnum="2"/>
--
2.52.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH 05/11] target/sparc: Expose gdbstub registers to sparc32plus target
2026-02-16 22:52 [PATCH 00/11] monitor/hmp: Automatically handle gdb-xml exposed registers Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2026-02-16 22:52 ` [PATCH 04/11] target/sparc: Restore 'gdb-xml/sparc64-cpu.xml' Philippe Mathieu-Daudé
@ 2026-02-16 22:52 ` Philippe Mathieu-Daudé
2026-02-16 22:52 ` [PATCH 06/11] target/sparc: Expose gdbstub registers to sparc32 targets Philippe Mathieu-Daudé
` (5 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-16 22:52 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Dr. David Alan Gilbert, Nicholas Piggin,
Chinmay Rath, Alex Bennée, Zhao Liu, Mark Cave-Ayland,
Pierrick Bouvier, Artyom Tarasenko, Akihiko Odaki, Gustavo Romero,
Paolo Bonzini, unisono, Philippe Mathieu-Daudé, qemu-ppc
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
configs/targets/sparc32plus-linux-user.mak | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/targets/sparc32plus-linux-user.mak b/configs/targets/sparc32plus-linux-user.mak
index 3e6c72e793e..cf49c53ce44 100644
--- a/configs/targets/sparc32plus-linux-user.mak
+++ b/configs/targets/sparc32plus-linux-user.mak
@@ -5,5 +5,6 @@ TARGET_ABI_DIR=sparc
TARGET_SYSTBL_ABI=common,32
TARGET_SYSTBL=syscall.tbl
TARGET_BIG_ENDIAN=y
+TARGET_XML_FILES=gdb-xml/sparc64-cpu.xml gdb-xml/sparc64-fpu.xml gdb-xml/sparc64-cp0.xml
TARGET_LONG_BITS=64
TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
--
2.52.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH 06/11] target/sparc: Expose gdbstub registers to sparc32 targets
2026-02-16 22:52 [PATCH 00/11] monitor/hmp: Automatically handle gdb-xml exposed registers Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2026-02-16 22:52 ` [PATCH 05/11] target/sparc: Expose gdbstub registers to sparc32plus target Philippe Mathieu-Daudé
@ 2026-02-16 22:52 ` Philippe Mathieu-Daudé
2026-02-16 22:52 ` [PATCH 07/11] monitor/hmp: Handle gdb-xml exposed registers via gdb_get_register() Philippe Mathieu-Daudé
` (4 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-16 22:52 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Dr. David Alan Gilbert, Nicholas Piggin,
Chinmay Rath, Alex Bennée, Zhao Liu, Mark Cave-Ayland,
Pierrick Bouvier, Artyom Tarasenko, Akihiko Odaki, Gustavo Romero,
Paolo Bonzini, unisono, Philippe Mathieu-Daudé, qemu-ppc
Import gdb-xml/sparc32-{cpu,fpu,cp0}.xml from mainstream binutils,
tag 'binutils-2_46', found in the gdb/features/sparc/folder [*].
Register them by setting the CPUClass::gdb_core_xml_file field and
calling gdb_register_coprocessor() in sparc_cpu_register_gdb_regs().
[*] https://sourceware.org/git/?p=binutils-gdb.git;a=tree;f=gdb/features/sparc;hb=refs/tags/binutils-2_46
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
configs/targets/sparc-linux-user.mak | 1 +
configs/targets/sparc-softmmu.mak | 1 +
target/sparc/cpu.c | 3 +-
target/sparc/gdbstub.c | 13 +++++----
gdb-xml/sparc32-cp0.xml | 18 ++++++++++++
gdb-xml/sparc32-cpu.xml | 42 ++++++++++++++++++++++++++++
gdb-xml/sparc32-fpu.xml | 42 ++++++++++++++++++++++++++++
7 files changed, 114 insertions(+), 6 deletions(-)
create mode 100644 gdb-xml/sparc32-cp0.xml
create mode 100644 gdb-xml/sparc32-cpu.xml
create mode 100644 gdb-xml/sparc32-fpu.xml
diff --git a/configs/targets/sparc-linux-user.mak b/configs/targets/sparc-linux-user.mak
index d3f0716ca2d..01446e28783 100644
--- a/configs/targets/sparc-linux-user.mak
+++ b/configs/targets/sparc-linux-user.mak
@@ -2,5 +2,6 @@ TARGET_ARCH=sparc
TARGET_SYSTBL_ABI=common,32
TARGET_SYSTBL=syscall.tbl
TARGET_BIG_ENDIAN=y
+TARGET_XML_FILES=gdb-xml/sparc32-cpu.xml gdb-xml/sparc32-fpu.xml gdb-xml/sparc32-cp0.xml
TARGET_LONG_BITS=32
TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
diff --git a/configs/targets/sparc-softmmu.mak b/configs/targets/sparc-softmmu.mak
index c4c38946d54..ed846735f41 100644
--- a/configs/targets/sparc-softmmu.mak
+++ b/configs/targets/sparc-softmmu.mak
@@ -1,5 +1,6 @@
TARGET_ARCH=sparc
TARGET_BIG_ENDIAN=y
+TARGET_XML_FILES=gdb-xml/sparc32-cpu.xml gdb-xml/sparc32-fpu.xml gdb-xml/sparc32-cp0.xml
TARGET_LONG_BITS=32
TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 08ebbd3640b..ec454affaad 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -1096,7 +1096,8 @@ static void sparc_cpu_class_init(ObjectClass *oc, const void *data)
cc->gdb_core_xml_file = "sparc64-cpu.xml";
cc->gdb_num_core_regs = 32;
#else
- cc->gdb_num_core_regs = 72;
+ cc->gdb_core_xml_file = "sparc32-cpu.xml";
+ cc->gdb_num_core_regs = 32;
#endif
cc->tcg_ops = &sparc_tcg_ops;
}
diff --git a/target/sparc/gdbstub.c b/target/sparc/gdbstub.c
index b5b1494950a..ed52e521dcc 100644
--- a/target/sparc/gdbstub.c
+++ b/target/sparc/gdbstub.c
@@ -43,7 +43,6 @@ int sparc_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
return 0;
}
-__attribute__((unused))
static int sparc_fpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
CPUSPARCState *env = cpu_env(cs);
@@ -79,7 +78,6 @@ static int sparc_fpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
return 0;
}
-__attribute__((unused))
static int sparc_cp0_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
CPUSPARCState *env = cpu_env(cs);
@@ -154,7 +152,6 @@ int sparc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
#endif
}
-__attribute__((unused))
static int sparc_fpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
CPUSPARCState *env = cpu_env(cs);
@@ -197,7 +194,6 @@ static int sparc_fpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
#endif
}
-__attribute__((unused))
static int sparc_cp0_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
CPUSPARCState *env = cpu_env(cs);
@@ -271,7 +267,14 @@ static int sparc_cp0_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
void sparc_cpu_register_gdb_regs(CPUState *cs)
{
#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
- /* Not yet supported */
+ gdb_register_coprocessor(cs, sparc_fpu_gdb_read_register,
+ sparc_fpu_gdb_write_register,
+ gdb_find_static_feature("sparc32-fpu.xml"),
+ 0);
+ gdb_register_coprocessor(cs, sparc_cp0_gdb_read_register,
+ sparc_cp0_gdb_write_register,
+ gdb_find_static_feature("sparc32-cp0.xml"),
+ 0);
#else
gdb_register_coprocessor(cs, sparc_fpu_gdb_read_register,
sparc_fpu_gdb_write_register,
diff --git a/gdb-xml/sparc32-cp0.xml b/gdb-xml/sparc32-cp0.xml
new file mode 100644
index 00000000000..eacd89cf3b5
--- /dev/null
+++ b/gdb-xml/sparc32-cp0.xml
@@ -0,0 +1,18 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2013-2026 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.sparc.cp0">
+ <reg name="y" bitsize="32" type="uint32" regnum="64"/>
+ <reg name="psr" bitsize="32" type="uint32" regnum="65"/>
+ <reg name="wim" bitsize="32" type="uint32" regnum="66"/>
+ <reg name="tbr" bitsize="32" type="uint32" regnum="67"/>
+ <reg name="pc" bitsize="32" type="code_ptr" regnum="68"/>
+ <reg name="npc" bitsize="32" type="code_ptr" regnum="69"/>
+ <reg name="fsr" bitsize="32" type="uint32" regnum="70"/>
+ <reg name="csr" bitsize="32" type="uint32" regnum="71"/>
+</feature>
diff --git a/gdb-xml/sparc32-cpu.xml b/gdb-xml/sparc32-cpu.xml
new file mode 100644
index 00000000000..242295c886e
--- /dev/null
+++ b/gdb-xml/sparc32-cpu.xml
@@ -0,0 +1,42 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2013-2026 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.sparc.cpu">
+ <reg name="g0" bitsize="32" type="uint32" regnum="0"/>
+ <reg name="g1" bitsize="32" type="uint32" regnum="1"/>
+ <reg name="g2" bitsize="32" type="uint32" regnum="2"/>
+ <reg name="g3" bitsize="32" type="uint32" regnum="3"/>
+ <reg name="g4" bitsize="32" type="uint32" regnum="4"/>
+ <reg name="g5" bitsize="32" type="uint32" regnum="5"/>
+ <reg name="g6" bitsize="32" type="uint32" regnum="6"/>
+ <reg name="g7" bitsize="32" type="uint32" regnum="7"/>
+ <reg name="o0" bitsize="32" type="uint32" regnum="8"/>
+ <reg name="o1" bitsize="32" type="uint32" regnum="9"/>
+ <reg name="o2" bitsize="32" type="uint32" regnum="10"/>
+ <reg name="o3" bitsize="32" type="uint32" regnum="11"/>
+ <reg name="o4" bitsize="32" type="uint32" regnum="12"/>
+ <reg name="o5" bitsize="32" type="uint32" regnum="13"/>
+ <reg name="sp" bitsize="32" type="uint32" regnum="14"/>
+ <reg name="o7" bitsize="32" type="uint32" regnum="15"/>
+ <reg name="l0" bitsize="32" type="uint32" regnum="16"/>
+ <reg name="l1" bitsize="32" type="uint32" regnum="17"/>
+ <reg name="l2" bitsize="32" type="uint32" regnum="18"/>
+ <reg name="l3" bitsize="32" type="uint32" regnum="19"/>
+ <reg name="l4" bitsize="32" type="uint32" regnum="20"/>
+ <reg name="l5" bitsize="32" type="uint32" regnum="21"/>
+ <reg name="l6" bitsize="32" type="uint32" regnum="22"/>
+ <reg name="l7" bitsize="32" type="uint32" regnum="23"/>
+ <reg name="i0" bitsize="32" type="uint32" regnum="24"/>
+ <reg name="i1" bitsize="32" type="uint32" regnum="25"/>
+ <reg name="i2" bitsize="32" type="uint32" regnum="26"/>
+ <reg name="i3" bitsize="32" type="uint32" regnum="27"/>
+ <reg name="i4" bitsize="32" type="uint32" regnum="28"/>
+ <reg name="i5" bitsize="32" type="uint32" regnum="29"/>
+ <reg name="fp" bitsize="32" type="uint32" regnum="30"/>
+ <reg name="i7" bitsize="32" type="uint32" regnum="31"/>
+</feature>
diff --git a/gdb-xml/sparc32-fpu.xml b/gdb-xml/sparc32-fpu.xml
new file mode 100644
index 00000000000..38217ca7a92
--- /dev/null
+++ b/gdb-xml/sparc32-fpu.xml
@@ -0,0 +1,42 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2013-2026 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.sparc.fpu">
+ <reg name="f0" bitsize="32" type="ieee_single" regnum="32"/>
+ <reg name="f1" bitsize="32" type="ieee_single" regnum="33"/>
+ <reg name="f2" bitsize="32" type="ieee_single" regnum="34"/>
+ <reg name="f3" bitsize="32" type="ieee_single" regnum="35"/>
+ <reg name="f4" bitsize="32" type="ieee_single" regnum="36"/>
+ <reg name="f5" bitsize="32" type="ieee_single" regnum="37"/>
+ <reg name="f6" bitsize="32" type="ieee_single" regnum="38"/>
+ <reg name="f7" bitsize="32" type="ieee_single" regnum="39"/>
+ <reg name="f8" bitsize="32" type="ieee_single" regnum="40"/>
+ <reg name="f9" bitsize="32" type="ieee_single" regnum="41"/>
+ <reg name="f10" bitsize="32" type="ieee_single" regnum="42"/>
+ <reg name="f11" bitsize="32" type="ieee_single" regnum="43"/>
+ <reg name="f12" bitsize="32" type="ieee_single" regnum="44"/>
+ <reg name="f13" bitsize="32" type="ieee_single" regnum="45"/>
+ <reg name="f14" bitsize="32" type="ieee_single" regnum="46"/>
+ <reg name="f15" bitsize="32" type="ieee_single" regnum="47"/>
+ <reg name="f16" bitsize="32" type="ieee_single" regnum="48"/>
+ <reg name="f17" bitsize="32" type="ieee_single" regnum="49"/>
+ <reg name="f18" bitsize="32" type="ieee_single" regnum="50"/>
+ <reg name="f19" bitsize="32" type="ieee_single" regnum="51"/>
+ <reg name="f20" bitsize="32" type="ieee_single" regnum="52"/>
+ <reg name="f21" bitsize="32" type="ieee_single" regnum="53"/>
+ <reg name="f22" bitsize="32" type="ieee_single" regnum="54"/>
+ <reg name="f23" bitsize="32" type="ieee_single" regnum="55"/>
+ <reg name="f24" bitsize="32" type="ieee_single" regnum="56"/>
+ <reg name="f25" bitsize="32" type="ieee_single" regnum="57"/>
+ <reg name="f26" bitsize="32" type="ieee_single" regnum="58"/>
+ <reg name="f27" bitsize="32" type="ieee_single" regnum="59"/>
+ <reg name="f28" bitsize="32" type="ieee_single" regnum="60"/>
+ <reg name="f29" bitsize="32" type="ieee_single" regnum="61"/>
+ <reg name="f30" bitsize="32" type="ieee_single" regnum="62"/>
+ <reg name="f31" bitsize="32" type="ieee_single" regnum="63"/>
+</feature>
--
2.52.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH 07/11] monitor/hmp: Handle gdb-xml exposed registers via gdb_get_register()
2026-02-16 22:52 [PATCH 00/11] monitor/hmp: Automatically handle gdb-xml exposed registers Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2026-02-16 22:52 ` [PATCH 06/11] target/sparc: Expose gdbstub registers to sparc32 targets Philippe Mathieu-Daudé
@ 2026-02-16 22:52 ` Philippe Mathieu-Daudé
2026-02-17 6:51 ` Philippe Mathieu-Daudé
2026-02-18 13:54 ` Dr. David Alan Gilbert
2026-02-16 22:52 ` [PATCH 08/11] target/sparc: Remove MonitorDef register entries available via gdbstub Philippe Mathieu-Daudé
` (3 subsequent siblings)
10 siblings, 2 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-16 22:52 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Dr. David Alan Gilbert, Nicholas Piggin,
Chinmay Rath, Alex Bennée, Zhao Liu, Mark Cave-Ayland,
Pierrick Bouvier, Artyom Tarasenko, Akihiko Odaki, Gustavo Romero,
Paolo Bonzini, unisono, Philippe Mathieu-Daudé, qemu-ppc
Implement the gdb_get_register() helper and call it before the
regular get_monitor_def() one. Registers is exposed via the
GDB XML files will be directly handled, possibily allowing new
registers added to XML files to be automatically accessible in
QEMU monitor. All targets having GDB XML files can now be used
within the monitor.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
monitor/hmp.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 46 insertions(+), 3 deletions(-)
diff --git a/monitor/hmp.c b/monitor/hmp.c
index 0a5bbf82197..0e5913fabb1 100644
--- a/monitor/hmp.c
+++ b/monitor/hmp.c
@@ -27,14 +27,18 @@
#include "hw/core/qdev.h"
#include "monitor-internal.h"
#include "monitor/hmp.h"
+#include "monitor/hmp-target.h"
#include "qobject/qdict.h"
#include "qobject/qnum.h"
+#include "qemu/bswap.h"
#include "qemu/config-file.h"
#include "qemu/ctype.h"
#include "qemu/cutils.h"
#include "qemu/log.h"
#include "qemu/option.h"
+#include "qemu/target-info.h"
#include "qemu/units.h"
+#include "exec/gdbstub.h"
#include "system/block-backend.h"
#include "trace.h"
@@ -306,6 +310,46 @@ void hmp_help_cmd(Monitor *mon, const char *name)
free_cmdline_args(args, nb_args);
}
+/*
+ * Set @pval to the value in the register identified by @name.
+ * return %true if the register is found, %false otherwise.
+ */
+static bool gdb_get_register(Monitor *mon, int64_t *pval, const char *name)
+{
+ g_autoptr(GArray) regs = NULL;
+ CPUState *cs = mon_get_cpu(mon);
+
+ if (cs == NULL) {
+ return false;
+ }
+
+ regs = gdb_get_register_list(cs);
+
+ for (int i = 0; i < regs->len; i++) {
+ GDBRegDesc *reg = &g_array_index(regs, GDBRegDesc, i);
+ g_autoptr(GByteArray) buf = NULL;
+ int reg_size;
+
+ if (!reg->name || g_strcmp0(name, reg->name)) {
+ continue;
+ }
+
+ buf = g_byte_array_new();
+ reg_size = gdb_read_register(cs, buf, reg->gdb_reg);
+ if (reg_size > sizeof(*pval)) {
+ return false;
+ }
+
+ if (target_big_endian()) {
+ *pval = ldn_be_p(buf->data, reg_size);
+ } else {
+ *pval = ldn_le_p(buf->data, reg_size);
+ }
+ return true;
+ }
+ return false;
+}
+
/*******************************************************************/
static const char *pch;
@@ -338,7 +382,6 @@ static int64_t expr_unary(Monitor *mon)
{
int64_t n;
char *p;
- int ret;
switch (*pch) {
case '+':
@@ -393,8 +436,8 @@ static int64_t expr_unary(Monitor *mon)
pch++;
}
*q = 0;
- ret = get_monitor_def(mon, ®, buf);
- if (ret < 0) {
+ if (!gdb_get_register(mon, ®, buf)
+ && get_monitor_def(mon, ®, buf) < 0) {
expr_error(mon, "unknown register");
}
n = reg;
--
2.52.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH 07/11] monitor/hmp: Handle gdb-xml exposed registers via gdb_get_register()
2026-02-16 22:52 ` [PATCH 07/11] monitor/hmp: Handle gdb-xml exposed registers via gdb_get_register() Philippe Mathieu-Daudé
@ 2026-02-17 6:51 ` Philippe Mathieu-Daudé
2026-02-18 13:54 ` Dr. David Alan Gilbert
1 sibling, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-17 6:51 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Dr. David Alan Gilbert, Nicholas Piggin,
Chinmay Rath, Alex Bennée, Zhao Liu, Mark Cave-Ayland,
Pierrick Bouvier, Artyom Tarasenko, Akihiko Odaki, Gustavo Romero,
Paolo Bonzini, unisono, qemu-ppc
On 16/2/26 23:52, Philippe Mathieu-Daudé wrote:
> Implement the gdb_get_register() helper and call it before the
> regular get_monitor_def() one. Registers is exposed via the
> GDB XML files will be directly handled, possibily allowing new
> registers added to XML files to be automatically accessible in
> QEMU monitor. All targets having GDB XML files can now be used
> within the monitor.
For example with Loongarch, before:
$ qemu-system-loongarch64 -M virt -S -monitor stdio
QEMU 10.2.0 monitor - type 'help' for more information
(qemu) info registers
CPU#0
PC=000000001c000000 FCSR0 0x00000000
...
(qemu) p/x $pc
unknown register
Try "help p" for more information
(qemu)
and after:
$ ./qemu-system-loongarch64 -M virt -S -monitor stdio
QEMU 10.2.50 monitor - type 'help' for more information
(qemu) p/x $pc
0x1c000000
(qemu)
Similarly RISC-V:
QEMU 10.2.0 monitor - type 'help' for more information
(qemu) p/x $pc
unknown register
Try "help p" for more information
VS
QEMU 10.2.50 monitor - type 'help' for more information
(qemu) p/x $pc
0x1000
(qemu)
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> monitor/hmp.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++---
> 1 file changed, 46 insertions(+), 3 deletions(-)
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH 07/11] monitor/hmp: Handle gdb-xml exposed registers via gdb_get_register()
2026-02-16 22:52 ` [PATCH 07/11] monitor/hmp: Handle gdb-xml exposed registers via gdb_get_register() Philippe Mathieu-Daudé
2026-02-17 6:51 ` Philippe Mathieu-Daudé
@ 2026-02-18 13:54 ` Dr. David Alan Gilbert
1 sibling, 0 replies; 15+ messages in thread
From: Dr. David Alan Gilbert @ 2026-02-18 13:54 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Laurent Vivier, Nicholas Piggin, Chinmay Rath,
Alex Bennée, Zhao Liu, Mark Cave-Ayland, Pierrick Bouvier,
Artyom Tarasenko, Akihiko Odaki, Gustavo Romero, Paolo Bonzini,
unisono, qemu-ppc
* Philippe Mathieu-Daudé (philmd@linaro.org) wrote:
> Implement the gdb_get_register() helper and call it before the
> regular get_monitor_def() one. Registers is exposed via the
> GDB XML files will be directly handled, possibily allowing new
> registers added to XML files to be automatically accessible in
> QEMU monitor. All targets having GDB XML files can now be used
> within the monitor.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Nice; I might be tempted to add more checks on the return size of
gdb_read_register(..) just in case any arch is a bit screwy
(e.g. if they're 0 for example?) - but it should fine.
So for HMP;
Reviewed-by: Dr. David Alan Gilbert <dave@treblig.org>
> ---
> monitor/hmp.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++---
> 1 file changed, 46 insertions(+), 3 deletions(-)
>
> diff --git a/monitor/hmp.c b/monitor/hmp.c
> index 0a5bbf82197..0e5913fabb1 100644
> --- a/monitor/hmp.c
> +++ b/monitor/hmp.c
> @@ -27,14 +27,18 @@
> #include "hw/core/qdev.h"
> #include "monitor-internal.h"
> #include "monitor/hmp.h"
> +#include "monitor/hmp-target.h"
> #include "qobject/qdict.h"
> #include "qobject/qnum.h"
> +#include "qemu/bswap.h"
> #include "qemu/config-file.h"
> #include "qemu/ctype.h"
> #include "qemu/cutils.h"
> #include "qemu/log.h"
> #include "qemu/option.h"
> +#include "qemu/target-info.h"
> #include "qemu/units.h"
> +#include "exec/gdbstub.h"
> #include "system/block-backend.h"
> #include "trace.h"
>
> @@ -306,6 +310,46 @@ void hmp_help_cmd(Monitor *mon, const char *name)
> free_cmdline_args(args, nb_args);
> }
>
> +/*
> + * Set @pval to the value in the register identified by @name.
> + * return %true if the register is found, %false otherwise.
> + */
> +static bool gdb_get_register(Monitor *mon, int64_t *pval, const char *name)
> +{
> + g_autoptr(GArray) regs = NULL;
> + CPUState *cs = mon_get_cpu(mon);
> +
> + if (cs == NULL) {
> + return false;
> + }
> +
> + regs = gdb_get_register_list(cs);
> +
> + for (int i = 0; i < regs->len; i++) {
> + GDBRegDesc *reg = &g_array_index(regs, GDBRegDesc, i);
> + g_autoptr(GByteArray) buf = NULL;
> + int reg_size;
> +
> + if (!reg->name || g_strcmp0(name, reg->name)) {
> + continue;
> + }
> +
> + buf = g_byte_array_new();
> + reg_size = gdb_read_register(cs, buf, reg->gdb_reg);
> + if (reg_size > sizeof(*pval)) {
> + return false;
> + }
> +
> + if (target_big_endian()) {
> + *pval = ldn_be_p(buf->data, reg_size);
> + } else {
> + *pval = ldn_le_p(buf->data, reg_size);
> + }
> + return true;
> + }
> + return false;
> +}
> +
> /*******************************************************************/
>
> static const char *pch;
> @@ -338,7 +382,6 @@ static int64_t expr_unary(Monitor *mon)
> {
> int64_t n;
> char *p;
> - int ret;
>
> switch (*pch) {
> case '+':
> @@ -393,8 +436,8 @@ static int64_t expr_unary(Monitor *mon)
> pch++;
> }
> *q = 0;
> - ret = get_monitor_def(mon, ®, buf);
> - if (ret < 0) {
> + if (!gdb_get_register(mon, ®, buf)
> + && get_monitor_def(mon, ®, buf) < 0) {
> expr_error(mon, "unknown register");
> }
> n = reg;
> --
> 2.52.0
>
--
-----Open up your eyes, open up your mind, open up your code -------
/ Dr. David Alan Gilbert | Running GNU/Linux | Happy \
\ dave @ treblig.org | | In Hex /
\ _________________________|_____ http://www.treblig.org |_______/
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 08/11] target/sparc: Remove MonitorDef register entries available via gdbstub
2026-02-16 22:52 [PATCH 00/11] monitor/hmp: Automatically handle gdb-xml exposed registers Philippe Mathieu-Daudé
` (6 preceding siblings ...)
2026-02-16 22:52 ` [PATCH 07/11] monitor/hmp: Handle gdb-xml exposed registers via gdb_get_register() Philippe Mathieu-Daudé
@ 2026-02-16 22:52 ` Philippe Mathieu-Daudé
2026-02-16 22:52 ` [PATCH 09/11] target/i386: " Philippe Mathieu-Daudé
` (2 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-16 22:52 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Dr. David Alan Gilbert, Nicholas Piggin,
Chinmay Rath, Alex Bennée, Zhao Liu, Mark Cave-Ayland,
Pierrick Bouvier, Artyom Tarasenko, Akihiko Odaki, Gustavo Romero,
Paolo Bonzini, unisono, Philippe Mathieu-Daudé, qemu-ppc
All these registers are already provided by via gdbstub parsed XML
and handler by the gdb_get_register() helper in the monitor/hmp.c
file. Remove as now unreachable code.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/sparc/monitor.c | 107 -----------------------------------------
1 file changed, 107 deletions(-)
diff --git a/target/sparc/monitor.c b/target/sparc/monitor.c
index 73f15aa272d..a60671a60a4 100644
--- a/target/sparc/monitor.c
+++ b/target/sparc/monitor.c
@@ -39,114 +39,8 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict)
dump_mmu(env1);
}
-#ifndef TARGET_SPARC64
-static target_long monitor_get_psr(Monitor *mon, const struct MonitorDef *md,
- int val)
-{
- CPUArchState *env = mon_get_cpu_env(mon);
-
- return cpu_get_psr(env);
-}
-#endif
-
-static target_long monitor_get_reg(Monitor *mon, const struct MonitorDef *md,
- int val)
-{
- CPUArchState *env = mon_get_cpu_env(mon);
- return env->regwptr[val];
-}
-
const MonitorDef monitor_defs[] = {
- { "g0", offsetof(CPUSPARCState, gregs[0]) },
- { "g1", offsetof(CPUSPARCState, gregs[1]) },
- { "g2", offsetof(CPUSPARCState, gregs[2]) },
- { "g3", offsetof(CPUSPARCState, gregs[3]) },
- { "g4", offsetof(CPUSPARCState, gregs[4]) },
- { "g5", offsetof(CPUSPARCState, gregs[5]) },
- { "g6", offsetof(CPUSPARCState, gregs[6]) },
- { "g7", offsetof(CPUSPARCState, gregs[7]) },
- { "o0", 0, monitor_get_reg },
- { "o1", 1, monitor_get_reg },
- { "o2", 2, monitor_get_reg },
- { "o3", 3, monitor_get_reg },
- { "o4", 4, monitor_get_reg },
- { "o5", 5, monitor_get_reg },
- { "o6", 6, monitor_get_reg },
- { "o7", 7, monitor_get_reg },
- { "l0", 8, monitor_get_reg },
- { "l1", 9, monitor_get_reg },
- { "l2", 10, monitor_get_reg },
- { "l3", 11, monitor_get_reg },
- { "l4", 12, monitor_get_reg },
- { "l5", 13, monitor_get_reg },
- { "l6", 14, monitor_get_reg },
- { "l7", 15, monitor_get_reg },
- { "i0", 16, monitor_get_reg },
- { "i1", 17, monitor_get_reg },
- { "i2", 18, monitor_get_reg },
- { "i3", 19, monitor_get_reg },
- { "i4", 20, monitor_get_reg },
- { "i5", 21, monitor_get_reg },
- { "i6", 22, monitor_get_reg },
- { "i7", 23, monitor_get_reg },
- { "pc", offsetof(CPUSPARCState, pc) },
- { "npc", offsetof(CPUSPARCState, npc) },
- { "y", offsetof(CPUSPARCState, y) },
-#ifndef TARGET_SPARC64
- { "psr", 0, &monitor_get_psr, },
- { "wim", offsetof(CPUSPARCState, wim) },
-#endif
- { "tbr", offsetof(CPUSPARCState, tbr) },
- { "fsr", offsetof(CPUSPARCState, fsr) },
- { "f0", offsetof(CPUSPARCState, fpr[0].l.upper) },
- { "f1", offsetof(CPUSPARCState, fpr[0].l.lower) },
- { "f2", offsetof(CPUSPARCState, fpr[1].l.upper) },
- { "f3", offsetof(CPUSPARCState, fpr[1].l.lower) },
- { "f4", offsetof(CPUSPARCState, fpr[2].l.upper) },
- { "f5", offsetof(CPUSPARCState, fpr[2].l.lower) },
- { "f6", offsetof(CPUSPARCState, fpr[3].l.upper) },
- { "f7", offsetof(CPUSPARCState, fpr[3].l.lower) },
- { "f8", offsetof(CPUSPARCState, fpr[4].l.upper) },
- { "f9", offsetof(CPUSPARCState, fpr[4].l.lower) },
- { "f10", offsetof(CPUSPARCState, fpr[5].l.upper) },
- { "f11", offsetof(CPUSPARCState, fpr[5].l.lower) },
- { "f12", offsetof(CPUSPARCState, fpr[6].l.upper) },
- { "f13", offsetof(CPUSPARCState, fpr[6].l.lower) },
- { "f14", offsetof(CPUSPARCState, fpr[7].l.upper) },
- { "f15", offsetof(CPUSPARCState, fpr[7].l.lower) },
- { "f16", offsetof(CPUSPARCState, fpr[8].l.upper) },
- { "f17", offsetof(CPUSPARCState, fpr[8].l.lower) },
- { "f18", offsetof(CPUSPARCState, fpr[9].l.upper) },
- { "f19", offsetof(CPUSPARCState, fpr[9].l.lower) },
- { "f20", offsetof(CPUSPARCState, fpr[10].l.upper) },
- { "f21", offsetof(CPUSPARCState, fpr[10].l.lower) },
- { "f22", offsetof(CPUSPARCState, fpr[11].l.upper) },
- { "f23", offsetof(CPUSPARCState, fpr[11].l.lower) },
- { "f24", offsetof(CPUSPARCState, fpr[12].l.upper) },
- { "f25", offsetof(CPUSPARCState, fpr[12].l.lower) },
- { "f26", offsetof(CPUSPARCState, fpr[13].l.upper) },
- { "f27", offsetof(CPUSPARCState, fpr[13].l.lower) },
- { "f28", offsetof(CPUSPARCState, fpr[14].l.upper) },
- { "f29", offsetof(CPUSPARCState, fpr[14].l.lower) },
- { "f30", offsetof(CPUSPARCState, fpr[15].l.upper) },
- { "f31", offsetof(CPUSPARCState, fpr[15].l.lower) },
#ifdef TARGET_SPARC64
- { "f32", offsetof(CPUSPARCState, fpr[16]) },
- { "f34", offsetof(CPUSPARCState, fpr[17]) },
- { "f36", offsetof(CPUSPARCState, fpr[18]) },
- { "f38", offsetof(CPUSPARCState, fpr[19]) },
- { "f40", offsetof(CPUSPARCState, fpr[20]) },
- { "f42", offsetof(CPUSPARCState, fpr[21]) },
- { "f44", offsetof(CPUSPARCState, fpr[22]) },
- { "f46", offsetof(CPUSPARCState, fpr[23]) },
- { "f48", offsetof(CPUSPARCState, fpr[24]) },
- { "f50", offsetof(CPUSPARCState, fpr[25]) },
- { "f52", offsetof(CPUSPARCState, fpr[26]) },
- { "f54", offsetof(CPUSPARCState, fpr[27]) },
- { "f56", offsetof(CPUSPARCState, fpr[28]) },
- { "f58", offsetof(CPUSPARCState, fpr[29]) },
- { "f60", offsetof(CPUSPARCState, fpr[30]) },
- { "f62", offsetof(CPUSPARCState, fpr[31]) },
{ "asi", offsetof(CPUSPARCState, asi) },
{ "pstate", offsetof(CPUSPARCState, pstate) },
{ "cansave", offsetof(CPUSPARCState, cansave) },
@@ -154,7 +48,6 @@ const MonitorDef monitor_defs[] = {
{ "otherwin", offsetof(CPUSPARCState, otherwin) },
{ "wstate", offsetof(CPUSPARCState, wstate) },
{ "cleanwin", offsetof(CPUSPARCState, cleanwin) },
- { "fprs", offsetof(CPUSPARCState, fprs), NULL, MD_I32 },
#endif
{ NULL },
};
--
2.52.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH 09/11] target/i386: Remove MonitorDef register entries available via gdbstub
2026-02-16 22:52 [PATCH 00/11] monitor/hmp: Automatically handle gdb-xml exposed registers Philippe Mathieu-Daudé
` (7 preceding siblings ...)
2026-02-16 22:52 ` [PATCH 08/11] target/sparc: Remove MonitorDef register entries available via gdbstub Philippe Mathieu-Daudé
@ 2026-02-16 22:52 ` Philippe Mathieu-Daudé
2026-02-16 22:52 ` [PATCH 10/11] target/m68k: " Philippe Mathieu-Daudé
2026-02-16 22:52 ` [PATCH 11/11] target/ppc: " Philippe Mathieu-Daudé
10 siblings, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-16 22:52 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Dr. David Alan Gilbert, Nicholas Piggin,
Chinmay Rath, Alex Bennée, Zhao Liu, Mark Cave-Ayland,
Pierrick Bouvier, Artyom Tarasenko, Akihiko Odaki, Gustavo Romero,
Paolo Bonzini, unisono, Philippe Mathieu-Daudé, qemu-ppc
All these registers are already provided by via gdbstub parsed XML
and handler by the gdb_get_register() helper in the monitor/hmp.c
file. Remove as now unreachable code.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/i386/monitor.c | 35 -----------------------------------
1 file changed, 35 deletions(-)
diff --git a/target/i386/monitor.c b/target/i386/monitor.c
index 99b32cb7b0f..0660fcabc2f 100644
--- a/target/i386/monitor.c
+++ b/target/i386/monitor.c
@@ -605,41 +605,6 @@ const MonitorDef monitor_defs[] = {
{ name, offsetof(CPUX86State, segs[seg].selector), NULL, MD_I32 },\
{ name ".base", offsetof(CPUX86State, segs[seg].base) },\
{ name ".limit", offsetof(CPUX86State, segs[seg].limit), NULL, MD_I32 },
-
- { "eax", offsetof(CPUX86State, regs[0]) },
- { "ecx", offsetof(CPUX86State, regs[1]) },
- { "edx", offsetof(CPUX86State, regs[2]) },
- { "ebx", offsetof(CPUX86State, regs[3]) },
- { "esp|sp", offsetof(CPUX86State, regs[4]) },
- { "ebp|fp", offsetof(CPUX86State, regs[5]) },
- { "esi", offsetof(CPUX86State, regs[6]) },
- { "edi", offsetof(CPUX86State, regs[7]) },
-#ifdef TARGET_X86_64
- { "r8", offsetof(CPUX86State, regs[8]) },
- { "r9", offsetof(CPUX86State, regs[9]) },
- { "r10", offsetof(CPUX86State, regs[10]) },
- { "r11", offsetof(CPUX86State, regs[11]) },
- { "r12", offsetof(CPUX86State, regs[12]) },
- { "r13", offsetof(CPUX86State, regs[13]) },
- { "r14", offsetof(CPUX86State, regs[14]) },
- { "r15", offsetof(CPUX86State, regs[15]) },
- { "r16", offsetof(CPUX86State, regs[16]) },
- { "r17", offsetof(CPUX86State, regs[17]) },
- { "r18", offsetof(CPUX86State, regs[18]) },
- { "r19", offsetof(CPUX86State, regs[19]) },
- { "r20", offsetof(CPUX86State, regs[20]) },
- { "r21", offsetof(CPUX86State, regs[21]) },
- { "r22", offsetof(CPUX86State, regs[22]) },
- { "r23", offsetof(CPUX86State, regs[23]) },
- { "r24", offsetof(CPUX86State, regs[24]) },
- { "r25", offsetof(CPUX86State, regs[25]) },
- { "r26", offsetof(CPUX86State, regs[26]) },
- { "r27", offsetof(CPUX86State, regs[27]) },
- { "r28", offsetof(CPUX86State, regs[28]) },
- { "r29", offsetof(CPUX86State, regs[29]) },
- { "r30", offsetof(CPUX86State, regs[30]) },
- { "r31", offsetof(CPUX86State, regs[31]) },
-#endif
{ "eflags", offsetof(CPUX86State, eflags) },
{ "eip", offsetof(CPUX86State, eip) },
SEG("cs", R_CS)
--
2.52.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH 10/11] target/m68k: Remove MonitorDef register entries available via gdbstub
2026-02-16 22:52 [PATCH 00/11] monitor/hmp: Automatically handle gdb-xml exposed registers Philippe Mathieu-Daudé
` (8 preceding siblings ...)
2026-02-16 22:52 ` [PATCH 09/11] target/i386: " Philippe Mathieu-Daudé
@ 2026-02-16 22:52 ` Philippe Mathieu-Daudé
2026-02-16 22:52 ` [PATCH 11/11] target/ppc: " Philippe Mathieu-Daudé
10 siblings, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-16 22:52 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Dr. David Alan Gilbert, Nicholas Piggin,
Chinmay Rath, Alex Bennée, Zhao Liu, Mark Cave-Ayland,
Pierrick Bouvier, Artyom Tarasenko, Akihiko Odaki, Gustavo Romero,
Paolo Bonzini, unisono, Philippe Mathieu-Daudé, qemu-ppc
All these registers are already provided by via gdbstub parsed XML
and handler by the gdb_get_register() helper in the monitor/hmp.c
file. Remove as now unreachable code.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/m68k/monitor.c | 18 ------------------
1 file changed, 18 deletions(-)
diff --git a/target/m68k/monitor.c b/target/m68k/monitor.c
index 6d101c75df0..08ced037b47 100644
--- a/target/m68k/monitor.c
+++ b/target/m68k/monitor.c
@@ -24,24 +24,6 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict)
}
static const MonitorDef monitor_defs[] = {
- { "d0", offsetof(CPUM68KState, dregs[0]), NULL, MD_I32 },
- { "d1", offsetof(CPUM68KState, dregs[1]), NULL, MD_I32 },
- { "d2", offsetof(CPUM68KState, dregs[2]), NULL, MD_I32 },
- { "d3", offsetof(CPUM68KState, dregs[3]), NULL, MD_I32 },
- { "d4", offsetof(CPUM68KState, dregs[4]), NULL, MD_I32 },
- { "d5", offsetof(CPUM68KState, dregs[5]), NULL, MD_I32 },
- { "d6", offsetof(CPUM68KState, dregs[6]), NULL, MD_I32 },
- { "d7", offsetof(CPUM68KState, dregs[7]), NULL, MD_I32 },
- { "a0", offsetof(CPUM68KState, aregs[0]), NULL, MD_I32 },
- { "a1", offsetof(CPUM68KState, aregs[1]), NULL, MD_I32 },
- { "a2", offsetof(CPUM68KState, aregs[2]), NULL, MD_I32 },
- { "a3", offsetof(CPUM68KState, aregs[3]), NULL, MD_I32 },
- { "a4", offsetof(CPUM68KState, aregs[4]), NULL, MD_I32 },
- { "a5", offsetof(CPUM68KState, aregs[5]), NULL, MD_I32 },
- { "a6", offsetof(CPUM68KState, aregs[6]), NULL, MD_I32 },
- { "a7", offsetof(CPUM68KState, aregs[7]), NULL, MD_I32 },
- { "pc", offsetof(CPUM68KState, pc), NULL, MD_I32 },
- { "sr", offsetof(CPUM68KState, sr), NULL, MD_I32 },
{ "ssp", offsetof(CPUM68KState, sp[0]), NULL, MD_I32 },
{ "usp", offsetof(CPUM68KState, sp[1]), NULL, MD_I32 },
{ "isp", offsetof(CPUM68KState, sp[2]), NULL, MD_I32 },
--
2.52.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH 11/11] target/ppc: Remove MonitorDef register entries available via gdbstub
2026-02-16 22:52 [PATCH 00/11] monitor/hmp: Automatically handle gdb-xml exposed registers Philippe Mathieu-Daudé
` (9 preceding siblings ...)
2026-02-16 22:52 ` [PATCH 10/11] target/m68k: " Philippe Mathieu-Daudé
@ 2026-02-16 22:52 ` Philippe Mathieu-Daudé
2026-02-16 23:10 ` BALATON Zoltan
10 siblings, 1 reply; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-16 22:52 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Dr. David Alan Gilbert, Nicholas Piggin,
Chinmay Rath, Alex Bennée, Zhao Liu, Mark Cave-Ayland,
Pierrick Bouvier, Artyom Tarasenko, Akihiko Odaki, Gustavo Romero,
Paolo Bonzini, unisono, Philippe Mathieu-Daudé, qemu-ppc
All these registers are already provided by via gdbstub parsed XML
and handler by the gdb_get_register() helper in the monitor/hmp.c
file. Remove as now unreachable code.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/ppc/ppc-qmp-cmds.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/target/ppc/ppc-qmp-cmds.c b/target/ppc/ppc-qmp-cmds.c
index 7022564604f..7dfa78c2e0d 100644
--- a/target/ppc/ppc-qmp-cmds.c
+++ b/target/ppc/ppc-qmp-cmds.c
@@ -93,16 +93,11 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict)
}
const MonitorDef monitor_defs[] = {
- { "fpscr", offsetof(CPUPPCState, fpscr) },
/* Next instruction pointer */
- { "nip|pc", offsetof(CPUPPCState, nip) },
- { "lr", offsetof(CPUPPCState, lr) },
- { "ctr", offsetof(CPUPPCState, ctr) },
{ "decr", 0, &monitor_get_decr, },
{ "ccr|cr", 0, &monitor_get_ccr, },
/* Machine state register */
{ "xer", 0, &monitor_get_xer },
- { "msr", offsetof(CPUPPCState, msr) },
{ "tbu", 0, &monitor_get_tbu, },
#if defined(TARGET_PPC64)
{ "tb", 0, &monitor_get_tbl, },
--
2.52.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH 11/11] target/ppc: Remove MonitorDef register entries available via gdbstub
2026-02-16 22:52 ` [PATCH 11/11] target/ppc: " Philippe Mathieu-Daudé
@ 2026-02-16 23:10 ` BALATON Zoltan
0 siblings, 0 replies; 15+ messages in thread
From: BALATON Zoltan @ 2026-02-16 23:10 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Laurent Vivier, Dr. David Alan Gilbert,
Nicholas Piggin, Chinmay Rath, Alex Bennée, Zhao Liu,
Mark Cave-Ayland, Pierrick Bouvier, Artyom Tarasenko,
Akihiko Odaki, Gustavo Romero, Paolo Bonzini, unisono, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 1311 bytes --]
On Mon, 16 Feb 2026, Philippe Mathieu-Daudé wrote:
> All these registers are already provided by via gdbstub parsed XML
> and handler by the gdb_get_register() helper in the monitor/hmp.c
> file. Remove as now unreachable code.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> target/ppc/ppc-qmp-cmds.c | 5 -----
> 1 file changed, 5 deletions(-)
>
> diff --git a/target/ppc/ppc-qmp-cmds.c b/target/ppc/ppc-qmp-cmds.c
> index 7022564604f..7dfa78c2e0d 100644
> --- a/target/ppc/ppc-qmp-cmds.c
> +++ b/target/ppc/ppc-qmp-cmds.c
> @@ -93,16 +93,11 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict)
> }
>
> const MonitorDef monitor_defs[] = {
> - { "fpscr", offsetof(CPUPPCState, fpscr) },
> /* Next instruction pointer */
This comment should also go as it's for nip removed (nipped? :-) ) from
next line.
Regards,
BALATON Zoltan
> - { "nip|pc", offsetof(CPUPPCState, nip) },
> - { "lr", offsetof(CPUPPCState, lr) },
> - { "ctr", offsetof(CPUPPCState, ctr) },
> { "decr", 0, &monitor_get_decr, },
> { "ccr|cr", 0, &monitor_get_ccr, },
> /* Machine state register */
> { "xer", 0, &monitor_get_xer },
> - { "msr", offsetof(CPUPPCState, msr) },
> { "tbu", 0, &monitor_get_tbu, },
> #if defined(TARGET_PPC64)
> { "tb", 0, &monitor_get_tbl, },
>
^ permalink raw reply [flat|nested] 15+ messages in thread