From: Deepak Gupta <debug@rivosinc.com>
To: Mark Brown <broonie@kernel.org>
Cc: "Edgecombe, Rick P" <rick.p.edgecombe@intel.com>,
"torvalds@linux-foundation.org" <torvalds@linux-foundation.org>,
"Yu, Yu-cheng" <yu-cheng.yu@intel.com>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"peterz@infradead.org" <peterz@infradead.org>,
"pjw@kernel.org" <pjw@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"zong.li@sifive.com" <zong.li@sifive.com>
Subject: Re: [GIT PULL] RISC-V updates for v7.0
Date: Wed, 18 Feb 2026 17:28:26 -0800 [thread overview]
Message-ID: <aZZnOt_gbmNFks7Q@debug.ba.rivosinc.com> (raw)
In-Reply-To: <7db68a59-3259-40df-ae9a-09ebccec16df@sirena.org.uk>
On Thu, Feb 19, 2026 at 12:01:10AM +0000, Mark Brown wrote:
>On Wed, Feb 18, 2026 at 09:58:41PM +0000, Edgecombe, Rick P wrote:
>> On Wed, 2026-02-18 at 11:57 -0800, Deepak Gupta wrote:
>
>> > If we land arch-agnostic prctl for enabling branch tracking for userspace as
>> > part of risc-v patches, I am hoping we can leverage that for x86 "branch
>> > tracking enabling" as well. I don't know if "BTI" is enabled for userspace in
>> > the arm64 world but if it isn't then it can use the same prctl. This creates
>> > symmetry and convergence as well between major 3 arches for branch tracking
>> > support.
>
>BTI has been available to userspace for quite a while now.
Noted.
>
>> Arm already uses PROT_BTI to enable their landing pad like thing. It doesn't
>> need a prctl AFAIU. Peterz had been suggesting we do a similar PROT for x86 user
>> IBT. Although an additional prctl might still be required for x86. We'd have to
>> actually start taking the patches upstream to see.
>
>Yeah, for arm64 BTI the control is all per page rather than per thread
>or process. Unless I'm forgetting something there's just not a global
>control for this in the hardware, it's all keyed off the page tables.
Aah this makes sense. This is different from x86 and risc-v. Since BTI is on
per-code page basis, kernel enables if loader (interpreter for executable) and
then likely loader sets PROT_BTI for rest of the user space dependencies.
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WARNING: multiple messages have this Message-ID (diff)
From: Deepak Gupta <debug@rivosinc.com>
To: Mark Brown <broonie@kernel.org>
Cc: "Edgecombe, Rick P" <rick.p.edgecombe@intel.com>,
"torvalds@linux-foundation.org" <torvalds@linux-foundation.org>,
"Yu, Yu-cheng" <yu-cheng.yu@intel.com>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"peterz@infradead.org" <peterz@infradead.org>,
"pjw@kernel.org" <pjw@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"zong.li@sifive.com" <zong.li@sifive.com>
Subject: Re: [GIT PULL] RISC-V updates for v7.0
Date: Wed, 18 Feb 2026 17:28:26 -0800 [thread overview]
Message-ID: <aZZnOt_gbmNFks7Q@debug.ba.rivosinc.com> (raw)
In-Reply-To: <7db68a59-3259-40df-ae9a-09ebccec16df@sirena.org.uk>
On Thu, Feb 19, 2026 at 12:01:10AM +0000, Mark Brown wrote:
>On Wed, Feb 18, 2026 at 09:58:41PM +0000, Edgecombe, Rick P wrote:
>> On Wed, 2026-02-18 at 11:57 -0800, Deepak Gupta wrote:
>
>> > If we land arch-agnostic prctl for enabling branch tracking for userspace as
>> > part of risc-v patches, I am hoping we can leverage that for x86 "branch
>> > tracking enabling" as well. I don't know if "BTI" is enabled for userspace in
>> > the arm64 world but if it isn't then it can use the same prctl. This creates
>> > symmetry and convergence as well between major 3 arches for branch tracking
>> > support.
>
>BTI has been available to userspace for quite a while now.
Noted.
>
>> Arm already uses PROT_BTI to enable their landing pad like thing. It doesn't
>> need a prctl AFAIU. Peterz had been suggesting we do a similar PROT for x86 user
>> IBT. Although an additional prctl might still be required for x86. We'd have to
>> actually start taking the patches upstream to see.
>
>Yeah, for arm64 BTI the control is all per page rather than per thread
>or process. Unless I'm forgetting something there's just not a global
>control for this in the hardware, it's all keyed off the page tables.
Aah this makes sense. This is different from x86 and risc-v. Since BTI is on
per-code page basis, kernel enables if loader (interpreter for executable) and
then likely loader sets PROT_BTI for rest of the user space dependencies.
next prev parent reply other threads:[~2026-02-19 1:28 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-12 23:39 [GIT PULL] RISC-V updates for v7.0 Paul Walmsley
2026-02-12 23:39 ` Paul Walmsley
2026-02-13 3:35 ` Linus Torvalds
2026-02-13 3:35 ` Linus Torvalds
2026-02-14 0:23 ` Paul Walmsley
2026-02-14 0:23 ` Paul Walmsley
2026-02-14 4:14 ` Linus Torvalds
2026-02-14 4:14 ` Linus Torvalds
2026-02-16 21:54 ` Linus Walleij
2026-02-16 21:54 ` Linus Walleij
2026-02-16 14:20 ` Mark Brown
2026-02-16 14:20 ` Mark Brown
2026-02-16 21:55 ` Linus Torvalds
2026-02-16 21:55 ` Linus Torvalds
2026-02-18 19:57 ` Deepak Gupta
2026-02-18 19:57 ` Deepak Gupta
2026-02-18 21:58 ` Edgecombe, Rick P
2026-02-18 21:58 ` Edgecombe, Rick P
2026-02-19 0:01 ` Mark Brown
2026-02-19 0:01 ` Mark Brown
2026-02-19 1:28 ` Deepak Gupta [this message]
2026-02-19 1:28 ` Deepak Gupta
2026-02-19 1:57 ` Deepak Gupta
2026-02-19 1:57 ` Deepak Gupta
2026-02-19 17:40 ` Edgecombe, Rick P
2026-02-19 17:40 ` Edgecombe, Rick P
2026-02-26 13:23 ` Peter Zijlstra
2026-02-26 13:23 ` Peter Zijlstra
2026-02-26 21:04 ` Deepak Gupta
2026-02-26 21:04 ` Deepak Gupta
2026-02-13 3:37 ` pr-tracker-bot
2026-02-13 3:37 ` pr-tracker-bot
2026-02-20 4:11 ` patchwork-bot+linux-riscv
2026-02-20 4:11 ` patchwork-bot+linux-riscv
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