From: Drew Fustini <fustini@kernel.org>
To: Radim Krcmar <rkrcmar@qti.qualcomm.com>
Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Alistair Francis" <Alistair.Francis@wdc.com>,
"Weiwei Li" <liwei1518@gmail.com>,
"dbarboza@ventanamicro.com" <dbarboza@ventanamicro.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Nicolas Pitre" <npitre@baylibre.com>,
"Kornel Dulęba" <mindal@semihalf.com>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Atish Patra" <atish.patra@linux.dev>,
"Vasudevan Srinivasan" <vasu@rivosinc.com>,
"rkrcmar@ventanamicro.com" <rkrcmar@ventanamicro.com>,
"yunhui cui" <cuiyunhui@bytedance.com>,
"Chen Pei" <cp0613@linux.alibaba.com>,
"guo.wenjia23@zte.com.cn" <guo.wenjia23@zte.com.cn>,
"liu.qingtao2@zte.com.cn" <liu.qingtao2@zte.com.cn>,
"qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org"
<qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org>
Subject: Re: [PATCH v5 2/6] hw/riscv: define capabilities of CBQRI controllers
Date: Sun, 8 Mar 2026 09:30:25 -0700 [thread overview]
Message-ID: <aa2kIVk1B2Fm28Xs@x1> (raw)
In-Reply-To: <DGSI3PC0N9OO.NV1W4DTKW4C2@qti.qualcomm.com>
On Mon, Mar 02, 2026 at 06:17:14PM +0000, Radim Krcmar wrote:
> 2026-02-01T15:58:08-08:00, Drew Fustini <fustini@kernel.org>:
> > From: Nicolas Pitre <npitre@baylibre.com>
> >
> > Define structs to represent the hardware capabilities of capacity and
> > bandwidth controllers according to the RISC-V Capacity and Bandwidth QoS
> > Register Interface (CBQRI).
> >
> > Link: https://github.com/riscv-non-isa/riscv-cbqri/releases/tag/v1.0
> > Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
> > Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> > Signed-off-by: Drew Fustini <fustini@kernel.org>
> > ---
> > diff --git a/include/hw/riscv/cbqri.h b/include/hw/riscv/cbqri.h
> >[...]
> > +#define RISCV_CBQRI_VERSION_MAJOR 0
> > +#define RISCV_CBQRI_VERSION_MINOR 1
>
> I the series actually implements 1.0, instead of 0.1.
Thanks, I'll fix that.
next prev parent reply other threads:[~2026-03-08 16:31 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-01 23:58 [PATCH v5 0/6] riscv: implement Ssqosid extension and CBQRI controllers Drew Fustini
2026-02-01 23:58 ` [PATCH v5 1/6] riscv: implement Ssqosid extension and srmcfg CSR Drew Fustini
2026-03-02 18:14 ` Radim Krcmar
2026-02-01 23:58 ` [PATCH v5 2/6] hw/riscv: define capabilities of CBQRI controllers Drew Fustini
2026-03-02 18:17 ` Radim Krcmar
2026-03-08 16:30 ` Drew Fustini [this message]
2026-02-01 23:58 ` [PATCH v5 3/6] hw/riscv: implement CBQRI capacity controller Drew Fustini
2026-03-02 18:44 ` Radim Krcmar
2026-03-08 16:35 ` Drew Fustini
2026-02-01 23:58 ` [PATCH v5 4/6] hw/riscv: implement CBQRI bandwidth controller Drew Fustini
2026-03-02 18:55 ` Radim Krcmar
2026-03-08 16:38 ` Drew Fustini
2026-02-01 23:58 ` [PATCH v5 5/6] hw/riscv: add CBQRI to Kconfig and build if enabled Drew Fustini
2026-02-01 23:58 ` [PATCH v5 6/6] hw/riscv: add CBQRI controllers to virt machine Drew Fustini
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