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From: Stefan Agner <stefan@agner.ch>
To: Alexander Stein <alexander.stein@systec-electronic.com>
Cc: Meng Yi <meng.yi@nxp.com>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Mark Brown <broonie@kernel.org>,
	airlied@redhat.com
Subject: Re: fsl-dcu not works on latest "drm-next"
Date: Thu, 26 May 2016 22:54:16 -0700	[thread overview]
Message-ID: <aaf25d8db1aca03ba251bfd02ca85502@agner.ch> (raw)
In-Reply-To: <2397536.bIp6BuhYPD@ws-stein>

On 2016-05-26 02:11, Alexander Stein wrote:
> On Thursday 26 May 2016 08:23:42, Meng Yi wrote:
>> Hi Mark,
>>
>> > You've not specifically described the problem here - what are the
>> > endiannesses of both the CPU and the device you're talking to?  What
>> > specifically is the endianess problem you are seeing, what are you seeing
>> > and what do you expect to see?
>>
>> The CPU is little endian and the device DCU is big endian, specified
>> big-endian in DTS,
>>
>> And here is my DTS and regmap_config,
>>
>> Specified "big-endian" in DTS,
>>
>>         dcu: dcu@2ce0000 {
>>             compatible = "fsl,ls1021a-dcu";
>>             reg = <0x0 0x2ce0000 0x0 0x10000>;
>>             interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
>>             clocks = <&platform_clk 0>;
>>             clock-names = "dcu";
>>             big-endian;
>>             status = "disabled";
>>         };
>>
>> I can't tell the difference of "reg_format_endian" and " val_format_endian
>> ", so I had tried four conditions. And all failed.
>>
>> static const struct regmap_config fsl_dcu_regmap_config = {
>>     .reg_bits = 32,
>>     .reg_stride = 4,
>>     .val_bits = 32,
>>     .cache_type = REGCACHE_RBTREE,
> 
> This needs to be a flat cache. See
> https://lists.freedesktop.org/archives/dri-devel/2016-January/099121.html
> or https://lkml.org/lkml/2016/3/24/281
> max_register also needs an appropriate value.

FWIW, the latest patch which addresses this issue is Patch 5/6 of this
patchset:
https://lkml.org/lkml/2016/4/19/617

Unfortunately, that patchset missed the 4.7 merge window. I still miss
an Ack for the first patch of this patchset. But should go into the next
release...

--
Stefan
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: Stefan Agner <stefan@agner.ch>
To: Alexander Stein <alexander.stein@systec-electronic.com>
Cc: linux-kernel@vger.kernel.org, Meng Yi <meng.yi@nxp.com>,
	Mark Brown <broonie@kernel.org>,
	dri-devel@lists.freedesktop.org, David Airlie <airlied@linux.ie>,
	airlied@redhat.com
Subject: Re: fsl-dcu not works on latest "drm-next"
Date: Thu, 26 May 2016 22:54:16 -0700	[thread overview]
Message-ID: <aaf25d8db1aca03ba251bfd02ca85502@agner.ch> (raw)
In-Reply-To: <2397536.bIp6BuhYPD@ws-stein>

On 2016-05-26 02:11, Alexander Stein wrote:
> On Thursday 26 May 2016 08:23:42, Meng Yi wrote:
>> Hi Mark,
>>
>> > You've not specifically described the problem here - what are the
>> > endiannesses of both the CPU and the device you're talking to?  What
>> > specifically is the endianess problem you are seeing, what are you seeing
>> > and what do you expect to see?
>>
>> The CPU is little endian and the device DCU is big endian, specified
>> big-endian in DTS,
>>
>> And here is my DTS and regmap_config,
>>
>> Specified "big-endian" in DTS,
>>
>>         dcu: dcu@2ce0000 {
>>             compatible = "fsl,ls1021a-dcu";
>>             reg = <0x0 0x2ce0000 0x0 0x10000>;
>>             interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
>>             clocks = <&platform_clk 0>;
>>             clock-names = "dcu";
>>             big-endian;
>>             status = "disabled";
>>         };
>>
>> I can't tell the difference of "reg_format_endian" and " val_format_endian
>> ", so I had tried four conditions. And all failed.
>>
>> static const struct regmap_config fsl_dcu_regmap_config = {
>>     .reg_bits = 32,
>>     .reg_stride = 4,
>>     .val_bits = 32,
>>     .cache_type = REGCACHE_RBTREE,
> 
> This needs to be a flat cache. See
> https://lists.freedesktop.org/archives/dri-devel/2016-January/099121.html
> or https://lkml.org/lkml/2016/3/24/281
> max_register also needs an appropriate value.

FWIW, the latest patch which addresses this issue is Patch 5/6 of this
patchset:
https://lkml.org/lkml/2016/4/19/617

Unfortunately, that patchset missed the 4.7 merge window. I still miss
an Ack for the first patch of this patchset. But should go into the next
release...

--
Stefan

  reply	other threads:[~2016-05-27  5:58 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-03  9:26 fsl-dcu not works on latest "drm-next" Meng Yi
2016-05-03 16:08 ` Stefan Agner
2016-05-04  3:40   ` Meng Yi
2016-05-25  2:14 ` Meng Yi
2016-05-25  6:20   ` Stefan Agner
2016-05-25  6:20     ` Stefan Agner
2016-05-25  8:32     ` Alexander Stein
2016-05-25  8:58       ` Meng Yi
2016-05-25  9:57         ` Alexander Stein
2016-05-25 10:25           ` Meng Yi
2016-05-25 12:16             ` Alexander Stein
2016-05-26  8:18               ` Meng Yi
2016-05-26  9:11                 ` Alexander Stein
2016-05-26  9:11                   ` Alexander Stein
2016-05-25  9:18   ` Mark Brown
2016-05-25  9:18     ` Mark Brown
2016-05-25  9:59     ` Meng Yi
2016-05-25 10:41       ` Mark Brown
2016-05-25 10:41         ` Mark Brown
2016-05-26  8:23         ` Meng Yi
2016-05-26  9:11           ` Alexander Stein
2016-05-27  5:54             ` Stefan Agner [this message]
2016-05-27  5:54               ` Stefan Agner
2016-05-27 12:20               ` Mark Brown
2016-05-27 12:20                 ` Mark Brown
2016-05-27 17:36                 ` Stefan Agner
2016-05-27 17:36                   ` Stefan Agner
2016-05-27 19:50                   ` Mark Brown
2016-06-03 22:52             ` Stefan Agner
2016-06-03 22:52               ` Stefan Agner
2016-06-07  2:16               ` Meng Yi
2016-06-07  2:46                 ` Stefan Agner
2016-06-07  2:46                   ` Stefan Agner
2016-06-07  3:47               ` Meng Yi

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