From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: wangjia@ultrarisc.com
Cc: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Paul Walmsley" <pjw@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
"Zhang Xincheng" <zhangxincheng@ultrarisc.com>
Subject: Re: [PATCH v2 2/2] riscv: ultrarisc: 8250_dw: support DP1000 uart
Date: Mon, 16 Mar 2026 13:35:40 +0200 [thread overview]
Message-ID: <abfrDBeJrValJR9a@ashevche-desk.local> (raw)
In-Reply-To: <20260316-ultrarisc-serial-v2-2-6ab3e7fa891c@ultrarisc.com>
On Mon, Mar 16, 2026 at 02:33:23PM +0800, Jia Wang via B4 Relay wrote:
> The UART of DP1000 does not support automatic detection of
> buffer size. skip_autocfg needs to be set to true
Missed period at the end.
...
> +#define DW_UART_QUIRK_FIXED_TYPE BIT(6)
Seems unrequired.
But to make sure, can you elaborate what's going on here?
What is the reads from UCV and CPR registers?
--
With Best Regards,
Andy Shevchenko
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: wangjia@ultrarisc.com
Cc: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Paul Walmsley" <pjw@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
"Zhang Xincheng" <zhangxincheng@ultrarisc.com>
Subject: Re: [PATCH v2 2/2] riscv: ultrarisc: 8250_dw: support DP1000 uart
Date: Mon, 16 Mar 2026 13:35:40 +0200 [thread overview]
Message-ID: <abfrDBeJrValJR9a@ashevche-desk.local> (raw)
In-Reply-To: <20260316-ultrarisc-serial-v2-2-6ab3e7fa891c@ultrarisc.com>
On Mon, Mar 16, 2026 at 02:33:23PM +0800, Jia Wang via B4 Relay wrote:
> The UART of DP1000 does not support automatic detection of
> buffer size. skip_autocfg needs to be set to true
Missed period at the end.
...
> +#define DW_UART_QUIRK_FIXED_TYPE BIT(6)
Seems unrequired.
But to make sure, can you elaborate what's going on here?
What is the reads from UCV and CPR registers?
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2026-03-16 11:36 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-16 6:33 [PATCH v2 0/2] serial: 8250_dw: Add support for UltraRISC DP1000 uart Jia Wang
2026-03-16 6:33 ` Jia Wang via B4 Relay
2026-03-16 6:33 ` Jia Wang via B4 Relay
2026-03-16 6:33 ` [PATCH v2 1/2] dt-bindings: serial: update bindings of ultrarisc dp1000 uart Jia Wang
2026-03-16 6:33 ` Jia Wang via B4 Relay
2026-03-16 6:33 ` Jia Wang via B4 Relay
2026-03-16 8:11 ` Krzysztof Kozlowski
2026-03-16 8:11 ` Krzysztof Kozlowski
2026-03-17 1:29 ` Jia Wang
2026-03-16 8:12 ` Krzysztof Kozlowski
2026-03-16 8:12 ` Krzysztof Kozlowski
2026-03-16 6:33 ` [PATCH v2 2/2] riscv: ultrarisc: 8250_dw: support DP1000 uart Jia Wang
2026-03-16 6:33 ` Jia Wang via B4 Relay
2026-03-16 6:33 ` Jia Wang via B4 Relay
2026-03-16 11:35 ` Andy Shevchenko [this message]
2026-03-16 11:35 ` Andy Shevchenko
2026-04-17 7:32 ` Jia Wang
2026-04-17 7:32 ` Jia Wang
2026-04-17 7:46 ` Andy Shevchenko
2026-04-17 7:46 ` Andy Shevchenko
2026-04-20 5:27 ` Jia Wang
2026-04-20 5:27 ` Jia Wang
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