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From: Yao Zi <me@ziyao.cc>
To: wangjia@ultrarisc.com, "Paul Walmsley" <pjw@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Xincheng Zhang" <zhangxincheng@ultrarisc.com>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 3/4] dt-bindings: PCI: Add UltraRISC DP1000 PCIe controller
Date: Tue, 17 Mar 2026 04:56:07 +0000	[thread overview]
Message-ID: <abje5wWCljOBhgHU@pie> (raw)
In-Reply-To: <20260316-ultrarisc-pcie-v1-3-ef2946ede698@ultrarisc.com>

On Mon, Mar 16, 2026 at 03:06:59PM +0800, Jia Wang via B4 Relay wrote:
> From: Jia Wang <wangjia@ultrarisc.com>
> 
> Add UltraRISC DP1000 SoC PCIe controller devicetree bindings.
> 
> Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
> ---
>  .../bindings/pci/ultrarisc,dp1000-pcie.yaml        | 108 +++++++++++++++++++++
>  1 file changed, 108 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml b/Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml
> new file mode 100644
> index 000000000000..b50ff98dd878
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml
> @@ -0,0 +1,108 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/ultrarisc,dp1000-pcie.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: UltraRISC DP1000 PCIe Host Controller
> +
> +description: |
> +  UltraRISC DP1000 SoC PCIe host controller is based on the DesignWare PCIe IP.

If so, you should probably refer snps,dw-pcie.yaml to avoid
some duplication.

Regards,
Yao Zi

WARNING: multiple messages have this Message-ID (diff)
From: Yao Zi <me@ziyao.cc>
To: wangjia@ultrarisc.com, "Paul Walmsley" <pjw@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Xincheng Zhang" <zhangxincheng@ultrarisc.com>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 3/4] dt-bindings: PCI: Add UltraRISC DP1000 PCIe controller
Date: Tue, 17 Mar 2026 04:56:07 +0000	[thread overview]
Message-ID: <abje5wWCljOBhgHU@pie> (raw)
In-Reply-To: <20260316-ultrarisc-pcie-v1-3-ef2946ede698@ultrarisc.com>

On Mon, Mar 16, 2026 at 03:06:59PM +0800, Jia Wang via B4 Relay wrote:
> From: Jia Wang <wangjia@ultrarisc.com>
> 
> Add UltraRISC DP1000 SoC PCIe controller devicetree bindings.
> 
> Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
> ---
>  .../bindings/pci/ultrarisc,dp1000-pcie.yaml        | 108 +++++++++++++++++++++
>  1 file changed, 108 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml b/Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml
> new file mode 100644
> index 000000000000..b50ff98dd878
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml
> @@ -0,0 +1,108 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/ultrarisc,dp1000-pcie.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: UltraRISC DP1000 PCIe Host Controller
> +
> +description: |
> +  UltraRISC DP1000 SoC PCIe host controller is based on the DesignWare PCIe IP.

If so, you should probably refer snps,dw-pcie.yaml to avoid
some duplication.

Regards,
Yao Zi

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  parent reply	other threads:[~2026-03-17  4:56 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-16  7:06 [PATCH 0/4] riscv: Add PCIe support for UltraRISC DP1000 SoC Jia Wang
2026-03-16  7:06 ` Jia Wang via B4 Relay
2026-03-16  7:06 ` Jia Wang via B4 Relay
2026-03-16  7:06 ` [PATCH 1/4] riscv: add UltraRISC SoC family Kconfig support Jia Wang
2026-03-16  7:06   ` Jia Wang via B4 Relay
2026-03-16  7:06   ` Jia Wang via B4 Relay
2026-03-16 14:39   ` Conor Dooley
2026-03-16 14:39     ` Conor Dooley
2026-03-17  6:46     ` Jia Wang
2026-03-17  6:46       ` Jia Wang
2026-03-17 13:02       ` Conor Dooley
2026-03-17 13:02         ` Conor Dooley
2026-03-19  9:28         ` Jia Wang
2026-03-19  9:28           ` Jia Wang
2026-03-16  7:06 ` [PATCH 2/4] MAINTAINERS: Add entry for the UltraRISC DP1000 PCIe controller driver and its DT binding Jia Wang
2026-03-16  7:06   ` Jia Wang via B4 Relay
2026-03-16  7:06   ` Jia Wang via B4 Relay
2026-03-16  7:06 ` [PATCH 3/4] dt-bindings: PCI: Add UltraRISC DP1000 PCIe controller Jia Wang
2026-03-16  7:06   ` Jia Wang via B4 Relay
2026-03-16  7:06   ` Jia Wang via B4 Relay
2026-03-16  8:21   ` Rob Herring (Arm)
2026-03-16  8:21     ` Rob Herring (Arm)
2026-03-19 10:09     ` Jia Wang
2026-03-19 10:09       ` Jia Wang
2026-03-16 10:05   ` Krzysztof Kozlowski
2026-03-16 10:05     ` Krzysztof Kozlowski
2026-03-20  6:15     ` Jia Wang
2026-03-20  6:15       ` Jia Wang
2026-03-17  4:56   ` Yao Zi [this message]
2026-03-17  4:56     ` Yao Zi
2026-03-20  6:18     ` Jia Wang
2026-03-20  6:18       ` Jia Wang
2026-03-16  7:07 ` [PATCH 4/4] PCI: dwc: Add UltraRISC DP1000 PCIe rc driver Jia Wang
2026-03-16  7:07   ` Jia Wang via B4 Relay
2026-03-16  7:07   ` Jia Wang via B4 Relay
2026-03-16 20:49   ` Bjorn Helgaas
2026-03-16 20:49     ` Bjorn Helgaas
2026-03-20  9:33     ` Jia Wang
2026-03-20  9:33       ` Jia Wang
2026-03-17  5:32   ` Yao Zi
2026-03-17  5:32     ` Yao Zi
2026-03-20  9:37     ` Jia Wang
2026-03-20  9:37       ` Jia Wang
  -- strict thread matches above, loose matches on Subject: below --
2026-03-16 13:08 [PATCH 3/4] dt-bindings: PCI: Add UltraRISC DP1000 PCIe controller kernel test robot

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