Re: [PATCH 04/19] drm/dp: Add DPCD for configuring AS SDP for PR + VRR

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Mon, Mar 30, 2026 at 09:36:41AM +0530, Ankit Nautiyal wrote:
> Add additional DPCDs required to be configured to support VRR with Panel
> Replay. These DPCDs are specifically required for configuring Adaptive Sync
> SDP and are introduced in DP v2.1.
> 
> v2:
>  - Correct the shift for the bits. (Ville)
>  - Add DP_PR_ prefix for the PR-related fields.
> v3:
>  - Use macro values in their shifted form to match the convention (Ville)
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  include/drm/display/drm_dp.h | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
> index 8d172863eba3..93a188113d36 100644
> --- a/include/drm/display/drm_dp.h
> +++ b/include/drm/display/drm_dp.h
> @@ -775,6 +775,11 @@
>  # define DP_PANEL_REPLAY_SU_Y_GRANULARITY_EXTENDED_VAL_SEL_MASK  (0xf << 3)
>  # define DP_PANEL_REPLAY_SU_REGION_SCANLINE_CAPTURE		 (1 << 7)
>  
> +#define PANEL_REPLAY_CONFIG3				0x11a /* DP 2.1 */

I would still define a DP_PR_AS_SDP_SETUP_TIME_MASK here, to
make it clear which bits are part of this.

With that
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> +# define DP_PR_AS_SDP_SETUP_TIME_T1			(0 << 6)
> +# define DP_PR_AS_SDP_SETUP_TIME_DYNAMIC		(1 << 6) /* DP 2.1 Table 2-227 */
> +# define DP_PR_AS_SDP_SETUP_TIME_T2			(2 << 6)
> +
>  #define DP_PAYLOAD_ALLOCATE_SET		    0x1c0
>  #define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1
>  #define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2
> -- 
> 2.45.2

-- 
Ville Syrjälä
Intel