From: Magnus Kulke <magnuskulke@linux.microsoft.com>
To: Mohamed Mediouni <mohamed@unpredictable.fr>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
qemu-devel@nongnu.org, Wei Liu <wei.liu@kernel.org>,
Wei Liu <liuwe@microsoft.com>,
Magnus Kulke <magnuskulke@microsoft.com>,
Zhao Liu <zhao1.liu@intel.com>
Subject: Re: [PATCH v4 8/9] target/i386/mshv: filter out CET bits in cpuid
Date: Wed, 15 Apr 2026 17:26:56 +0200 [thread overview]
Message-ID: <ad+uQBS8YMxU1e3G@example.com> (raw)
In-Reply-To: <CC49AF2B-9E21-47BF-BC92-531F77606D14@unpredictable.fr>
On Wed, Apr 15, 2026 at 04:30:10PM +0200, Mohamed Mediouni wrote:
> Is CPUID performance such a problem?
>
> What I have from WHPX on this - where for now CPUID vmexits are used
> instead of this fancy interface* - although that might change in the future:
>
> Those have been seen to vary dynamically for a vCPU:
>
> CPUID[1:EDX].APIC
> CPUID_7_0_EDX_CET_IBT
> CPUID_7_0_ECX_CET_SHSTK
> CPUID_7_0_ECX_OSPKE
> CPUID_EXT_OSXSAVE
> The whole 0xD leave
>
> I used the default result to override with the Hyper-V stock response for those bits,
> although masking as provided by the new interface would work too.
>
> * not using it yet because Windows 10 Hyper-V didn’t have it, and the perf impact for CPUIDs
> didn’t sound like an actual problem so trapped as much leaves as it could make sense
>
Hey Mohamed. yeah, it's arguable.
I would prefer not to introduce a VM exit. You are probably right that
it doesn't matter much, however I can imagine that there are workloads
that perform feature detection in a hot path (e.g. right before some
AVX computation) and trapping it to the vmm would impact perf for those.
But yeah, if it turns out that the static responses and the mask do not
work, we have to consider this.
best,
magnus
next prev parent reply other threads:[~2026-04-15 15:27 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-14 15:54 [PATCH v4 0/9] Support QEMU cpu models in MSHV accelerator Magnus Kulke
2026-04-14 15:54 ` [PATCH v4 1/9] accel/mshv: use mshv_create_partition_v2 payload Magnus Kulke
2026-04-14 15:54 ` [PATCH v4 2/9] target/i386/mshv: fix cpuid propagation bug Magnus Kulke
2026-04-14 15:54 ` [PATCH v4 3/9] target/i386/mshv: fix various cpuid traversal bugs Magnus Kulke
2026-04-14 15:54 ` [PATCH v4 4/9] target/i386/mshv: change cpuid mask to UINT32_MAX Magnus Kulke
2026-04-14 15:54 ` [PATCH v4 5/9] target/i386/mshv: set cpu model name on -cpu host Magnus Kulke
2026-04-14 15:54 ` [PATCH v4 6/9] target/i386: query mshv accel for supported cpuids Magnus Kulke
2026-04-14 15:54 ` [PATCH v4 7/9] target/i386/mshv: populate xsave area offsets Magnus Kulke
2026-04-14 15:54 ` [PATCH v4 8/9] target/i386/mshv: filter out CET bits in cpuid Magnus Kulke
2026-04-14 16:10 ` Paolo Bonzini
2026-04-15 14:18 ` Magnus Kulke
2026-04-15 14:30 ` Mohamed Mediouni
2026-04-15 15:26 ` Magnus Kulke [this message]
2026-04-14 15:54 ` [PATCH v4 9/9] accel/mshv: disable la57 (5lvl paging) Magnus Kulke
2026-04-14 20:56 ` Wei Liu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ad+uQBS8YMxU1e3G@example.com \
--to=magnuskulke@linux.microsoft.com \
--cc=liuwe@microsoft.com \
--cc=magnuskulke@microsoft.com \
--cc=mohamed@unpredictable.fr \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=wei.liu@kernel.org \
--cc=zhao1.liu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.