[1/5] powerpc: Reduce default cacheline size to 64 bytes

[1/5] powerpc: Reduce default cacheline size to 64 bytes

[Olof Johansson]

Reduce default cacheline size on 64-bit powerpc from 128 bytes to 64.
This is the architected minimum. In most cases we'll still end up using
cache line information from the device tree, but defaults are used during
early boot and doing a few dcbst/icbi's too many there won't do any harm.


Signed-off-by: Olof Johansson <olof@lixom.net>


Index: merge/arch/powerpc/kernel/setup_64.c
===================================================================
--- merge.orig/arch/powerpc/kernel/setup_64.c
+++ merge/arch/powerpc/kernel/setup_64.c
@@ -78,10 +78,10 @@ u64 ppc64_pft_size;
  * before we've read this from the device tree.
  */
 struct ppc64_caches ppc64_caches = {
-	.dline_size = 0x80,
-	.log_dline_size = 7,
-	.iline_size = 0x80,
-	.log_iline_size = 7
+	.dline_size = 0x40,
+	.log_dline_size = 6,
+	.iline_size = 0x40,
+	.log_iline_size = 6
 };
 EXPORT_SYMBOL_GPL(ppc64_caches);
 
Index: merge/arch/powerpc/kernel/head_64.S
===================================================================
--- merge.orig/arch/powerpc/kernel/head_64.S
+++ merge/arch/powerpc/kernel/head_64.S
@@ -1748,7 +1748,7 @@ _STATIC(__after_prom_start)
 _GLOBAL(copy_and_flush)
 	addi	r5,r5,-8
 	addi	r6,r6,-8
-4:	li	r0,16			/* Use the least common		*/
+4:	li	r0,8			/* Use the smallest common	*/
 					/* denominator cache line	*/
 					/* size.  This results in	*/
 					/* extra cache line flushes	*/

[2/5] powerpc: Divorce CPU_FTR_CTRL from CPU_FTR_PPCAS_ARCH_V2_BASE

[Olof Johansson]

The performance monitor implementation (including CTRL register behaviour)
is just included in PPC v2 as an example, it's not truly part of the base.

It's actually a somewhat misleading feature, but I'll leave that be for
now: The precense of the register is not what the feature bit is used
for, but instead it's used to determine if it contains the runlatch
bit for idle reporting of the performance monitor. For alternative
implementations, the register might still exist but the bit might have
different meaning (or no meaning at all).

For now, split it off and don't include it in CPU_FTR_PPCAS_ARCH_V2_BASE.


Signed-off-by: Olof Johansson <olof@lixom.net>

Index: merge/include/asm-powerpc/cputable.h
===================================================================
--- merge.orig/include/asm-powerpc/cputable.h
+++ merge/include/asm-powerpc/cputable.h
@@ -148,7 +148,7 @@ extern void do_cpu_ftr_fixups(unsigned l
 
 #define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \
 					CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \
-					CPU_FTR_NODSISRALIGN | CPU_FTR_CTRL)
+					CPU_FTR_NODSISRALIGN)
 
 /* iSeries doesn't support large pages */
 #ifdef CONFIG_PPC_ISERIES
@@ -313,24 +313,25 @@ extern void do_cpu_ftr_fixups(unsigned l
 	    CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | \
 	    CPU_FTR_MMCRA | CPU_FTR_CTRL)
 #define CPU_FTRS_POWER4	(CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
-	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA)
+	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
+	    CPU_FTR_MMCRA)
 #define CPU_FTRS_PPC970	(CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
-	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
+	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
 	    CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA)
 #define CPU_FTRS_POWER5	(CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
-	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
+	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
 	    CPU_FTR_MMCRA | CPU_FTR_SMT | \
 	    CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
 	    CPU_FTR_PURR)
 #define CPU_FTRS_POWER6 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
-	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
+	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
 	    CPU_FTR_MMCRA | CPU_FTR_SMT | \
 	    CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
 	    CPU_FTR_PURR | CPU_FTR_CI_LARGE_PAGE | CPU_FTR_REAL_LE)
 #define CPU_FTRS_CELL	(CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
-	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
+	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
 	    CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
-	    CPU_FTR_CTRL | CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE)
+	    CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE)
 #define CPU_FTRS_COMPATIBLE	(CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
 	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2)
 #endif

[3/5] powerpc: PA6T cputable entry, PVR value

[Olof Johansson]

Introduce PWRficient PA6T cputable entry and feature bits.


Signed-off-by: Olof Johansson <olof@lixom.net>

Index: merge/arch/powerpc/kernel/cputable.c
===================================================================
--- merge.orig/arch/powerpc/kernel/cputable.c
+++ merge/arch/powerpc/kernel/cputable.c
@@ -58,6 +58,9 @@ extern void __restore_cpu_ppc970(void);
 #define COMMON_USER_POWER6	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
 				 PPC_FEATURE_TRUE_LE)
+#define COMMON_USER_PA6T	(COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
+				 PPC_FEATURE_TRUE_LE | \
+				 PPC_FEATURE_HAS_ALTIVEC_COMP)
 #define COMMON_USER_BOOKE	(PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
 				 PPC_FEATURE_BOOKE)
 
@@ -286,6 +289,17 @@ struct cpu_spec	cpu_specs[] = {
 		.dcache_bsize		= 128,
 		.platform		= "ppc-cell-be",
 	},
+	{	/* PA Semi PA6T */
+		.pvr_mask		= 0x7fff0000,
+		.pvr_value		= 0x00900000,
+		.cpu_name		= "PA6T",
+		.cpu_features		= CPU_FTRS_PA6T,
+		.cpu_user_features	= COMMON_USER_PA6T,
+		.icache_bsize		= 64,
+		.dcache_bsize		= 64,
+		.num_pmcs		= 6,
+		.platform		= "pa6t",
+	},
 	{	/* default match */
 		.pvr_mask		= 0x00000000,
 		.pvr_value		= 0x00000000,
Index: merge/include/asm-powerpc/reg.h
===================================================================
--- merge.orig/include/asm-powerpc/reg.h
+++ merge/include/asm-powerpc/reg.h
@@ -592,6 +592,8 @@
 #define PV_630p	0x0041
 #define PV_970MP	0x0044
 #define PV_BE		0x0070
+#define	PV_PA6T		0x0090
+
 
 /*
  * Number of entries in the SLB. If this ever changes we should handle
Index: merge/include/asm-powerpc/cputable.h
===================================================================
--- merge.orig/include/asm-powerpc/cputable.h
+++ merge/include/asm-powerpc/cputable.h
@@ -23,6 +23,7 @@
 #define PPC_FEATURE_SMT			0x00004000
 #define PPC_FEATURE_ICACHE_SNOOP	0x00002000
 #define PPC_FEATURE_ARCH_2_05		0x00001000
+#define PPC_FEATURE_PA6T		0x00000800
 
 #define PPC_FEATURE_TRUE_LE		0x00000002
 #define PPC_FEATURE_PPC_LE		0x00000001
@@ -332,6 +333,10 @@ extern void do_cpu_ftr_fixups(unsigned l
 	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
 	    CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
 	    CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE)
+#define CPU_FTRS_PA6T (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
+	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
+	    CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \
+	    CPU_FTR_PURR | CPU_FTR_REAL_LE)
 #define CPU_FTRS_COMPATIBLE	(CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
 	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2)
 #endif
@@ -340,7 +345,7 @@ extern void do_cpu_ftr_fixups(unsigned l
 #define CPU_FTRS_POSSIBLE	\
 	    (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 |	\
 	    CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 |	\
-	    CPU_FTRS_CELL | CPU_FTR_CI_LARGE_PAGE)
+	    CPU_FTRS_CELL | CPU_FTRS_PA6T)
 #else
 enum {
 	CPU_FTRS_POSSIBLE =
@@ -379,7 +384,7 @@ enum {
 #define CPU_FTRS_ALWAYS		\
 	    (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 &	\
 	    CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 &	\
-	    CPU_FTRS_CELL & CPU_FTRS_POSSIBLE)
+	    CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE)
 #else
 enum {
 	CPU_FTRS_ALWAYS =

Re: [3/5] powerpc: PA6T cputable entry, PVR value

[Michael Neuling]

>  #define PV_630p	0x0041
>  #define PV_970MP	0x0044
>  #define PV_BE		0x0070
> +#define	PV_PA6T		0x0090
> +
>  
>  /*
>   * Number of entries in the SLB. If this ever changes we should handle

Should be a space not a tab after the #define.  Also extra new line is
not required.

Mikey "White space king" Neuling

[4/5] powerpc: PA Semi PWRficient platform support

[Olof Johansson]

Base patch for PA6T and PA6T-1682M. This introduces the
arch/powerpc/platform/pasemi directory, together with basic
implementations for various setup.

Much of this was based on other platform code, i.e. Maple, etc.

Signed-off-by: Olof Johansson <olof@lixom.net>


Index: merge/arch/powerpc/Kconfig
===================================================================
--- merge.orig/arch/powerpc/Kconfig
+++ merge/arch/powerpc/Kconfig
@@ -413,6 +409,17 @@ config PPC_MAPLE
           This option enables support for the Maple 970FX Evaluation Board.
 	  For more informations, refer to <http://www.970eval.com>
 
+config PPC_PASEMI
+	depends on PPC_MULTIPLATFORM && PPC64
+	bool "PA Semi SoC-based platforms"
+	default n
+	select MPIC
+	select PPC_UDBG_16550
+	select GENERIC_TBSYNC
+	help
+	  This option enables support for PA Semi's PWRficient line
+	  of SoC processors, including PA6T-1682M
+
 config PPC_CELL
 	bool
 	default n
Index: merge/arch/powerpc/platforms/Makefile
===================================================================
--- merge.orig/arch/powerpc/platforms/Makefile
+++ merge/arch/powerpc/platforms/Makefile
@@ -13,5 +13,6 @@ obj-$(CONFIG_PPC_86xx)		+= 86xx/
 obj-$(CONFIG_PPC_PSERIES)	+= pseries/
 obj-$(CONFIG_PPC_ISERIES)	+= iseries/
 obj-$(CONFIG_PPC_MAPLE)		+= maple/
+obj-$(CONFIG_PPC_PASEMI)		+= pasemi/
 obj-$(CONFIG_PPC_CELL)		+= cell/
 obj-$(CONFIG_EMBEDDED6xx)	+= embedded6xx/
Index: merge/arch/powerpc/platforms/pasemi/Makefile
===================================================================
--- /dev/null
+++ merge/arch/powerpc/platforms/pasemi/Makefile
@@ -0,0 +1 @@
+obj-y	+= setup.o pci.o time.o
Index: merge/arch/powerpc/platforms/pasemi/pci.c
===================================================================
--- /dev/null
+++ merge/arch/powerpc/platforms/pasemi/pci.c
@@ -0,0 +1,224 @@
+/*
+ * Copyright (C) 2006 PA Semi, Inc
+ *
+ * Authors: Kip Walker, PA Semi
+ *	    Olof Johansson, PA Semi
+ *
+ * Maintained by: Olof Johansson <olof@lixom.net>
+ *
+ * Based on arch/powerpc/platforms/maple/pci.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+
+
+#undef DEBUG
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/bootmem.h>
+
+#include <asm/sections.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/pci-bridge.h>
+#include <asm/machdep.h>
+#include <asm/iommu.h>
+
+#include <asm/ppc-pci.h>
+#include <asm/udbg.h>
+
+#define PA_PXP_CFA(bus, devfn, off) (((bus) << 20) | ((devfn) << 12) | (off))
+
+static unsigned long pa_pxp_cfg_addr(struct pci_controller* hose,
+				       u8 bus, u8 devfn, int offset)
+{
+	return ((unsigned long)hose->cfg_data) + PA_PXP_CFA(bus, devfn, offset);
+}
+
+static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
+			      int offset, int len, u32 *val)
+{
+	struct pci_controller *hose;
+	unsigned long addr;
+
+	hose = pci_bus_to_host(bus);
+	if (!hose)
+		return PCIBIOS_DEVICE_NOT_FOUND;
+
+	addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
+
+	/*
+	 * Note: the caller has already checked that offset is
+	 * suitably aligned and that len is 1, 2 or 4.
+	 */
+	switch (len) {
+	case 1:
+		*val = in_8((u8 *)addr);
+		break;
+	case 2:
+		*val = in_le16((u16 *)addr);
+		break;
+	default:
+		*val = in_le32((u32 *)addr);
+		break;
+	}
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn,
+			       int offset, int len, u32 val)
+{
+	struct pci_controller *hose;
+	unsigned long addr;
+
+	hose = pci_bus_to_host(bus);
+	if (!hose)
+		return PCIBIOS_DEVICE_NOT_FOUND;
+
+	addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
+
+	/*
+	 * Note: the caller has already checked that offset is
+	 * suitably aligned and that len is 1, 2 or 4.
+	 */
+	switch (len) {
+	case 1:
+		out_8((u8 *)addr, val);
+		(void) in_8((u8 *)addr);
+		break;
+	case 2:
+		out_le16((u16 *)addr, val);
+		(void) in_le16((u16 *)addr);
+		break;
+	default:
+		out_le32((u32 *)addr, val);
+		(void) in_le32((u32 *)addr);
+		break;
+	}
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static struct pci_ops pa_pxp_ops =
+{
+	pa_pxp_read_config,
+	pa_pxp_write_config
+};
+
+static void __init setup_pa_pxp(struct pci_controller* hose)
+{
+	hose->ops = &pa_pxp_ops;
+	hose->cfg_data = ioremap(0xe0000000, 0x1000000);
+}
+
+static int __init add_bridge(struct device_node *dev)
+{
+	int len;
+	struct pci_controller *hose;
+	int *bus_range;
+	struct property *of_prop;
+
+	pr_debug("Adding PCI host bridge %s\n", dev->full_name);
+
+	bus_range = (int *) get_property(dev, "bus-range", &len);
+	if (bus_range == NULL || len < 2 * sizeof(int)) {
+		printk(KERN_WARNING "Can't get bus-range for %s, assume bus 0\n",
+		dev->full_name);
+	}
+
+	hose = pcibios_alloc_controller(dev);
+	if (hose == NULL)
+		return -ENOMEM;
+
+	hose->first_busno = bus_range ? bus_range[0] : 0;
+	hose->last_busno = bus_range ? bus_range[1] : 0xff;
+
+	of_prop = alloc_bootmem(sizeof(struct property) +
+				sizeof(hose->global_number));
+	if (of_prop) {
+		memset(of_prop, 0, sizeof(struct property));
+		of_prop->name = "linux,pci-domain";
+		of_prop->length = sizeof(hose->global_number);
+		of_prop->value = (unsigned char *)&of_prop[1];
+		memcpy(of_prop->value, &hose->global_number, sizeof(hose->global_number));
+		prom_add_property(dev, of_prop);
+	}
+
+	if (device_is_compatible(dev, "pa-pxp"))
+		setup_pa_pxp(hose);
+
+	printk(KERN_INFO "Found PA-PXP PCI host bridge. Firmware bus number: %d->%d\n",
+		hose->first_busno, hose->last_busno);
+
+	/* Interpret the "ranges" property */
+	/* This also maps the I/O region and sets isa_io/mem_base */
+	pci_process_bridge_OF_ranges(hose, dev, 1);
+	pci_setup_phb_io(hose, 1);
+
+	return 0;
+}
+
+
+void __init pas_pcibios_fixup(void)
+{
+	struct pci_dev *dev = NULL;
+
+	for_each_pci_dev(dev)
+		pci_read_irq_line(dev);
+}
+
+static void __init pas_fixup_phb_resources(void)
+{
+	struct pci_controller *hose, *tmp;
+
+	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
+		unsigned long offset = (unsigned long)hose->io_base_virt - pci_io_base;
+		hose->io_resource.start += offset;
+		hose->io_resource.end += offset;
+		printk(KERN_INFO "PCI Host %d, io start: %lx; io end: %lx\n",
+		       hose->global_number,
+		       hose->io_resource.start, hose->io_resource.end);
+	}
+}
+
+
+void __init pas_pci_init(void)
+{
+	struct device_node *np, *root;
+
+	root = of_find_node_by_path("/");
+	if (root == NULL) {
+		printk(KERN_CRIT "pas_pci_init: can't find root "
+			"of device tree\n");
+		return;
+	}
+
+	for (np = NULL; (np = of_get_next_child(root, np)) != NULL;)
+		if (np->name && !strcmp(np->name, "pxp") && !add_bridge(np))
+			of_node_get(np);
+
+	of_node_put(root);
+
+	pas_fixup_phb_resources();
+
+	/* Setup the linkage between OF nodes and PHBs */
+	pci_devs_phb_init();
+
+	/* Use the common resource allocation mechanism */
+	pci_probe_only = 1;
+}
Index: merge/arch/powerpc/platforms/pasemi/setup.c
===================================================================
--- /dev/null
+++ merge/arch/powerpc/platforms/pasemi/setup.c
@@ -0,0 +1,222 @@
+/*
+ * Copyright (C) 2006 PA Semi, Inc
+ *
+ * Authors: Kip Walker, PA Semi
+ *	    Olof Johansson, PA Semi
+ *
+ * Maintained by: Olof Johansson <olof@lixom.net>
+ *
+ * Based on arch/powerpc/platforms/maple/setup.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+
+#undef DEBUG
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/stddef.h>
+#include <linux/unistd.h>
+#include <linux/ptrace.h>
+#include <linux/slab.h>
+#include <linux/user.h>
+#include <linux/a.out.h>
+#include <linux/tty.h>
+#include <linux/string.h>
+#include <linux/delay.h>
+#include <linux/ioport.h>
+#include <linux/major.h>
+#include <linux/initrd.h>
+#include <linux/vt_kern.h>
+#include <linux/console.h>
+#include <linux/ide.h>
+#include <linux/pci.h>
+#include <linux/adb.h>
+#include <linux/cuda.h>
+#include <linux/pmu.h>
+#include <linux/irq.h>
+#include <linux/seq_file.h>
+#include <linux/root_dev.h>
+#include <linux/serial.h>
+#include <linux/smp.h>
+
+#include <asm/processor.h>
+#include <asm/sections.h>
+#include <asm/prom.h>
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/bitops.h>
+#include <asm/io.h>
+#include <asm/pci-bridge.h>
+#include <asm/iommu.h>
+#include <asm/machdep.h>
+#include <asm/dma.h>
+#include <asm/cputable.h>
+#include <asm/time.h>
+#include <asm/of_device.h>
+#include <asm/lmb.h>
+#include <asm/mpic.h>
+#include <asm/smp.h>
+#include <asm/udbg.h>
+#include <asm/serial.h>
+
+extern int pas_set_rtc_time(struct rtc_time *tm);
+extern void pas_get_rtc_time(struct rtc_time *tm);
+extern unsigned long pas_get_boot_time(void);
+extern void pas_pci_init(void);
+extern void pas_pcibios_fixup(void);
+
+static void pas_restart(char *cmd)
+{
+	printk("restart unimplemented, looping...\n");
+	for (;;) ;
+}
+
+static void pas_power_off(void)
+{
+	printk("power off unimplemented, looping...\n");
+	for (;;) ;
+}
+
+static void pas_halt(void)
+{
+	pas_power_off();
+}
+
+#ifdef CONFIG_SMP
+struct smp_ops_t pas_smp_ops = {
+	.probe		= smp_mpic_probe,
+	.message_pass	= smp_mpic_message_pass,
+	.kick_cpu	= smp_generic_kick_cpu,
+	.setup_cpu	= smp_mpic_setup_cpu,
+	.give_timebase	= smp_generic_give_timebase,
+	.take_timebase	= smp_generic_take_timebase,
+};
+#endif /* CONFIG_SMP */
+
+void __init pas_setup_arch(void)
+{
+	/* init to some ~sane value until calibrate_delay() runs */
+	loops_per_jiffy = 50000000;
+
+	/* Setup SMP callback */
+#ifdef CONFIG_SMP
+	smp_ops = &pas_smp_ops;
+#endif
+	/* Lookup PCI hosts */
+	pas_pci_init();
+
+#ifdef CONFIG_DUMMY_CONSOLE
+	conswitchp = &dummy_con;
+#endif
+
+	printk(KERN_DEBUG "Using default idle loop\n");
+}
+
+static void iommu_dev_setup_null(struct pci_dev *dev) { }
+static void iommu_bus_setup_null(struct pci_bus *bus) { }
+
+static void __init pas_init_early(void)
+{
+	/* No iommu code yet */
+	ppc_md.iommu_dev_setup = iommu_dev_setup_null;
+	ppc_md.iommu_bus_setup = iommu_bus_setup_null;
+	pci_direct_iommu_init();
+}
+
+/* No legacy IO on our parts */
+static int pas_check_legacy_ioport(unsigned int baseport)
+{
+	return -ENODEV;
+}
+
+static __init void pas_init_IRQ(void)
+{
+	struct device_node *np = NULL;
+	struct device_node *root, *mpic_node  = NULL;
+	unsigned long openpic_addr = 0;
+	const unsigned int *opprop;
+	int naddr, opplen;
+	struct mpic *mpic;
+
+	np = of_find_node_by_type(np, "open-pic");
+	if (!np) {
+		printk(KERN_ERR "No interrupt controller in device tree.\n");
+		return;
+	}
+	mpic_node = of_node_get(np);
+
+	/* Find address list in /platform-open-pic */
+	root = of_find_node_by_path("/");
+	naddr = prom_n_addr_cells(root);
+	opprop = get_property(root, "platform-open-pic", &opplen);
+	if (opprop != 0) {
+		openpic_addr = of_read_number(opprop, naddr);
+		printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
+	}
+	of_node_put(root);
+
+	mpic = mpic_alloc(mpic_node, openpic_addr, MPIC_PRIMARY, 0, 0,
+			  " PAS-OPIC  ");
+	BUG_ON(mpic == NULL);
+
+	mpic_assign_isu(mpic, 0, openpic_addr + 0x10000);
+	mpic_init(mpic);
+	of_node_put(mpic_node);
+	of_node_put(root);
+}
+
+static void __init pas_progress(char *s, unsigned short hex)
+{
+	printk("[%04x] : %s\n", hex, s ? s : "");
+}
+
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init pas_probe(void)
+{
+	unsigned long root = of_get_flat_dt_root();
+
+	if (!of_flat_dt_is_compatible(root, "PA6T-1682M"))
+		return 0;
+
+	hpte_init_native();
+
+	return 1;
+}
+
+define_machine(pas) {
+	.name			= "PA Semi PA6T-1682M",
+	.probe			= pas_probe,
+	.setup_arch		= pas_setup_arch,
+	.init_early		= pas_init_early,
+	.init_IRQ		= pas_init_IRQ,
+	.get_irq		= mpic_get_irq,
+	.pcibios_fixup		= pas_pcibios_fixup,
+	.restart		= pas_restart,
+	.power_off		= pas_power_off,
+	.halt			= pas_halt,
+	.get_boot_time		= pas_get_boot_time,
+	.set_rtc_time		= pas_set_rtc_time,
+	.get_rtc_time		= pas_get_rtc_time,
+	.calibrate_decr		= generic_calibrate_decr,
+	.check_legacy_ioport    = pas_check_legacy_ioport,
+	.progress		= pas_progress,
+};
Index: merge/arch/powerpc/platforms/pasemi/time.c
===================================================================
--- /dev/null
+++ merge/arch/powerpc/platforms/pasemi/time.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2006 PA Semi, Inc
+ *
+ * Maintained by: Olof Johansson <olof@lixom.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+
+#undef DEBUG
+
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <linux/bcd.h>
+
+#include <asm/time.h>
+
+void pas_get_rtc_time(struct rtc_time *tm)
+{
+}
+
+int pas_set_rtc_time(struct rtc_time *tm)
+{
+	return -ENODEV;
+}
+
+unsigned long __init pas_get_boot_time(void)
+{
+#if 0
+	struct rtc_time tm;
+
+	pas_get_rtc_time(&tm);
+
+	return mktime(tm.tm_year+1900, tm.tm_mon+1, tm.tm_mday,
+		tm.tm_hour, tm.tm_min, tm.tm_sec);
+#else
+	/* Let's just return a fake date right now */
+	return mktime(2006, 1, 1, 12, 0, 0);
+#endif
+}

Re: [4/5] powerpc: PA Semi PWRficient platform support

[Benjamin Herrenschmidt]

Overall, looks good, some bits  tho:

> +static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
> +			      int offset, int len, u32 *val)
> +{
> +	struct pci_controller *hose;
> +	unsigned long addr;

 .../...

You don't seem to encode support for extended config space (offsets >
256). If it's PCIe, you should have it (flush the 4 top bits of the
offste in the 4 top bits of the cfg address in general). In any case,
you should check the passed-in offset and error out if it is above your
max offset (256 or 4096 depending if you implement extended config space
support) or the kernel might get confused.

> +	of_prop = alloc_bootmem(sizeof(struct property) +
> +				sizeof(hose->global_number));
> +	if (of_prop) {
> +		memset(of_prop, 0, sizeof(struct property));
> +		of_prop->name = "linux,pci-domain";
> +		of_prop->length = sizeof(hose->global_number);
> +		of_prop->value = (unsigned char *)&of_prop[1];
> +		memcpy(of_prop->value, &hose->global_number, sizeof(hose->global_number));
> +		prom_add_property(dev, of_prop);
> +	}

Just kill that... nobody cares about that property.

> +	if (device_is_compatible(dev, "pa-pxp"))
> +		setup_pa_pxp(hose);

And if not ? You have a non-initialized hose without config space access
methods ? Hrm... 

> +	printk(KERN_INFO "Found PA-PXP PCI host bridge. Firmware bus number: %d->%d\n",
> +		hose->first_busno, hose->last_busno);
> +
> +	/* Interpret the "ranges" property */
> +	/* This also maps the I/O region and sets isa_io/mem_base */
> +	pci_process_bridge_OF_ranges(hose, dev, 1);
> +	pci_setup_phb_io(hose, 1);
> +
> +	return 0;
> +}
> +
> +
> +void __init pas_pcibios_fixup(void)
> +{
> +	struct pci_dev *dev = NULL;
> +
> +	for_each_pci_dev(dev)
> +		pci_read_irq_line(dev);
> +}
> +
> +static void __init pas_fixup_phb_resources(void)
> +{
> +	struct pci_controller *hose, *tmp;
> +
> +	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
> +		unsigned long offset = (unsigned long)hose->io_base_virt - pci_io_base;
> +		hose->io_resource.start += offset;
> +		hose->io_resource.end += offset;
> +		printk(KERN_INFO "PCI Host %d, io start: %lx; io end: %lx\n",
> +		       hose->global_number,
> +		       hose->io_resource.start, hose->io_resource.end);
> +	}
> +}

There is no generic code for the above ? (I have to double check). If
not, we shall fix that ;)

.../...

> +#ifdef CONFIG_SMP
> +struct smp_ops_t pas_smp_ops = {
> +	.probe		= smp_mpic_probe,
> +	.message_pass	= smp_mpic_message_pass,
> +	.kick_cpu	= smp_generic_kick_cpu,
> +	.setup_cpu	= smp_mpic_setup_cpu,
> +	.give_timebase	= smp_generic_give_timebase,
> +	.take_timebase	= smp_generic_take_timebase,
> +};

You don't have a HW timebase sync facility ? Is this the board or the
processor doesn't have a pin to freeze the timebase ? Either way, that
is bad ! Time to use the cluebat !

> +#endif /* CONFIG_SMP */
> +
> +void __init pas_setup_arch(void)
> +{
> +	/* init to some ~sane value until calibrate_delay() runs */
> +	loops_per_jiffy = 50000000;

That value still makes any sense with the new tb based delays ? I know
we still have it here or there, I'm wondering tho...

Re: [4/5] powerpc: PA Semi PWRficient platform support

[Olof Johansson]

On Wed, 06 Sep 2006 07:31:49 +1000 Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:

> Overall, looks good, some bits  tho:

Thanks! See below.


> 
> > +static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
> > +			      int offset, int len, u32 *val)
> > +{
> > +	struct pci_controller *hose;
> > +	unsigned long addr;
> 
>  .../...
> 
> You don't seem to encode support for extended config space (offsets >
> 256). If it's PCIe, you should have it (flush the 4 top bits of the
> offste in the 4 top bits of the cfg address in general). In any case,
> you should check the passed-in offset and error out if it is above your
> max offset (256 or 4096 depending if you implement extended config space
> support) or the kernel might get confused.

I'll take a look at this, thanks for pointing it out.

> > +	of_prop = alloc_bootmem(sizeof(struct property) +
> > +				sizeof(hose->global_number));
> > +	if (of_prop) {
> > +		memset(of_prop, 0, sizeof(struct property));
> > +		of_prop->name = "linux,pci-domain";
> > +		of_prop->length = sizeof(hose->global_number);
> > +		of_prop->value = (unsigned char *)&of_prop[1];
> > +		memcpy(of_prop->value, &hose->global_number, sizeof(hose->global_number));
> > +		prom_add_property(dev, of_prop);
> > +	}
> 
> Just kill that... nobody cares about that property.

Done

> > +	if (device_is_compatible(dev, "pa-pxp"))
> > +		setup_pa_pxp(hose);
> 
> And if not ? You have a non-initialized hose without config space access
> methods ? Hrm... 

True. Just a leftover from forking off the maple setup code.

> > +	printk(KERN_INFO "Found PA-PXP PCI host bridge. Firmware bus number: %d->%d\n",
> > +		hose->first_busno, hose->last_busno);
> > +
> > +	/* Interpret the "ranges" property */
> > +	/* This also maps the I/O region and sets isa_io/mem_base */
> > +	pci_process_bridge_OF_ranges(hose, dev, 1);
> > +	pci_setup_phb_io(hose, 1);
> > +
> > +	return 0;
> > +}
> > +
> > +
> > +void __init pas_pcibios_fixup(void)
> > +{
> > +	struct pci_dev *dev = NULL;
> > +
> > +	for_each_pci_dev(dev)
> > +		pci_read_irq_line(dev);
> > +}
> > +
> > +static void __init pas_fixup_phb_resources(void)
> > +{
> > +	struct pci_controller *hose, *tmp;
> > +
> > +	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
> > +		unsigned long offset = (unsigned long)hose->io_base_virt - pci_io_base;
> > +		hose->io_resource.start += offset;
> > +		hose->io_resource.end += offset;
> > +		printk(KERN_INFO "PCI Host %d, io start: %lx; io end: %lx\n",
> > +		       hose->global_number,
> > +		       hose->io_resource.start, hose->io_resource.end);
> > +	}
> > +}
> 
> There is no generic code for the above ? (I have to double check). If
> not, we shall fix that ;)

Didn't see anything, but then I didn't look that long. I'll follow up with a 
separate patch if it doesn't exist, since other platforms can use it too.

>
> > +#ifdef CONFIG_SMP
> > +struct smp_ops_t pas_smp_ops = {
> > +	.probe		= smp_mpic_probe,
> > +	.message_pass	= smp_mpic_message_pass,
> > +	.kick_cpu	= smp_generic_kick_cpu,
> > +	.setup_cpu	= smp_mpic_setup_cpu,
> > +	.give_timebase	= smp_generic_give_timebase,
> > +	.take_timebase	= smp_generic_take_timebase,
> > +};
> 
> You don't have a HW timebase sync facility ? Is this the board or the
> processor doesn't have a pin to freeze the timebase ? Either way, that
> is bad ! Time to use the cluebat !

See comment to Arnd in another email: We have hardware support for it, just 
not including it at this time.

> 
> > +#endif /* CONFIG_SMP */
> > +
> > +void __init pas_setup_arch(void)
> > +{
> > +	/* init to some ~sane value until calibrate_delay() runs */
> > +	loops_per_jiffy = 50000000;
> 
> That value still makes any sense with the new tb based delays ? I know
> we still have it here or there, I'm wondering tho...

I haven't tried doing without it, I'll take a look.


-Olof

[4/5] powerpc: PA Semi PWRficient platform support

[Olof Johansson]

Base patch for PA6T and PA6T-1682M. This introduces the
arch/powerpc/platform/pasemi directory, together with basic
implementations for various setup.

Much of this was based on other platform code, i.e. Maple, etc.

Signed-off-by: Olof Johansson <olof@lixom.net>


Index: merge/arch/powerpc/Kconfig
===================================================================
--- merge.orig/arch/powerpc/Kconfig
+++ merge/arch/powerpc/Kconfig
@@ -413,6 +409,17 @@ config PPC_MAPLE
           This option enables support for the Maple 970FX Evaluation Board.
 	  For more informations, refer to <http://www.970eval.com>
 
+config PPC_PASEMI
+	depends on PPC_MULTIPLATFORM && PPC64
+	bool "PA Semi SoC-based platforms"
+	default n
+	select MPIC
+	select PPC_UDBG_16550
+	select GENERIC_TBSYNC
+	help
+	  This option enables support for PA Semi's PWRficient line
+	  of SoC processors, including PA6T-1682M
+
 config PPC_CELL
 	bool
 	default n
Index: merge/arch/powerpc/platforms/Makefile
===================================================================
--- merge.orig/arch/powerpc/platforms/Makefile
+++ merge/arch/powerpc/platforms/Makefile
@@ -13,5 +13,6 @@ obj-$(CONFIG_PPC_86xx)		+= 86xx/
 obj-$(CONFIG_PPC_PSERIES)	+= pseries/
 obj-$(CONFIG_PPC_ISERIES)	+= iseries/
 obj-$(CONFIG_PPC_MAPLE)		+= maple/
+obj-$(CONFIG_PPC_PASEMI)		+= pasemi/
 obj-$(CONFIG_PPC_CELL)		+= cell/
 obj-$(CONFIG_EMBEDDED6xx)	+= embedded6xx/
Index: merge/arch/powerpc/platforms/pasemi/Makefile
===================================================================
--- /dev/null
+++ merge/arch/powerpc/platforms/pasemi/Makefile
@@ -0,0 +1 @@
+obj-y	+= setup.o pci.o time.o
Index: merge/arch/powerpc/platforms/pasemi/pci.c
===================================================================
--- /dev/null
+++ merge/arch/powerpc/platforms/pasemi/pci.c
@@ -0,0 +1,224 @@
+/*
+ * Copyright (C) 2006 PA Semi, Inc
+ *
+ * Authors: Kip Walker, PA Semi
+ *	    Olof Johansson, PA Semi
+ *
+ * Maintained by: Olof Johansson <olof@lixom.net>
+ *
+ * Based on arch/powerpc/platforms/maple/pci.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+
+
+#undef DEBUG
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/bootmem.h>
+
+#include <asm/sections.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/pci-bridge.h>
+#include <asm/machdep.h>
+#include <asm/iommu.h>
+
+#include <asm/ppc-pci.h>
+#include <asm/udbg.h>
+
+#define PA_PXP_CFA(bus, devfn, off) (((bus) << 20) | ((devfn) << 12) | (off))
+
+static unsigned long pa_pxp_cfg_addr(struct pci_controller* hose,
+				       u8 bus, u8 devfn, int offset)
+{
+	return ((unsigned long)hose->cfg_data) + PA_PXP_CFA(bus, devfn, offset);
+}
+
+static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
+			      int offset, int len, u32 *val)
+{
+	struct pci_controller *hose;
+	unsigned long addr;
+
+	hose = pci_bus_to_host(bus);
+	if (!hose)
+		return PCIBIOS_DEVICE_NOT_FOUND;
+
+	addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
+
+	/*
+	 * Note: the caller has already checked that offset is
+	 * suitably aligned and that len is 1, 2 or 4.
+	 */
+	switch (len) {
+	case 1:
+		*val = in_8((u8 *)addr);
+		break;
+	case 2:
+		*val = in_le16((u16 *)addr);
+		break;
+	default:
+		*val = in_le32((u32 *)addr);
+		break;
+	}
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn,
+			       int offset, int len, u32 val)
+{
+	struct pci_controller *hose;
+	unsigned long addr;
+
+	hose = pci_bus_to_host(bus);
+	if (!hose)
+		return PCIBIOS_DEVICE_NOT_FOUND;
+
+	addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
+
+	/*
+	 * Note: the caller has already checked that offset is
+	 * suitably aligned and that len is 1, 2 or 4.
+	 */
+	switch (len) {
+	case 1:
+		out_8((u8 *)addr, val);
+		(void) in_8((u8 *)addr);
+		break;
+	case 2:
+		out_le16((u16 *)addr, val);
+		(void) in_le16((u16 *)addr);
+		break;
+	default:
+		out_le32((u32 *)addr, val);
+		(void) in_le32((u32 *)addr);
+		break;
+	}
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static struct pci_ops pa_pxp_ops =
+{
+	pa_pxp_read_config,
+	pa_pxp_write_config
+};
+
+static void __init setup_pa_pxp(struct pci_controller* hose)
+{
+	hose->ops = &pa_pxp_ops;
+	hose->cfg_data = ioremap(0xe0000000, 0x1000000);
+}
+
+static int __init add_bridge(struct device_node *dev)
+{
+	int len;
+	struct pci_controller *hose;
+	int *bus_range;
+	struct property *of_prop;
+
+	pr_debug("Adding PCI host bridge %s\n", dev->full_name);
+
+	bus_range = (int *) get_property(dev, "bus-range", &len);
+	if (bus_range == NULL || len < 2 * sizeof(int)) {
+		printk(KERN_WARNING "Can't get bus-range for %s, assume bus 0\n",
+		dev->full_name);
+	}
+
+	hose = pcibios_alloc_controller(dev);
+	if (hose == NULL)
+		return -ENOMEM;
+
+	hose->first_busno = bus_range ? bus_range[0] : 0;
+	hose->last_busno = bus_range ? bus_range[1] : 0xff;
+
+	of_prop = alloc_bootmem(sizeof(struct property) +
+				sizeof(hose->global_number));
+	if (of_prop) {
+		memset(of_prop, 0, sizeof(struct property));
+		of_prop->name = "linux,pci-domain";
+		of_prop->length = sizeof(hose->global_number);
+		of_prop->value = (unsigned char *)&of_prop[1];
+		memcpy(of_prop->value, &hose->global_number, sizeof(hose->global_number));
+		prom_add_property(dev, of_prop);
+	}
+
+	if (device_is_compatible(dev, "pa-pxp"))
+		setup_pa_pxp(hose);
+
+	printk(KERN_INFO "Found PA-PXP PCI host bridge. Firmware bus number: %d->%d\n",
+		hose->first_busno, hose->last_busno);
+
+	/* Interpret the "ranges" property */
+	/* This also maps the I/O region and sets isa_io/mem_base */
+	pci_process_bridge_OF_ranges(hose, dev, 1);
+	pci_setup_phb_io(hose, 1);
+
+	return 0;
+}
+
+
+void __init pas_pcibios_fixup(void)
+{
+	struct pci_dev *dev = NULL;
+
+	for_each_pci_dev(dev)
+		pci_read_irq_line(dev);
+}
+
+static void __init pas_fixup_phb_resources(void)
+{
+	struct pci_controller *hose, *tmp;
+
+	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
+		unsigned long offset = (unsigned long)hose->io_base_virt - pci_io_base;
+		hose->io_resource.start += offset;
+		hose->io_resource.end += offset;
+		printk(KERN_INFO "PCI Host %d, io start: %lx; io end: %lx\n",
+		       hose->global_number,
+		       hose->io_resource.start, hose->io_resource.end);
+	}
+}
+
+
+void __init pas_pci_init(void)
+{
+	struct device_node *np, *root;
+
+	root = of_find_node_by_path("/");
+	if (root == NULL) {
+		printk(KERN_CRIT "pas_pci_init: can't find root "
+			"of device tree\n");
+		return;
+	}
+
+	for (np = NULL; (np = of_get_next_child(root, np)) != NULL;)
+		if (np->name && !strcmp(np->name, "pxp") && !add_bridge(np))
+			of_node_get(np);
+
+	of_node_put(root);
+
+	pas_fixup_phb_resources();
+
+	/* Setup the linkage between OF nodes and PHBs */
+	pci_devs_phb_init();
+
+	/* Use the common resource allocation mechanism */
+	pci_probe_only = 1;
+}
Index: merge/arch/powerpc/platforms/pasemi/setup.c
===================================================================
--- /dev/null
+++ merge/arch/powerpc/platforms/pasemi/setup.c
@@ -0,0 +1,222 @@
+/*
+ * Copyright (C) 2006 PA Semi, Inc
+ *
+ * Authors: Kip Walker, PA Semi
+ *	    Olof Johansson, PA Semi
+ *
+ * Maintained by: Olof Johansson <olof@lixom.net>
+ *
+ * Based on arch/powerpc/platforms/maple/setup.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+
+#undef DEBUG
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/stddef.h>
+#include <linux/unistd.h>
+#include <linux/ptrace.h>
+#include <linux/slab.h>
+#include <linux/user.h>
+#include <linux/a.out.h>
+#include <linux/tty.h>
+#include <linux/string.h>
+#include <linux/delay.h>
+#include <linux/ioport.h>
+#include <linux/major.h>
+#include <linux/initrd.h>
+#include <linux/vt_kern.h>
+#include <linux/console.h>
+#include <linux/ide.h>
+#include <linux/pci.h>
+#include <linux/adb.h>
+#include <linux/cuda.h>
+#include <linux/pmu.h>
+#include <linux/irq.h>
+#include <linux/seq_file.h>
+#include <linux/root_dev.h>
+#include <linux/serial.h>
+#include <linux/smp.h>
+
+#include <asm/processor.h>
+#include <asm/sections.h>
+#include <asm/prom.h>
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/bitops.h>
+#include <asm/io.h>
+#include <asm/pci-bridge.h>
+#include <asm/iommu.h>
+#include <asm/machdep.h>
+#include <asm/dma.h>
+#include <asm/cputable.h>
+#include <asm/time.h>
+#include <asm/of_device.h>
+#include <asm/lmb.h>
+#include <asm/mpic.h>
+#include <asm/smp.h>
+#include <asm/udbg.h>
+#include <asm/serial.h>
+
+extern int pas_set_rtc_time(struct rtc_time *tm);
+extern void pas_get_rtc_time(struct rtc_time *tm);
+extern unsigned long pas_get_boot_time(void);
+extern void pas_pci_init(void);
+extern void pas_pcibios_fixup(void);
+
+static void pas_restart(char *cmd)
+{
+	printk("restart unimplemented, looping...\n");
+	for (;;) ;
+}
+
+static void pas_power_off(void)
+{
+	printk("power off unimplemented, looping...\n");
+	for (;;) ;
+}
+
+static void pas_halt(void)
+{
+	pas_power_off();
+}
+
+#ifdef CONFIG_SMP
+struct smp_ops_t pas_smp_ops = {
+	.probe		= smp_mpic_probe,
+	.message_pass	= smp_mpic_message_pass,
+	.kick_cpu	= smp_generic_kick_cpu,
+	.setup_cpu	= smp_mpic_setup_cpu,
+	.give_timebase	= smp_generic_give_timebase,
+	.take_timebase	= smp_generic_take_timebase,
+};
+#endif /* CONFIG_SMP */
+
+void __init pas_setup_arch(void)
+{
+	/* init to some ~sane value until calibrate_delay() runs */
+	loops_per_jiffy = 50000000;
+
+	/* Setup SMP callback */
+#ifdef CONFIG_SMP
+	smp_ops = &pas_smp_ops;
+#endif
+	/* Lookup PCI hosts */
+	pas_pci_init();
+
+#ifdef CONFIG_DUMMY_CONSOLE
+	conswitchp = &dummy_con;
+#endif
+
+	printk(KERN_DEBUG "Using default idle loop\n");
+}
+
+static void iommu_dev_setup_null(struct pci_dev *dev) { }
+static void iommu_bus_setup_null(struct pci_bus *bus) { }
+
+static void __init pas_init_early(void)
+{
+	/* No iommu code yet */
+	ppc_md.iommu_dev_setup = iommu_dev_setup_null;
+	ppc_md.iommu_bus_setup = iommu_bus_setup_null;
+	pci_direct_iommu_init();
+}
+
+/* No legacy IO on our parts */
+static int pas_check_legacy_ioport(unsigned int baseport)
+{
+	return -ENODEV;
+}
+
+static __init void pas_init_IRQ(void)
+{
+	struct device_node *np = NULL;
+	struct device_node *root, *mpic_node  = NULL;
+	unsigned long openpic_addr = 0;
+	const unsigned int *opprop;
+	int naddr, opplen;
+	struct mpic *mpic;
+
+	np = of_find_node_by_type(np, "open-pic");
+	if (!np) {
+		printk(KERN_ERR "No interrupt controller in device tree.\n");
+		return;
+	}
+	mpic_node = of_node_get(np);
+
+	/* Find address list in /platform-open-pic */
+	root = of_find_node_by_path("/");
+	naddr = prom_n_addr_cells(root);
+	opprop = get_property(root, "platform-open-pic", &opplen);
+	if (opprop != 0) {
+		openpic_addr = of_read_number(opprop, naddr);
+		printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
+	}
+	of_node_put(root);
+
+	mpic = mpic_alloc(mpic_node, openpic_addr, MPIC_PRIMARY, 0, 0,
+			  " PAS-OPIC  ");
+	BUG_ON(mpic == NULL);
+
+	mpic_assign_isu(mpic, 0, openpic_addr + 0x10000);
+	mpic_init(mpic);
+	of_node_put(mpic_node);
+	of_node_put(root);
+}
+
+static void __init pas_progress(char *s, unsigned short hex)
+{
+	printk("[%04x] : %s\n", hex, s ? s : "");
+}
+
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init pas_probe(void)
+{
+	unsigned long root = of_get_flat_dt_root();
+
+	if (!of_flat_dt_is_compatible(root, "PA6T-1682M"))
+		return 0;
+
+	hpte_init_native();
+
+	return 1;
+}
+
+define_machine(pas) {
+	.name			= "PA Semi PA6T-1682M",
+	.probe			= pas_probe,
+	.setup_arch		= pas_setup_arch,
+	.init_early		= pas_init_early,
+	.init_IRQ		= pas_init_IRQ,
+	.get_irq		= mpic_get_irq,
+	.pcibios_fixup		= pas_pcibios_fixup,
+	.restart		= pas_restart,
+	.power_off		= pas_power_off,
+	.halt			= pas_halt,
+	.get_boot_time		= pas_get_boot_time,
+	.set_rtc_time		= pas_set_rtc_time,
+	.get_rtc_time		= pas_get_rtc_time,
+	.calibrate_decr		= generic_calibrate_decr,
+	.check_legacy_ioport    = pas_check_legacy_ioport,
+	.progress		= pas_progress,
+};
Index: merge/arch/powerpc/platforms/pasemi/time.c
===================================================================
--- /dev/null
+++ merge/arch/powerpc/platforms/pasemi/time.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2006 PA Semi, Inc
+ *
+ * Maintained by: Olof Johansson <olof@lixom.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+
+#undef DEBUG
+
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <linux/bcd.h>
+
+#include <asm/time.h>
+
+void pas_get_rtc_time(struct rtc_time *tm)
+{
+}
+
+int pas_set_rtc_time(struct rtc_time *tm)
+{
+	return -ENODEV;
+}
+
+unsigned long __init pas_get_boot_time(void)
+{
+#if 0
+	struct rtc_time tm;
+
+	pas_get_rtc_time(&tm);
+
+	return mktime(tm.tm_year+1900, tm.tm_mon+1, tm.tm_mday,
+		tm.tm_hour, tm.tm_min, tm.tm_sec);
+#else
+	/* Let's just return a fake date right now */
+	return mktime(2006, 1, 1, 12, 0, 0);
+#endif
+}

Re: [4/5] powerpc: PA Semi PWRficient platform support

[Roland Dreier]

 > +#include <linux/config.h>
 > +#include <linux/init.h>
 > +#include <linux/errno.h>
 > +#include <linux/sched.h>
 > +#include <linux/kernel.h>
 > +#include <linux/mm.h>
 > +#include <linux/stddef.h>
 > +#include <linux/unistd.h>
 > +#include <linux/ptrace.h>
 > +#include <linux/slab.h>
 > +#include <linux/user.h>
 > +#include <linux/a.out.h>
 > +#include <linux/tty.h>
 > +#include <linux/string.h>
 > +#include <linux/delay.h>
 > +#include <linux/ioport.h>
 > +#include <linux/major.h>
 > +#include <linux/initrd.h>
 > +#include <linux/vt_kern.h>
 > +#include <linux/console.h>
 > +#include <linux/ide.h>
 > +#include <linux/pci.h>
 > +#include <linux/adb.h>
 > +#include <linux/cuda.h>
 > +#include <linux/pmu.h>
 > +#include <linux/irq.h>
 > +#include <linux/seq_file.h>
 > +#include <linux/root_dev.h>
 > +#include <linux/serial.h>
 > +#include <linux/smp.h>
 > +
 > +#include <asm/processor.h>
 > +#include <asm/sections.h>
 > +#include <asm/prom.h>
 > +#include <asm/system.h>
 > +#include <asm/pgtable.h>
 > +#include <asm/bitops.h>
 > +#include <asm/io.h>
 > +#include <asm/pci-bridge.h>
 > +#include <asm/iommu.h>
 > +#include <asm/machdep.h>
 > +#include <asm/dma.h>
 > +#include <asm/cputable.h>
 > +#include <asm/time.h>
 > +#include <asm/of_device.h>
 > +#include <asm/lmb.h>
 > +#include <asm/mpic.h>
 > +#include <asm/smp.h>
 > +#include <asm/udbg.h>
 > +#include <asm/serial.h>

Are all of these really needed?  Seems rather crazy, considering there
are only 145 lines after this in the file...

Re: [4/5] powerpc: PA Semi PWRficient platform support

[Olof Johansson]

On Tue, 05 Sep 2006 12:49:39 -0700 Roland Dreier <rdreier@cisco.com> wrote:

> Are all of these really needed?  Seems rather crazy, considering there
> are only 145 lines after this in the file...

Yeah, it's crazy. I'll clean it up.


Thanks,

-Olof

Re: [4/5] powerpc: PA Semi PWRficient platform support

[Arnd Bergmann]

On Tuesday 05 September 2006 19:29, Olof Johansson wrote:
> Base patch for PA6T and PA6T-1682M. This introduces the
> arch/powerpc/platform/pasemi directory, together with basic
> implementations for various setup.
> 
> Much of this was based on other platform code, i.e. Maple, etc.
 
Very nice patch set, as expected ;-)

See below for the mandatory nitpicking.


> Index: merge/arch/powerpc/Kconfig
> ===================================================================
> --- merge.orig/arch/powerpc/Kconfig
> +++ merge/arch/powerpc/Kconfig
> @@ -413,6 +409,17 @@ config PPC_MAPLE
>            This option enables support for the Maple 970FX Evaluation Board.
>  	  For more informations, refer to <http://www.970eval.com>
>  
> +config PPC_PASEMI
> +	depends on PPC_MULTIPLATFORM && PPC64
> +	bool "PA Semi SoC-based platforms"
> +	default n
> +	select MPIC
> +	select PPC_UDBG_16550
> +	select GENERIC_TBSYNC
> +	help
> +	  This option enables support for PA Semi's PWRficient line
> +	  of SoC processors, including PA6T-1682M

IIRC, the GENERIC_TBSYNC code is really inefficient. Don't you
have any other way of implementing that?

> +
> +#undef DEBUG
> +

I know that this is done in other places as well, but it seems
rather pointless, and it provides setting DEBUG from EXTRA_CFLAGS
in the Makefile.


> +static struct pci_ops pa_pxp_ops =
> +{
> +	pa_pxp_read_config,
> +	pa_pxp_write_config
> +};

spacing: '{' after '=', and ',' after the final member.

> +
> +static void __init setup_pa_pxp(struct pci_controller* hose)
> +{
> +	hose->ops = &pa_pxp_ops;
> +	hose->cfg_data = ioremap(0xe0000000, 0x1000000);
> +}

Shouldn't that be in the device tree?

> +	bus_range = (int *) get_property(dev, "bus-range", &len);

Unneeded cast

> +	if (bus_range == NULL || len < 2 * sizeof(int)) {
> +		printk(KERN_WARNING "Can't get bus-range for %s, assume bus 0\n",
> +		dev->full_name);
> +	}

if (!bus_range || len < 2 * sizeof(int)) {

> +
> +	hose = pcibios_alloc_controller(dev);
> +	if (hose == NULL)
> +		return -ENOMEM;

if (!hose)

> +	if (root == NULL) {

if (!root)
> +#undef DEBUG

remove

> +extern int pas_set_rtc_time(struct rtc_time *tm);
> +extern void pas_get_rtc_time(struct rtc_time *tm);
> +extern unsigned long pas_get_boot_time(void);
> +extern void pas_pci_init(void);
> +extern void pas_pcibios_fixup(void);

Extern declarations should never be in a source file, please
move them to a header

> +static void iommu_dev_setup_null(struct pci_dev *dev) { }
> +static void iommu_bus_setup_null(struct pci_bus *bus) { }
> +
> +static void __init pas_init_early(void)
> +{
> +	/* No iommu code yet */
> +	ppc_md.iommu_dev_setup = iommu_dev_setup_null;
> +	ppc_md.iommu_bus_setup = iommu_bus_setup_null;
> +	pci_direct_iommu_init();
> +}
> +
> +/* No legacy IO on our parts */
> +static int pas_check_legacy_ioport(unsigned int baseport)
> +{
> +	return -ENODEV;
> +}

Should we maybe change the default behavior so that you don't need
to provide nops for these functions?

> +
> +static __init void pas_init_IRQ(void)
> +{
> +	struct device_node *np = NULL;
> +	struct device_node *root, *mpic_node  = NULL;
> +	unsigned long openpic_addr = 0;

These three should not be initialized.


> +	BUG_ON(mpic == NULL);

BUG_ON(!mpic);

> +
> +#undef DEBUG

remove

> +void pas_get_rtc_time(struct rtc_time *tm)
> +{
> +}
> +
> +int pas_set_rtc_time(struct rtc_time *tm)
> +{
> +	return -ENODEV;
> +}

again, it probably makes sense to not have to provide these.

	Arnd <><

Re: [4/5] powerpc: PA Semi PWRficient platform support

[Olof Johansson]

On Tue, 5 Sep 2006 23:37:10 +0200 Arnd Bergmann <arnd@arndb.de> wrote:

> On Tuesday 05 September 2006 19:29, Olof Johansson wrote:
> > Base patch for PA6T and PA6T-1682M. This introduces the
> > arch/powerpc/platform/pasemi directory, together with basic
> > implementations for various setup.
> > 
> > Much of this was based on other platform code, i.e. Maple, etc.
>  
> Very nice patch set, as expected ;-)
> 
> See below for the mandatory nitpicking.

Thanks Arnd, good feedback, see some comments below.

> 
> 
> > Index: merge/arch/powerpc/Kconfig
> > ===================================================================
> > --- merge.orig/arch/powerpc/Kconfig
> > +++ merge/arch/powerpc/Kconfig
> > @@ -413,6 +409,17 @@ config PPC_MAPLE
> >            This option enables support for the Maple 970FX Evaluation Board.
> >  	  For more informations, refer to <http://www.970eval.com>
> >  
> > +config PPC_PASEMI
> > +	depends on PPC_MULTIPLATFORM && PPC64
> > +	bool "PA Semi SoC-based platforms"
> > +	default n
> > +	select MPIC
> > +	select PPC_UDBG_16550
> > +	select GENERIC_TBSYNC
> > +	help
> > +	  This option enables support for PA Semi's PWRficient line
> > +	  of SoC processors, including PA6T-1682M
> 
> IIRC, the GENERIC_TBSYNC code is really inefficient. Don't you
> have any other way of implementing that?

Yes, we do. It'll be submitted in a later patch for various reasons. We'll use 
the generic sync for now.

> > +
> > +#undef DEBUG
> > +
> 
> I know that this is done in other places as well, but it seems
> rather pointless, and it provides setting DEBUG from EXTRA_CFLAGS
> in the Makefile.

Yes, mostly leftovers from older debug code. I've taken a few out already, 
will go through and take care of the rest.

> > +static struct pci_ops pa_pxp_ops =
> > +{
> > +	pa_pxp_read_config,
> > +	pa_pxp_write_config
> > +};
> 
> spacing: '{' after '=', and ',' after the final member.
> 
> > +
> > +static void __init setup_pa_pxp(struct pci_controller* hose)
> > +{
> > +	hose->ops = &pa_pxp_ops;
> > +	hose->cfg_data = ioremap(0xe0000000, 0x1000000);
> > +}
> 
> Shouldn't that be in the device tree?

I was torn between using device tree and hardcoded values here, and went with 
hardcoded since that's what maple uses. They're not movable on the chip, but 
for future versions I guess device tree makes more sense (if it for some 
reason will move).

> 
> > +	bus_range = (int *) get_property(dev, "bus-range", &len);
> 
> Unneeded cast
> 
> > +	if (bus_range == NULL || len < 2 * sizeof(int)) {
> > +		printk(KERN_WARNING "Can't get bus-range for %s, assume bus 0\n",
> > +		dev->full_name);
> > +	}
> 
> if (!bus_range || len < 2 * sizeof(int)) {
> 
> > +
> > +	hose = pcibios_alloc_controller(dev);
> > +	if (hose == NULL)
> > +		return -ENOMEM;
> 
> if (!hose)
> 
> > +	if (root == NULL) {
> 
> if (!root)
> > +#undef DEBUG
> 
> remove
> 
> > +extern int pas_set_rtc_time(struct rtc_time *tm);
> > +extern void pas_get_rtc_time(struct rtc_time *tm);
> > +extern unsigned long pas_get_boot_time(void);
> > +extern void pas_pci_init(void);
> > +extern void pas_pcibios_fixup(void);
> 
> Extern declarations should never be in a source file, please
> move them to a header
> 
> > +static void iommu_dev_setup_null(struct pci_dev *dev) { }
> > +static void iommu_bus_setup_null(struct pci_bus *bus) { }
> > +
> > +static void __init pas_init_early(void)
> > +{
> > +	/* No iommu code yet */
> > +	ppc_md.iommu_dev_setup = iommu_dev_setup_null;
> > +	ppc_md.iommu_bus_setup = iommu_bus_setup_null;
> > +	pci_direct_iommu_init();
> > +}
> > +
> > +/* No legacy IO on our parts */
> > +static int pas_check_legacy_ioport(unsigned int baseport)
> > +{
> > +	return -ENODEV;
> > +}
> 
> Should we maybe change the default behavior so that you don't need
> to provide nops for these functions?

Good point, most platforms no longer implement this anyway. I'll code that up 
as a separate patch and submit later.

> 
> > +
> > +static __init void pas_init_IRQ(void)
> > +{
> > +	struct device_node *np = NULL;
> > +	struct device_node *root, *mpic_node  = NULL;
> > +	unsigned long openpic_addr = 0;
> 
> These three should not be initialized.
> 
> 
> > +	BUG_ON(mpic == NULL);
> 
> BUG_ON(!mpic);
> 
> > +
> > +#undef DEBUG
> 
> remove
> 
> > +void pas_get_rtc_time(struct rtc_time *tm)
> > +{
> > +}
> > +
> > +int pas_set_rtc_time(struct rtc_time *tm)
> > +{
> > +	return -ENODEV;
> > +}
> 
> again, it probably makes sense to not have to provide these.

Yep, I could take out the #if 0 as well. It's all a big placeholder anyway.


-Olof

Re: [4/5] powerpc: PA Semi PWRficient platform support

[Segher Boessenkool]

> +#define PA_PXP_CFA(bus, devfn, off) (((bus) << 20) | ((devfn) <<  
> 12) | (off))

> +	hose->cfg_data = ioremap(0xe0000000, 0x1000000);

Shouldn't that length be 0x10000000 then?  Or can't you have
more than 0x10 busses?

> +	bus_range = (int *) get_property(dev, "bus-range", &len);
> +	if (bus_range == NULL || len < 2 * sizeof(int)) {
> +		printk(KERN_WARNING "Can't get bus-range for %s, assume bus 0\n",
> +		dev->full_name);
> +	}

Just kill all this "bus-range" stuff?  Or do you really need it?

> +	np = of_find_node_by_type(np, "open-pic");
> +	if (!np) {
> +		printk(KERN_ERR "No interrupt controller in device tree.\n");
> +		return;
> +	}

"device_type" for the MPIC should be "interrupt-controller", "open-pic"
should be in the "compatible" property instead.

> +	/* Find address list in /platform-open-pic */

Erm, can't you get this info from the open-pic node itself?
I know maple does it like this but that should be fixed ;-)

> +	mpic = mpic_alloc(mpic_node, openpic_addr, MPIC_PRIMARY, 0, 0,
> +			  " PAS-OPIC  ");
> +	BUG_ON(mpic == NULL);
> +
> +	mpic_assign_isu(mpic, 0, openpic_addr + 0x10000);
> +	mpic_init(mpic);

Very nice, I'll convert maple to do the same (unless someone beats
me to it, heh).


Segher

Re: [4/5] powerpc: PA Semi PWRficient platform support

[Olof Johansson]

On Wed, 6 Sep 2006 15:38:54 +0200 Segher Boessenkool <segher@kernel.crashing.org> wrote:

> > +#define PA_PXP_CFA(bus, devfn, off) (((bus) << 20) | ((devfn) <<  
> > 12) | (off))
> 
> > +	hose->cfg_data = ioremap(0xe0000000, 0x1000000);
> 
> Shouldn't that length be 0x10000000 then?  Or can't you have
> more than 0x10 busses?

Yes, typo that hasn't hit us yet. Thanks.

> > +	bus_range = (int *) get_property(dev, "bus-range", &len);
> > +	if (bus_range == NULL || len < 2 * sizeof(int)) {
> > +		printk(KERN_WARNING "Can't get bus-range for %s, assume bus 0\n",
> > +		dev->full_name);
> > +	}
> 
> Just kill all this "bus-range" stuff?  Or do you really need it?

Not at this time. Removed.

> > +	np = of_find_node_by_type(np, "open-pic");
> > +	if (!np) {
> > +		printk(KERN_ERR "No interrupt controller in device tree.\n");
> > +		return;
> > +	}
> 
> "device_type" for the MPIC should be "interrupt-controller", "open-pic"
> should be in the "compatible" property instead.

Thanks, I now use the same logic as Maple.

> > +	/* Find address list in /platform-open-pic */
> 
> Erm, can't you get this info from the open-pic node itself?
> I know maple does it like this but that should be fixed ;-)

How about I keep it this way until Maple is fixed then? It's better to keep it
fairly common anyway. Functionally there's no difference.

> > +	mpic = mpic_alloc(mpic_node, openpic_addr, MPIC_PRIMARY, 0, 0,
> > +			  " PAS-OPIC  ");
> > +	BUG_ON(mpic == NULL);
> > +
> > +	mpic_assign_isu(mpic, 0, openpic_addr + 0x10000);
> > +	mpic_init(mpic);
> 
> Very nice, I'll convert maple to do the same (unless someone beats
> me to it, heh).

Maple isn't that different there. It just has to deal with multiple ISUs, 
while we currently only have one.


-Olof

Re: [4/5] powerpc: PA Semi PWRficient platform support

[Segher Boessenkool]

>> Very nice, I'll convert maple to do the same (unless someone beats
>> me to it, heh).
>
> Maple isn't that different there. It just has to deal with multiple  
> ISUs,
> while we currently only have one.

Maple has only one as well, that's the point :-)
It gets the ISU address from that awful platform-open-pic
property currently, hardcoding it like you did for PA6T is
just fine though.  It simplifies the code quite a bit and
doesn't depend on this undocumented (and badly defined no
matter what) device tree property.


Segher

Re: [4/5] powerpc: PA Semi PWRficient platform support

[Benjamin Herrenschmidt]

On Wed, 2006-09-06 at 17:26 +0200, Segher Boessenkool wrote:
> >> Very nice, I'll convert maple to do the same (unless someone beats
> >> me to it, heh).
> >
> > Maple isn't that different there. It just has to deal with multiple  
> > ISUs,
> > while we currently only have one.
> 
> Maple has only one as well, that's the point :-)
> It gets the ISU address from that awful platform-open-pic
> property currently, hardcoding it like you did for PA6T is
> just fine though.  It simplifies the code quite a bit and
> doesn't depend on this undocumented (and badly defined no
> matter what) device tree property.

It's perfectly documented :)

Ben.

Re: [4/5] powerpc: PA Semi PWRficient platform support

[Segher Boessenkool]

>>> Maple isn't that different there. It just has to deal with multiple
>>> ISUs,
>>> while we currently only have one.
>>
>> Maple has only one as well, that's the point :-)
>> It gets the ISU address from that awful platform-open-pic
>> property currently, hardcoding it like you did for PA6T is
>> just fine though.  It simplifies the code quite a bit and
>> doesn't depend on this undocumented (and badly defined no
>> matter what) device tree property.
>
> It's perfectly documented :)

If only I could find where :-)


Segher

Re: [4/5] powerpc: PA Semi PWRficient platform support

[Benjamin Herrenschmidt]

> How about I keep it this way until Maple is fixed then? It's better to keep it
> fairly common anyway. Functionally there's no difference.

Well, the platform-open-pic thingy comes from the CHRP spec. I'm no fan
of it but it looks like we do need it on pseries and I haven't
completely given up with having common mpic discovery routine...

> > > +	mpic = mpic_alloc(mpic_node, openpic_addr, MPIC_PRIMARY, 0, 0,
> > > +			  " PAS-OPIC  ");
> > > +	BUG_ON(mpic == NULL);
> > > +
> > > +	mpic_assign_isu(mpic, 0, openpic_addr + 0x10000);
> > > +	mpic_init(mpic);
> > 
> > Very nice, I'll convert maple to do the same (unless someone beats
> > me to it, heh).
> 
> Maple isn't that different there. It just has to deal with multiple ISUs, 
> while we currently only have one.

Maple doesn't have multiple ISUs

Ben.

Re: [4/5] powerpc: PA Semi PWRficient platform support

[Segher Boessenkool]

>> How about I keep it this way until Maple is fixed then? It's  
>> better to keep it
>> fairly common anyway. Functionally there's no difference.
>
> Well, the platform-open-pic thingy comes from the CHRP spec.

I can't find it there.  I'm looking at version 1.0; maybe it's
in a newer version that I don't have?  It's not in the PAPR
either (the "open" version, anyway).

> I'm no fan
> of it but it looks like we do need it on pseries and I haven't
> completely given up with having common mpic discovery routine...

Sure.  "Just look for the MPIC node and use it with one ISU" won't
work on an actual Maple anyway afaics, it won't find the right
base address for it in its device tree.

I'll make something nice that maybe even you will like ;-)

>>> Very nice, I'll convert maple to do the same (unless someone beats
>>> me to it, heh).
>>
>> Maple isn't that different there. It just has to deal with  
>> multiple ISUs,
>> while we currently only have one.
>
> Maple doesn't have multiple ISUs

Exactly.  All "real" OpenPICs don't; let's just recognise that fact.


Segher

Re: [4/5] powerpc: PA Semi PWRficient platform support

[Olof Johansson]

On Thu, 7 Sep 2006 13:28:25 +0200 Segher Boessenkool <segher@kernel.crashing.org> wrote:

> >> How about I keep it this way until Maple is fixed then? It's  
> >> better to keep it
> >> fairly common anyway. Functionally there's no difference.
> >
> > Well, the platform-open-pic thingy comes from the CHRP spec.
> 
> I can't find it there.  I'm looking at version 1.0; maybe it's
> in a newer version that I don't have?  It's not in the PAPR
> either (the "open" version, anyway).

1.5 from http://openbios.org/docs/index.html has it (section 5.1.1):

prop-name indicates the system Open Firmware Interrupt Controller physical address.

prop-encoded-array: List of system phys-addr values

This property is a list of system physical addresses corresponding to "reg" property
of the system Open Firmware Interrupt Controller


reg for the openpic is (section 5.5.1):

Standard prop-name, defines the base physical address(s) and size(s)
of this Open PIC's addressable register space.

prop-encoded-array: List of (phys-addr, size) specifications

Phys-addr is encoded as with encode-phys, and size is encoded as with encode-int.

The first entry in this list shall be the physical address and size
decoded by the base Open PIC Interrupt Delivery Unit (IDU). Successive
entries in this list shall be the physical addresses and sizes decoded
by any additional Open PIC Interrupt Source Units (ISU).

Re: [4/5] powerpc: PA Semi PWRficient platform support

[Benjamin Herrenschmidt]

On Thu, 2006-09-07 at 13:28 +0200, Segher Boessenkool wrote:
> >> How about I keep it this way until Maple is fixed then? It's  
> >> better to keep it
> >> fairly common anyway. Functionally there's no difference.
> >
> > Well, the platform-open-pic thingy comes from the CHRP spec.
> 
> I can't find it there.  I'm looking at version 1.0; maybe it's
> in a newer version that I don't have?  It's not in the PAPR
> either (the "open" version, anyway).

It's in the old RPAs

> > I'm no fan
> > of it but it looks like we do need it on pseries and I haven't
> > completely given up with having common mpic discovery routine...
> 
> Sure.  "Just look for the MPIC node and use it with one ISU" won't
> work on an actual Maple anyway afaics, it won't find the right
> base address for it in its device tree.
> 
> I'll make something nice that maybe even you will like ;-)
> 
> >>> Very nice, I'll convert maple to do the same (unless someone beats
> >>> me to it, heh).
> >>
> >> Maple isn't that different there. It just has to deal with  
> >> multiple ISUs,
> >> while we currently only have one.
> >
> > Maple doesn't have multiple ISUs
> 
> Exactly.  All "real" OpenPICs don't; let's just recognise that fact.
> 
> 
> Segher

[5/5] powerpc: PA Semi PWRficient MAINTAINER entry

[Olof Johansson]

Maintainer entry for PWRficient

Signed-off-by: Olof Johansson <olof@lixom.net>

Index: merge/MAINTAINERS
===================================================================
--- merge.orig/MAINTAINERS
+++ merge/MAINTAINERS
@@ -1777,6 +1777,13 @@ W:     http://www.penguinppc.org/
 L:     linuxppc-embedded@ozlabs.org
 S:     Maintained
 
+LINUX FOR POWERPC PA SEMI PWRFICIENT
+P:	Olof Johansson
+M:	olof@lixom.net
+W:	http://www.pasemi.com/
+L:	linuxppc-dev@ozlabs.org
+S:	Supported
+
 LLC (802.2)
 P:	Arnaldo Carvalho de Melo
 M:	acme@conectiva.com.