From: Roland Dreier <rdreier@cisco.com>
To: "Moore, Eric" <Eric.Moore@lsi.com>
Cc: David Miller <davem@davemloft.net>,
linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: HELP: Is writeq an atomic operation??
Date: Fri, 02 May 2008 16:21:46 -0700 [thread overview]
Message-ID: <adaod7o2sxh.fsf@cisco.com> (raw)
In-Reply-To: <0631C836DBF79F42B5A60C8C8D4E822901047B4A@NAMAIL2.ad.lsil.com> (Eric Moore's message of "Fri, 2 May 2008 17:13:08 -0600")
> Yeah, I forgot I have a #ifndef writeq, then defined the x86_64 version
> of that. I've not tested on x86, so I'm not sure whether it works.
> How are you handling writeq when its not defined, as the case in x86?
Write two writel() inside a spinlock to avoid any transactions in the
middle (the HW I'm dealing with can deal with two 32-bit transactions,
as long as nothing comes in the middle). If your hardware demands a
single 64-bit transaction, you may be in trouble, because I'm not sure
all 32-bit systems can generate such a PCIe transaction.
You can see include/linux/mlx4/doorbell.h for exactly what I did.
- R.
WARNING: multiple messages have this Message-ID (diff)
From: Roland Dreier <rdreier@cisco.com>
To: "Moore\, Eric" <Eric.Moore@lsi.com>
Cc: "David Miller" <davem@davemloft.net>,
<linux-scsi@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: HELP: Is writeq an atomic operation??
Date: Fri, 02 May 2008 16:21:46 -0700 [thread overview]
Message-ID: <adaod7o2sxh.fsf@cisco.com> (raw)
In-Reply-To: <0631C836DBF79F42B5A60C8C8D4E822901047B4A@NAMAIL2.ad.lsil.com> (Eric Moore's message of "Fri, 2 May 2008 17:13:08 -0600")
> Yeah, I forgot I have a #ifndef writeq, then defined the x86_64 version
> of that. I've not tested on x86, so I'm not sure whether it works.
> How are you handling writeq when its not defined, as the case in x86?
Write two writel() inside a spinlock to avoid any transactions in the
middle (the HW I'm dealing with can deal with two 32-bit transactions,
as long as nothing comes in the middle). If your hardware demands a
single 64-bit transaction, you may be in trouble, because I'm not sure
all 32-bit systems can generate such a PCIe transaction.
You can see include/linux/mlx4/doorbell.h for exactly what I did.
- R.
next prev parent reply other threads:[~2008-05-02 23:21 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-05-02 22:19 HELP: Is writeq an atomic operation?? Moore, Eric
2008-05-02 22:32 ` David Miller
2008-05-02 22:43 ` Roland Dreier
2008-05-02 22:49 ` David Miller
2008-05-02 22:49 ` Moore, Eric
2008-05-02 22:49 ` Moore, Eric
2008-05-02 22:53 ` Roland Dreier
2008-05-02 22:53 ` Roland Dreier
2008-05-02 23:13 ` Moore, Eric
2008-05-02 23:13 ` Moore, Eric
2008-05-02 23:21 ` Roland Dreier [this message]
2008-05-02 23:21 ` Roland Dreier
2008-05-02 23:31 ` Moore, Eric
2008-05-02 23:31 ` Moore, Eric
-- strict thread matches above, loose matches on Subject: below --
2008-05-02 22:40 Moore, Eric
2008-05-02 22:46 ` Roland Dreier
2008-05-03 0:42 ` H. Peter Anvin
2008-05-03 14:35 ` Alan Cox
2008-05-03 17:40 ` H. Peter Anvin
2008-05-03 22:37 ` Benjamin Herrenschmidt
2008-05-04 17:01 ` Roland Dreier
2008-05-02 22:50 ` Andi Kleen
2008-05-02 23:03 ` Moore, Eric
2008-05-02 23:13 ` Andi Kleen
2008-05-02 23:04 ` Roland Dreier
2008-05-02 23:20 ` Moore, Eric
2008-05-03 0:10 ` Roland Dreier
2008-05-02 23:12 ` Jesse Barnes
2008-05-03 0:41 ` H. Peter Anvin
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