From: Roland Dreier <rdreier@cisco.com>
To: "Zhao\, Yu" <yu.zhao@intel.com>
Cc: "Alex Chiang" <achiang@hp.com>,
"Jesse Barnes" <jbarnes@virtuousgeek.org>,
<linux-pci@vger.kernel.org>,
"Randy Dunlap" <randy.dunlap@oracle.com>,
"Greg KH" <greg@kroah.com>,
"Grant Grundler" <grundler@parisc-linux.org>,
"Matthew Wilcox" <matthew@wil.cx>, <linux-kernel@vger.kernel.org>,
<kvm@vger.kernel.org>,
<virtualization@lists.linux-foundation.org>,
<xen-devel@lists.xensource.com>
Subject: Re: [PATCH 2/4 v2] PCI: support ARI capability
Date: Wed, 10 Sep 2008 11:42:18 -0700 [thread overview]
Message-ID: <aday71zn8qd.fsf@cisco.com> (raw)
In-Reply-To: <7A25B56E4BE99C4283EB931CD1A40E110181CAF7@pdsmsx414.ccr.corp.intel.com> (Yu Zhao's message of "Wed, 10 Sep 2008 15:48:04 +0800")
> ARI is an independent PCI Express extended capability. Multi-function
> devices supporting this capability may use it to track dependency
> between different functions and assign function group numbers to
> these functions.
> Another reason to keep this separated with SR-IOV is that after ARI
> is enabled, PCI Express Endpoint may have non-zero slot number
> (device number), which is different from traditional PCI Express
> Endpoint.
OK, I guess. Although I still don't see why we need a user-visible
option to control ARI independent of SR-IOV. When would a user want to
enable CONFIG_PCI_ARI=y but not select CONFIG_PCI_IOV? (Also, by the
way, why PCI_IOV instead of PCI_SR_IOV -- I assume in the future we may
have PCI_MR_IOV, and matching the PCI terminology is probably easier for
people to understand).
- R.
WARNING: multiple messages have this Message-ID (diff)
From: Roland Dreier <rdreier@cisco.com>
To: "Zhao, Yu" <yu.zhao@intel.com>
Cc: Alex Chiang <achiang@hp.com>,
Jesse Barnes <jbarnes@virtuousgeek.org>,
linux-pci@vger.kernel.org, Randy Dunlap <randy.dunlap@oracle.com>,
Greg KH <greg@kroah.com>,
Grant Grundler <grundler@parisc-linux.org>,
Matthew Wilcox <matthew@wil.cx>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
virtualization@lists.linux-foundation.org,
xen-devel@lists.xensource.com
Subject: Re: [PATCH 2/4 v2] PCI: support ARI capability
Date: Wed, 10 Sep 2008 11:42:18 -0700 [thread overview]
Message-ID: <aday71zn8qd.fsf@cisco.com> (raw)
In-Reply-To: <7A25B56E4BE99C4283EB931CD1A40E110181CAF7@pdsmsx414.ccr.corp.intel.com> (Yu Zhao's message of "Wed, 10 Sep 2008 15:48:04 +0800")
> ARI is an independent PCI Express extended capability. Multi-function
> devices supporting this capability may use it to track dependency
> between different functions and assign function group numbers to
> these functions.
> Another reason to keep this separated with SR-IOV is that after ARI
> is enabled, PCI Express Endpoint may have non-zero slot number
> (device number), which is different from traditional PCI Express
> Endpoint.
OK, I guess. Although I still don't see why we need a user-visible
option to control ARI independent of SR-IOV. When would a user want to
enable CONFIG_PCI_ARI=y but not select CONFIG_PCI_IOV? (Also, by the
way, why PCI_IOV instead of PCI_SR_IOV -- I assume in the future we may
have PCI_MR_IOV, and matching the PCI terminology is probably easier for
people to understand).
- R.
next prev parent reply other threads:[~2008-09-10 18:42 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-09-01 11:20 [PATCH 2/4 v2] PCI: support ARI capability Zhao, Yu
2008-09-01 11:20 ` Zhao, Yu
2008-09-01 15:27 ` Alex Chiang
2008-09-01 15:50 ` Roland Dreier
2008-09-01 15:50 ` Roland Dreier
2008-09-01 15:50 ` Roland Dreier
2008-09-10 7:48 ` Zhao, Yu
2008-09-10 7:48 ` Zhao, Yu
2008-09-10 18:42 ` Roland Dreier [this message]
2008-09-10 18:42 ` Roland Dreier
2008-09-10 18:42 ` Roland Dreier
2008-09-10 20:07 ` Matthew Wilcox
2008-09-10 20:07 ` Matthew Wilcox
2008-09-10 7:48 ` Zhao, Yu
2008-09-10 7:35 ` Zhao, Yu
2008-09-10 7:35 ` Zhao, Yu
2008-09-10 7:35 ` Zhao, Yu
2008-09-01 15:27 ` Alex Chiang
-- strict thread matches above, loose matches on Subject: below --
2008-09-01 11:20 Zhao, Yu
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