From: Aurelien Jarno <aurelien@aurel32.net>
To: Shuwei Wu <shuwei.wu@mailbox.org>
Cc: Anand Moon <linux.amoon@gmail.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Viresh Kumar <viresh.kumar@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>, Yixun Lan <dlan@kernel.org>,
linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, spacemit@lists.linux.dev,
devicetree@vger.kernel.org
Subject: Re: [PATCH v2 2/2] riscv: dts: spacemit: Add cpu scaling for K1 SoC
Date: Tue, 21 Apr 2026 19:11:11 +0200 [thread overview]
Message-ID: <aeevr6Zj3Pwm9wux@aurel32.net> (raw)
In-Reply-To: <DHYOIIFMGH7J.228ISQ7XYFGKE@mailbox.org>
Hi,
On 2026-04-21 16:10, Shuwei Wu wrote:
> Hi Aurelien,
>
> Thanks for your addition.
>
> On Tue Apr 21, 2026 at 5:16 AM CST, Aurelien Jarno wrote:
> > Hi Anand,
> >
> > On 2026-04-16 17:07, Anand Moon wrote:
> >> After reviewing the Banana Pi F3 schematics, I confirmed that Buck1 and Buck2
> >> Both supply the CORE_0V9 with 0.9V±1% rail. To resolve the restriction errors,
> >> I expanded the voltage range in the DTS to 500,000–950,000 µV.
> >>
> >> Additionally, I updated the DTS to map the second CPU cluster (cores 4–7)
> >> to Buck2 to better align with the hardware's power distribution.
> >
> > Actually the output of Buck1 and Buck2 are connected together, so they
> > should always be configured with the same output voltage. And both
> > clusters should be mapped to both outputs.
>
> You are right, I received the same response from the official developers.
>
> Therefore, I'm wondering if an additional regulator-coupled-with: property
> definition is also needed here?
Yes, I think this is the way to go. I even wonder if this shouldn't be a
fix with Cc: stable. This also has to be done for the Milk-V Jupiter
board, I haven't checked the other boards yet, but I guess they all use
the same schematics at that the PMIC level.
Regards
Aurelien
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
aurelien@aurel32.net http://aurel32.net
WARNING: multiple messages have this Message-ID (diff)
From: Aurelien Jarno <aurelien@aurel32.net>
To: Shuwei Wu <shuwei.wu@mailbox.org>
Cc: Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Viresh Kumar <viresh.kumar@linaro.org>,
linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
Palmer Dabbelt <palmer@dabbelt.com>, Yixun Lan <dlan@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
spacemit@lists.linux.dev, Paul Walmsley <pjw@kernel.org>
Subject: Re: [PATCH v2 2/2] riscv: dts: spacemit: Add cpu scaling for K1 SoC
Date: Tue, 21 Apr 2026 19:11:11 +0200 [thread overview]
Message-ID: <aeevr6Zj3Pwm9wux@aurel32.net> (raw)
In-Reply-To: <DHYOIIFMGH7J.228ISQ7XYFGKE@mailbox.org>
Hi,
On 2026-04-21 16:10, Shuwei Wu wrote:
> Hi Aurelien,
>
> Thanks for your addition.
>
> On Tue Apr 21, 2026 at 5:16 AM CST, Aurelien Jarno wrote:
> > Hi Anand,
> >
> > On 2026-04-16 17:07, Anand Moon wrote:
> >> After reviewing the Banana Pi F3 schematics, I confirmed that Buck1 and Buck2
> >> Both supply the CORE_0V9 with 0.9V±1% rail. To resolve the restriction errors,
> >> I expanded the voltage range in the DTS to 500,000–950,000 µV.
> >>
> >> Additionally, I updated the DTS to map the second CPU cluster (cores 4–7)
> >> to Buck2 to better align with the hardware's power distribution.
> >
> > Actually the output of Buck1 and Buck2 are connected together, so they
> > should always be configured with the same output voltage. And both
> > clusters should be mapped to both outputs.
>
> You are right, I received the same response from the official developers.
>
> Therefore, I'm wondering if an additional regulator-coupled-with: property
> definition is also needed here?
Yes, I think this is the way to go. I even wonder if this shouldn't be a
fix with Cc: stable. This also has to be done for the Milk-V Jupiter
board, I haven't checked the other boards yet, but I guess they all use
the same schematics at that the PMIC level.
Regards
Aurelien
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
aurelien@aurel32.net http://aurel32.net
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next prev parent reply other threads:[~2026-04-21 17:11 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-10 7:58 [PATCH v2 0/2] cpufreq: spacemit: Add cpufreq support for K1 SoC Shuwei Wu
2026-04-10 7:58 ` Shuwei Wu
2026-04-10 7:58 ` [PATCH v2 1/2] cpufreq: dt-platdev: Add SpacemiT K1 SoC to the allowlist Shuwei Wu
2026-04-10 7:58 ` Shuwei Wu
2026-04-10 7:58 ` [PATCH v2 2/2] riscv: dts: spacemit: Add cpu scaling for K1 SoC Shuwei Wu
2026-04-10 7:58 ` Shuwei Wu
2026-04-14 13:25 ` Anand Moon
2026-04-14 13:25 ` Anand Moon
2026-04-16 5:59 ` Shuwei Wu
2026-04-16 5:59 ` Shuwei Wu
2026-04-16 11:37 ` Anand Moon
2026-04-16 11:37 ` Anand Moon
2026-04-17 6:08 ` Anand Moon
2026-04-17 6:08 ` Anand Moon
2026-04-21 8:00 ` Shuwei Wu
2026-04-21 8:00 ` Shuwei Wu
2026-04-20 21:16 ` Aurelien Jarno
2026-04-20 21:16 ` Aurelien Jarno
2026-04-21 7:27 ` Anand Moon
2026-04-21 7:27 ` Anand Moon
2026-04-21 8:10 ` Shuwei Wu
2026-04-21 8:10 ` Shuwei Wu
2026-04-21 17:11 ` Aurelien Jarno [this message]
2026-04-21 17:11 ` Aurelien Jarno
2026-04-22 6:14 ` Anand Moon
2026-04-22 6:14 ` Anand Moon
2026-05-17 4:35 ` Anand Moon
2026-05-17 4:35 ` Anand Moon
2026-05-18 8:46 ` Shuwei Wu
2026-05-18 8:46 ` Shuwei Wu
2026-04-16 18:28 ` Yao Zi
2026-04-16 18:28 ` Yao Zi
2026-04-13 10:49 ` [PATCH v2 0/2] cpufreq: spacemit: Add cpufreq support " Viresh Kumar
2026-04-13 10:49 ` Viresh Kumar
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