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From: Sebastian Reichel <sebastian.reichel@collabora.com>
To: ricardo@pardini.net
Cc: Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	 Heiko Stuebner <heiko@sntech.de>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	 linux-rockchip@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/2] arm64: dts: rockchip: fix PCIe regulator name on NanoPC-T6
Date: Mon, 1 Jun 2026 14:55:25 +0200	[thread overview]
Message-ID: <ah2AYT4XmYR03I7z@venus> (raw)
In-Reply-To: <20260529-rk3588-dts-rtl-eth-describe-dt-alias-v2-2-49700248143f@pardini.net>

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Hi,

On Fri, May 29, 2026 at 05:31:25PM +0200, Ricardo Pardini via B4 Relay wrote:
> From: Ricardo Pardini <ricardo@pardini.net>
> 
> The GPIO-switched 3v3 regulator on the NanoPC-T6 is labeled
> vcc3v3_pcie2x1l0, but it is wired to and consumed by &pcie2x1l1, and
> its enable is the pcie_m2_1_pwren pin - i.e. it powers the M.2 slot on
> pcie2x1l1, not pcie2x1l0. The two soldered RTL8125 NICs on pcie2x1l0
> and pcie2x1l2 instead share the always-on vcc_3v3_pcie20 rail, so
> nothing actually uses an "l0" switched supply.
> 
> Rename the label, node name and regulator-name to vcc3v3_pcie2x1l1 so
> they match the controller the rail actually supplies.
> 
> Signed-off-by: Ricardo Pardini <ricardo@pardini.net>
> ---

You should use the regulator name from the schematics. I had a quick
look and https://wiki.friendlyelec.com/wiki/images/9/97/NanoPC-T6_2301_SCH.PDF
describes the GPIO as PCIE_M2_1_PWREN as you mention in your commit
message. That GPIO controls a regulator for the power net "VDD_MPCIE_3.3V".
So that's the expected name :)

Greetings,

-- Sebastian

>  arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
> index 04c4479f08170..7d314df3f947b 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
> @@ -203,13 +203,13 @@ vbus5v0_usb: regulator-vbus5v0-usb {
>  		vin-supply = <&vcc5v0_sys>;
>  	};
>  
> -	vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {
> +	vcc3v3_pcie2x1l1: regulator-vcc3v3-pcie2x1l1 {
>  		compatible = "regulator-fixed";
>  		enable-active-high;
>  		gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
>  		pinctrl-names = "default";
>  		pinctrl-0 = <&pcie_m2_1_pwren>;
> -		regulator-name = "vcc3v3_pcie2x1l0";
> +		regulator-name = "vcc3v3_pcie2x1l1";
>  		regulator-min-microvolt = <3300000>;
>  		regulator-max-microvolt = <3300000>;
>  		vin-supply = <&vcc5v0_sys>;
> @@ -655,7 +655,7 @@ rtl_eth0: ethernet@0,0 {
>  
>  &pcie2x1l1 {
>  	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
> -	vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
> +	vpcie3v3-supply = <&vcc3v3_pcie2x1l1>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pcie2_1_rst>;
>  	status = "okay";
> 
> -- 
> 2.54.0
> 
> 

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WARNING: multiple messages have this Message-ID (diff)
From: Sebastian Reichel <sebastian.reichel@collabora.com>
To: ricardo@pardini.net
Cc: Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	 Heiko Stuebner <heiko@sntech.de>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	 linux-rockchip@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/2] arm64: dts: rockchip: fix PCIe regulator name on NanoPC-T6
Date: Mon, 1 Jun 2026 14:55:25 +0200	[thread overview]
Message-ID: <ah2AYT4XmYR03I7z@venus> (raw)
In-Reply-To: <20260529-rk3588-dts-rtl-eth-describe-dt-alias-v2-2-49700248143f@pardini.net>


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Hi,

On Fri, May 29, 2026 at 05:31:25PM +0200, Ricardo Pardini via B4 Relay wrote:
> From: Ricardo Pardini <ricardo@pardini.net>
> 
> The GPIO-switched 3v3 regulator on the NanoPC-T6 is labeled
> vcc3v3_pcie2x1l0, but it is wired to and consumed by &pcie2x1l1, and
> its enable is the pcie_m2_1_pwren pin - i.e. it powers the M.2 slot on
> pcie2x1l1, not pcie2x1l0. The two soldered RTL8125 NICs on pcie2x1l0
> and pcie2x1l2 instead share the always-on vcc_3v3_pcie20 rail, so
> nothing actually uses an "l0" switched supply.
> 
> Rename the label, node name and regulator-name to vcc3v3_pcie2x1l1 so
> they match the controller the rail actually supplies.
> 
> Signed-off-by: Ricardo Pardini <ricardo@pardini.net>
> ---

You should use the regulator name from the schematics. I had a quick
look and https://wiki.friendlyelec.com/wiki/images/9/97/NanoPC-T6_2301_SCH.PDF
describes the GPIO as PCIE_M2_1_PWREN as you mention in your commit
message. That GPIO controls a regulator for the power net "VDD_MPCIE_3.3V".
So that's the expected name :)

Greetings,

-- Sebastian

>  arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
> index 04c4479f08170..7d314df3f947b 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
> @@ -203,13 +203,13 @@ vbus5v0_usb: regulator-vbus5v0-usb {
>  		vin-supply = <&vcc5v0_sys>;
>  	};
>  
> -	vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {
> +	vcc3v3_pcie2x1l1: regulator-vcc3v3-pcie2x1l1 {
>  		compatible = "regulator-fixed";
>  		enable-active-high;
>  		gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
>  		pinctrl-names = "default";
>  		pinctrl-0 = <&pcie_m2_1_pwren>;
> -		regulator-name = "vcc3v3_pcie2x1l0";
> +		regulator-name = "vcc3v3_pcie2x1l1";
>  		regulator-min-microvolt = <3300000>;
>  		regulator-max-microvolt = <3300000>;
>  		vin-supply = <&vcc5v0_sys>;
> @@ -655,7 +655,7 @@ rtl_eth0: ethernet@0,0 {
>  
>  &pcie2x1l1 {
>  	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
> -	vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
> +	vpcie3v3-supply = <&vcc3v3_pcie2x1l1>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pcie2_1_rst>;
>  	status = "okay";
> 
> -- 
> 2.54.0
> 
> 

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  reply	other threads:[~2026-06-01 12:55 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-29 15:31 [PATCH v2 0/2] describe PCIe ethernet interfaces and alias ethernet0/1 on NanoPC-T6 Ricardo Pardini
2026-05-29 15:31 ` Ricardo Pardini via B4 Relay
2026-05-29 15:31 ` Ricardo Pardini via B4 Relay
2026-05-29 15:31 ` [PATCH v2 1/2] arm64: dts: rockchip: describe PCIe Ethernet controllers " Ricardo Pardini
2026-05-29 15:31   ` Ricardo Pardini via B4 Relay
2026-05-29 15:31   ` Ricardo Pardini via B4 Relay
2026-05-29 15:52   ` sashiko-bot
2026-05-29 15:31 ` [PATCH v2 2/2] arm64: dts: rockchip: fix PCIe regulator name " Ricardo Pardini
2026-05-29 15:31   ` Ricardo Pardini via B4 Relay
2026-05-29 15:31   ` Ricardo Pardini via B4 Relay
2026-06-01 12:55   ` Sebastian Reichel [this message]
2026-06-01 12:55     ` Sebastian Reichel
2026-06-01 13:05 ` [PATCH v2 0/2] describe PCIe ethernet interfaces and alias ethernet0/1 " Sebastian Reichel
2026-06-01 13:05   ` Sebastian Reichel

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