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* [PATCH] drm/xe/mmio: Assert MMIO is available
@ 2026-05-27 17:54 Michal Wajdeczko
  2026-05-27 19:39 ` ✓ CI.KUnit: success for " Patchwork
                   ` (3 more replies)
  0 siblings, 4 replies; 11+ messages in thread
From: Michal Wajdeczko @ 2026-05-27 17:54 UTC (permalink / raw)
  To: intel-xe; +Cc: Michal Wajdeczko, Matthew Auld

We shouldn't access device registers after the device was unplugged.
Instead of relying on the NPD splat due to zeroed xe.mmio.regs, which
might be unreliable anyway as not all xe_mmio are using that directly,
add an explicit assert during xe_mmio read/write operations to catch
invalid accesses to MMIO after device was unplugged.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
Cc: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/xe/xe_mmio.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
index 78adb303b663..b77a717f0556 100644
--- a/drivers/gpu/drm/xe/xe_mmio.c
+++ b/drivers/gpu/drm/xe/xe_mmio.c
@@ -10,6 +10,7 @@
 #include <linux/minmax.h>
 #include <linux/pci.h>
 
+#include <drm/drm_drv.h>
 #include <drm/drm_managed.h>
 #include <drm/drm_print.h>
 
@@ -128,6 +129,11 @@ void xe_mmio_init(struct xe_mmio *mmio, struct xe_tile *tile, void __iomem *ptr,
 	mmio->tile = tile;
 }
 
+static void mmio_assert_available(struct xe_mmio *mmio)
+{
+	xe_tile_assert(mmio->tile, !drm_dev_is_unplugged(&mmio->tile->xe->drm));
+}
+
 static void mmio_flush_pending_writes(struct xe_mmio *mmio)
 {
 #define DUMMY_REG_OFFSET	0x130030
@@ -146,6 +152,7 @@ u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg)
 	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
 	u8 val;
 
+	mmio_assert_available(mmio);
 	mmio_flush_pending_writes(mmio);
 
 	val = readb(mmio->regs + addr);
@@ -158,6 +165,7 @@ void xe_mmio_write8(struct xe_mmio *mmio, struct xe_reg reg, u8 val)
 {
 	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
 
+	mmio_assert_available(mmio);
 	trace_xe_reg_rw(mmio, true, addr, val, sizeof(val));
 
 	writeb(val, mmio->regs + addr);
@@ -168,6 +176,7 @@ u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg)
 	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
 	u16 val;
 
+	mmio_assert_available(mmio);
 	mmio_flush_pending_writes(mmio);
 
 	val = readw(mmio->regs + addr);
@@ -180,6 +189,7 @@ void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val)
 {
 	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
 
+	mmio_assert_available(mmio);
 	trace_xe_reg_rw(mmio, true, addr, val, sizeof(val));
 
 	if (!reg.vf && IS_SRIOV_VF(mmio->tile->xe))
@@ -194,6 +204,7 @@ u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg)
 	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
 	u32 val;
 
+	mmio_assert_available(mmio);
 	mmio_flush_pending_writes(mmio);
 
 	if (!reg.vf && IS_SRIOV_VF(mmio->tile->xe))
-- 
2.47.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread
end of thread, other threads:[~2026-05-29  6:58 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-05-27 17:54 [PATCH] drm/xe/mmio: Assert MMIO is available Michal Wajdeczko
2026-05-27 19:39 ` ✓ CI.KUnit: success for " Patchwork
2026-05-27 20:31 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-05-28  4:40 ` ✗ Xe.CI.FULL: " Patchwork
2026-05-28  9:13 ` [PATCH] " Matthew Auld
2026-05-28 16:16   ` Michal Wajdeczko
2026-05-28 16:47     ` Matthew Auld
2026-05-28 17:34       ` Michal Wajdeczko
2026-05-28 18:06         ` Raag Jadav
2026-05-29  6:58         ` Matthew Auld
2026-05-28 17:43     ` Raag Jadav

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