Re: [PATCH v9 5/9] ARM: dts: sun8i: v3s: Add nodes for MIPI CSI-2 support

[Paul Kocialkowski <paulk@sys-base.io>]

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Hi Chen-Yu,

Le Tue 26 May 26, 16:13, Paul Kocialkowski a écrit :
> > > > +                     reg = <0x01cb2000 0x1000>;
> > > > +                     clocks = <&ccu CLK_BUS_CSI>,
> > > > +                              <&ccu CLK_MIPI_CSI>;
> > > > +                     clock-names = "bus", "mod";
> > > > +                     resets = <&ccu RST_BUS_CSI>;
> > >
> > > Will this node fail dtbs_check schema validation? The existing device tree
> > > binding schema for "allwinner,sun6i-a31-mipi-dphy" requires an interrupts
> > > property, which appears to be missing here.
> > 
> > Yeah, this is definitely going to fail validation.
> 
> To be very clear about this, the interrupt is absolutely not required for
> proper operation of the unit and there's a chance we might eventually see
> a SoC that doesn't have it wired.
> 
> I could just hook the interrupt for now and we could make it optional if ever
> needed, but I could also mark is as optional now if you prefer.
> 
> > > If the V3s hardware physically lacks a D-PHY interrupt, would it be better
> > > to add the V3s-specific compatible string and update the binding schema
> > > to make the interrupts property conditionally optional for the V3s?
> > 
> > FWIW the vendor kernel has some code for the D-PHY's interrupt bits [1].
> > Could you add the interrupt (I'm guessing the MIPI-CSI interrupt?) and
> > give it a quick test?
> 
> Thanks for digging this up! It really looks like it's just used for debug
> purposes.
> 
> I have previously used the mipi csi-2 interrupt for the mipi csi-2 controller
> and never for the d-phy. There's a chance it's the same interrupt that is wired
> to both units (like it is for isp/csi).
> 
> I'll give it a try when I get back home. If it doesn't trigger, it probbaly
> means it's not wired to the d-phy and should really be made optional.

I just tested it: the interrupt is wired to both the mipi csi-2 and d-phy
units and triggers when interrupt enable bits are set on the d-phy.

So I will just add it to the d-phy node and keep the property marked as
mandatory in the binding.

All the best,

Paul

> > Thanks
> > ChenYu
> > 
> > [1] https://github.com/gediz/v3s-linux-sdk/blob/master/linux-3.4/drivers/media/video/sunxi-vfe/mipi_csi/dphy/dphy_reg.c
> > 
> > 
> > > > +                     allwinner,direction = "rx";
> > > > +                     status = "disabled";
> > > > +                     #phy-cells = <0>;
> > > > +             };
> > > > +
> > >
> > > --
> > > Sashiko AI review · https://sashiko.dev/#/patchset/20260518153339.619947-1-paulk@sys-base.io?part=5
> > >
> 
> -- 
> Paul Kocialkowski,
> 
> Independent contractor - sys-base - https://www.sys-base.io/
> Free software developer - https://www.paulk.fr/
> 
> Expert in multimedia, graphics and embedded hardware support with Linux.



-- 
Paul Kocialkowski,

Independent contractor - sys-base - https://www.sys-base.io/
Free software developer - https://www.paulk.fr/

Expert in multimedia, graphics and embedded hardware support with Linux.

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