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From: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
To: Loic Poulain <loic.poulain@oss.qualcomm.com>
Cc: Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Bartosz Golaszewski <bartosz.golaszewski@linaro.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Wasim Nazir <wasim.nazir@oss.qualcomm.com>,
	Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com>,
	Yijie Yang <quic_yijiyang@quicinc.com>,
	linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH 0/6] Additional regulator support for the Qualcomm SGMII SerDes PHY
Date: Fri, 26 Jun 2026 11:43:43 +0530	[thread overview]
Message-ID: <aj4YlxJDvIsaJF1R@oss.qualcomm.com> (raw)
In-Reply-To: <CAFEp6-3De6r3XwSmnKpMSSf8KK3K-esDAhTRKN41Bng-Yf8dXg@mail.gmail.com>

On Mon, Jun 22, 2026 at 04:08:55PM +0200, Loic Poulain wrote:
> Hi,
> 
> On Mon, Nov 24, 2025 at 10:26 AM Mohd Ayaan Anwar
> <mohd.anwar@oss.qualcomm.com> wrote:
> >
> > This patch series addresses a SerDes power-up failure observed on the
> > QCS8300 Ride board using the phy-qcom-sgmii-eth driver. The issue occurs
> > because the SerDes PHY requires both L5A and L4A regulators to be
> > enabled during initialization. If either one of them is disabled, the
> > status register does not reset, and the Ethernet interface fails to come
> > up due to a timeout:
> >
> > [   77.105651] qcom-dwmac-sgmii-phy 8909000.phy: QSERDES_COM_C_READY_STATUS timed-out
> > [   77.113447] qcom-ethqos 23040000.ethernet eth0: __stmmac_open: Serdes powerup failed
> >
> > Presumably, the issue is not seen on all users of this PHY because both
> > regulators are often shared with other peripherals. However, the power
> > rail schematics for boards using this SerDes PHY show that it is
> > supplied by both L5A (1.2V) and L4A (0.9V) regulators.
> >
> > This series has been tested on the QCS8300 Ride board, and the reported
> > issue was resolved. All Monaco and Lemans derivative boards require this
> > new configuration as they use the same SerDes PHY.
> >
> > Signed-off-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
> 
> This appears to be a real issue, but I haven’t seen a new version of
> the series or any response to the feedback so far. Could you please
> follow up on this?
> 

I will shortly send out a v2. I got access to more details about the
hardware, and it has two dedicated regulators which need to be enabled.
The same requirements are there on all Lemans/Monaco-based boards.

	Ayaan

WARNING: multiple messages have this Message-ID (diff)
From: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
To: Loic Poulain <loic.poulain@oss.qualcomm.com>
Cc: Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Bartosz Golaszewski <bartosz.golaszewski@linaro.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Wasim Nazir <wasim.nazir@oss.qualcomm.com>,
	Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com>,
	Yijie Yang <quic_yijiyang@quicinc.com>,
	linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH 0/6] Additional regulator support for the Qualcomm SGMII SerDes PHY
Date: Fri, 26 Jun 2026 11:43:43 +0530	[thread overview]
Message-ID: <aj4YlxJDvIsaJF1R@oss.qualcomm.com> (raw)
In-Reply-To: <CAFEp6-3De6r3XwSmnKpMSSf8KK3K-esDAhTRKN41Bng-Yf8dXg@mail.gmail.com>

On Mon, Jun 22, 2026 at 04:08:55PM +0200, Loic Poulain wrote:
> Hi,
> 
> On Mon, Nov 24, 2025 at 10:26 AM Mohd Ayaan Anwar
> <mohd.anwar@oss.qualcomm.com> wrote:
> >
> > This patch series addresses a SerDes power-up failure observed on the
> > QCS8300 Ride board using the phy-qcom-sgmii-eth driver. The issue occurs
> > because the SerDes PHY requires both L5A and L4A regulators to be
> > enabled during initialization. If either one of them is disabled, the
> > status register does not reset, and the Ethernet interface fails to come
> > up due to a timeout:
> >
> > [   77.105651] qcom-dwmac-sgmii-phy 8909000.phy: QSERDES_COM_C_READY_STATUS timed-out
> > [   77.113447] qcom-ethqos 23040000.ethernet eth0: __stmmac_open: Serdes powerup failed
> >
> > Presumably, the issue is not seen on all users of this PHY because both
> > regulators are often shared with other peripherals. However, the power
> > rail schematics for boards using this SerDes PHY show that it is
> > supplied by both L5A (1.2V) and L4A (0.9V) regulators.
> >
> > This series has been tested on the QCS8300 Ride board, and the reported
> > issue was resolved. All Monaco and Lemans derivative boards require this
> > new configuration as they use the same SerDes PHY.
> >
> > Signed-off-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
> 
> This appears to be a real issue, but I haven’t seen a new version of
> the series or any response to the feedback so far. Could you please
> follow up on this?
> 

I will shortly send out a v2. I got access to more details about the
hardware, and it has two dedicated regulators which need to be enabled.
The same requirements are there on all Lemans/Monaco-based boards.

	Ayaan

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

  reply	other threads:[~2026-06-26  6:13 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-24  9:25 [PATCH 0/6] Additional regulator support for the Qualcomm SGMII SerDes PHY Mohd Ayaan Anwar
2025-11-24  9:25 ` Mohd Ayaan Anwar
2025-11-24  9:25 ` [PATCH 1/6] dt-bindings: phy: describe additional regulator for Qualcomm SGMII PHY Mohd Ayaan Anwar
2025-11-24  9:25   ` Mohd Ayaan Anwar
2025-11-25  9:59   ` Krzysztof Kozlowski
2025-11-25  9:59     ` Krzysztof Kozlowski
2025-11-24  9:25 ` [PATCH 2/6] arm64: dts: qcom: lemans-evk: add additional SerDes PHY regulator Mohd Ayaan Anwar
2025-11-24  9:25   ` Mohd Ayaan Anwar
2025-11-24 10:33   ` Konrad Dybcio
2025-11-24 10:33     ` Konrad Dybcio
2025-11-24  9:25 ` [PATCH 3/6] arm64: dts: qcom: lemans-ride-common: add additional SerDes PHY regulators Mohd Ayaan Anwar
2025-11-24  9:25   ` Mohd Ayaan Anwar
2025-11-24 10:34   ` Konrad Dybcio
2025-11-24 10:34     ` Konrad Dybcio
2025-11-24  9:25 ` [PATCH 4/6] arm64: dts: qcom: monaco-evk: fix the " Mohd Ayaan Anwar
2025-11-24  9:25   ` Mohd Ayaan Anwar
2025-11-24 10:35   ` Konrad Dybcio
2025-11-24 10:35     ` Konrad Dybcio
2025-11-24  9:25 ` [PATCH 5/6] arm64: dts: qcom: qcs8300-ride: add additional SerDes PHY regulator Mohd Ayaan Anwar
2025-11-24  9:25   ` Mohd Ayaan Anwar
2025-11-24 10:35   ` Konrad Dybcio
2025-11-24 10:35     ` Konrad Dybcio
2025-11-24  9:25 ` [PATCH 6/6] phy: qcom: sgmii-eth: add second regulator support Mohd Ayaan Anwar
2025-11-24  9:25   ` Mohd Ayaan Anwar
2025-11-24 13:31   ` Konrad Dybcio
2025-11-24 13:31     ` Konrad Dybcio
2026-06-22 14:08 ` [PATCH 0/6] Additional regulator support for the Qualcomm SGMII SerDes PHY Loic Poulain
2026-06-22 14:08   ` Loic Poulain
2026-06-26  6:13   ` Mohd Ayaan Anwar [this message]
2026-06-26  6:13     ` Mohd Ayaan Anwar

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