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From: Magnus Kulke <magnuskulke@linux.microsoft.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: qemu-devel@nongnu.org, Wei Liu <wei.liu@kernel.org>,
	Zhao Liu <zhao1.liu@intel.com>, Wei Liu <liuwe@microsoft.com>,
	Magnus Kulke <magnuskulke@microsoft.com>
Subject: Re: [PATCH v6 6/9] target/i386: query mshv accel for supported cpuids
Date: Fri, 26 Jun 2026 15:37:41 +0200	[thread overview]
Message-ID: <aj6ApQooh1CPff1T@example.com> (raw)
In-Reply-To: <db21ca7e-de25-46f3-b1a3-b199d35a7bcb@redhat.com>

On Thu, Jun 25, 2026 at 05:16:44PM +0200, Paolo Bonzini wrote:
> On 4/16/26 14:11, Magnus Kulke wrote:
> > We implement mshv_get_supported_cpuid() and invoke it in
> > x86_cpu_get_supported_feature_word() retrieve the cpu features that the
> > host is supporting. Initially we mask the virtualization capabilitities
> > potentially we might need to mask more in the future.
> 
> Hopefully not - the difference between what the host and the guest support
> is not something that QEMU can know.
> 
> Apart from that, there's nothing that stands out so I'm applying the series.
> 
> Paolo

I think that is something that we will probably have to refine more.
Intuitively I would also say that the VMM shouldn't be concerned much about
host capabilities, however -cpu host has some interesting implications for a
VMM that is driving msft hypervisor. I understand some features (CET I think?)
would have an impact the instruction emulator. For KVM that would be in the
kernel, but for MSHV (and HVF, WHPX I think) that's userland.

We're still discussing with the hypervisor and kernel team what the proper
approach is, how we can reconcile cpuids with the flags that we pass at
partition creation and how much awareness should exist in the VMM. I can
imagine that we'll take a conservative approach and end up enumerating
the features that we support in QEMU (and extend them in future releases
if required).

thx,

magnus


  reply	other threads:[~2026-06-26 13:38 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-16 12:11 [PATCH v6 0/9] Support QEMU cpu models in MSHV accelerator Magnus Kulke
2026-04-16 12:11 ` [PATCH v6 1/9] accel/mshv: use mshv_create_partition_v2 payload Magnus Kulke
2026-04-30  8:43   ` Doru Blânzeanu
2026-04-16 12:11 ` [PATCH v6 2/9] target/i386/mshv: fix cpuid propagation bug Magnus Kulke
2026-04-30  9:05   ` Doru Blânzeanu
2026-04-16 12:11 ` [PATCH v6 3/9] target/i386/mshv: fix various cpuid traversal bugs Magnus Kulke
2026-04-30  9:35   ` Doru Blânzeanu
2026-04-16 12:11 ` [PATCH v6 4/9] target/i386/mshv: change cpuid mask to UINT32_MAX Magnus Kulke
2026-04-30 11:27   ` Doru Blânzeanu
2026-04-16 12:11 ` [PATCH v6 5/9] target/i386/mshv: set cpu model name on -cpu host Magnus Kulke
2026-04-30 11:47   ` Doru Blânzeanu
2026-04-16 12:11 ` [PATCH v6 6/9] target/i386: query mshv accel for supported cpuids Magnus Kulke
2026-05-06 10:41   ` Doru Blânzeanu
2026-06-25 15:16   ` Paolo Bonzini
2026-06-26 13:37     ` Magnus Kulke [this message]
2026-04-16 12:11 ` [PATCH v6 7/9] target/i386/mshv: populate xsave area offsets Magnus Kulke
2026-05-06 11:02   ` Doru Blânzeanu
2026-04-16 12:11 ` [PATCH v6 8/9] target/i386/mshv: use hv-provided [0xD,1+2].EBX Magnus Kulke
2026-05-06 11:14   ` Doru Blânzeanu
2026-04-16 12:11 ` [PATCH v6 9/9] accel/mshv: disable la57 (5lvl paging) Magnus Kulke
2026-05-06 11:24   ` Doru Blânzeanu

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