* [PATCH v1] drm/xe: Improve wedged state management
@ 2026-06-17 12:03 Raag Jadav
2026-06-17 12:16 ` ✓ CI.KUnit: success for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Raag Jadav @ 2026-06-17 12:03 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, riana.tauro, michal.wajdeczko,
matthew.d.roper, mallesh.koujalagi, Raag Jadav
Currently, wedged state is serving a single usecase where the device is
permanently declared wedged, but this doesn't allow any wedged state
management for runtime usecases. In preparation of usecases which require
to facilitate temporary device wedging, convert wedged.flag to wedged.ref
which serves as a driver internal refcount for wedged state and blocks
critical path execution during device lifetime. While at it, introduce
wedged.perm which signifies permanent device wedging and operates
independent of the refcount allowing relevant cleanup action on unwind
path.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
Split from FLR series[1].
[1] https://lore.kernel.org/intel-xe/20260603101814.916948-9-raag.jadav@intel.com/
---
drivers/gpu/drm/xe/xe_device.c | 5 +++--
drivers/gpu/drm/xe/xe_device.h | 18 +++++++++++++++++-
drivers/gpu/drm/xe/xe_device_types.h | 6 ++++--
3 files changed, 24 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index ef730f2bdf32..00ade433a23b 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -916,7 +916,7 @@ static void xe_device_wedged_fini(struct drm_device *drm, void *arg)
{
struct xe_device *xe = arg;
- if (atomic_read(&xe->wedged.flag))
+ if (atomic_read(&xe->wedged.perm))
xe_pm_runtime_put(xe);
}
@@ -1421,7 +1421,8 @@ void xe_device_declare_wedged(struct xe_device *xe)
return;
}
- if (!atomic_xchg(&xe->wedged.flag, 1)) {
+ if (!atomic_xchg(&xe->wedged.perm, 1)) {
+ xe_device_wedged_get(xe);
xe->needs_flr_on_fini = true;
xe_pm_runtime_get_noresume(xe);
drm_err(&xe->drm,
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 975768a6a9c8..1aea83e3517c 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -192,9 +192,25 @@ bool xe_device_is_l2_flush_optimized(struct xe_device *xe);
void xe_device_td_flush(struct xe_device *xe);
void xe_device_l2_flush(struct xe_device *xe);
+static inline void xe_device_wedged_get(struct xe_device *xe)
+{
+ int ref;
+
+ ref = atomic_inc_return(&xe->wedged.ref);
+ xe_assert(xe, ref > 0);
+}
+
+static inline void xe_device_wedged_put(struct xe_device *xe)
+{
+ int ref;
+
+ ref = atomic_dec_return(&xe->wedged.ref);
+ xe_assert(xe, ref >= 0);
+}
+
static inline bool xe_device_wedged(struct xe_device *xe)
{
- return atomic_read(&xe->wedged.flag);
+ return atomic_read(&xe->wedged.ref);
}
void xe_device_set_wedged_method(struct xe_device *xe, unsigned long method);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 32dd2ffbc796..f13e0fb2f18e 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -485,8 +485,10 @@ struct xe_device {
/** @wedged: Struct to control Wedged States and mode */
struct {
- /** @wedged.flag: Xe device faced a critical error and is now blocked. */
- atomic_t flag;
+ /** @wedged.perm: Permanently wedged, needs cleanup on fini */
+ atomic_t perm;
+ /** @wedged.ref: Refcount for wedged device, blocks critical path execution */
+ atomic_t ref;
/** @wedged.mode: Mode controlled by kernel parameter and debugfs */
enum xe_wedged_mode mode;
/** @wedged.method: Recovery method to be sent in the drm device wedged uevent */
--
2.43.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* ✓ CI.KUnit: success for drm/xe: Improve wedged state management
2026-06-17 12:03 [PATCH v1] drm/xe: Improve wedged state management Raag Jadav
@ 2026-06-17 12:16 ` Patchwork
2026-06-17 12:54 ` ✓ Xe.CI.BAT: " Patchwork
2026-06-17 14:06 ` [PATCH v1] " Rodrigo Vivi
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2026-06-17 12:16 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Improve wedged state management
URL : https://patchwork.freedesktop.org/series/168706/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:14:55] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:14:59] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:15:30] Starting KUnit Kernel (1/1)...
[12:15:30] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:15:31] ================== guc_buf (11 subtests) ===================
[12:15:31] [PASSED] test_smallest
[12:15:31] [PASSED] test_largest
[12:15:31] [PASSED] test_granular
[12:15:31] [PASSED] test_unique
[12:15:31] [PASSED] test_overlap
[12:15:31] [PASSED] test_reusable
[12:15:31] [PASSED] test_too_big
[12:15:31] [PASSED] test_flush
[12:15:31] [PASSED] test_lookup
[12:15:31] [PASSED] test_data
[12:15:31] [PASSED] test_class
[12:15:31] ===================== [PASSED] guc_buf =====================
[12:15:31] =================== guc_dbm (7 subtests) ===================
[12:15:31] [PASSED] test_empty
[12:15:31] [PASSED] test_default
[12:15:31] ======================== test_size ========================
[12:15:31] [PASSED] 4
[12:15:31] [PASSED] 8
[12:15:31] [PASSED] 32
[12:15:31] [PASSED] 256
[12:15:31] ==================== [PASSED] test_size ====================
[12:15:31] ======================= test_reuse ========================
[12:15:31] [PASSED] 4
[12:15:31] [PASSED] 8
[12:15:31] [PASSED] 32
[12:15:31] [PASSED] 256
[12:15:31] =================== [PASSED] test_reuse ====================
[12:15:31] =================== test_range_overlap ====================
[12:15:31] [PASSED] 4
[12:15:31] [PASSED] 8
[12:15:31] [PASSED] 32
[12:15:31] [PASSED] 256
[12:15:31] =============== [PASSED] test_range_overlap ================
[12:15:31] =================== test_range_compact ====================
[12:15:31] [PASSED] 4
[12:15:31] [PASSED] 8
[12:15:31] [PASSED] 32
[12:15:31] [PASSED] 256
[12:15:31] =============== [PASSED] test_range_compact ================
[12:15:31] ==================== test_range_spare =====================
[12:15:31] [PASSED] 4
[12:15:31] [PASSED] 8
[12:15:31] [PASSED] 32
[12:15:31] [PASSED] 256
[12:15:31] ================ [PASSED] test_range_spare =================
[12:15:31] ===================== [PASSED] guc_dbm =====================
[12:15:31] =================== guc_idm (6 subtests) ===================
[12:15:31] [PASSED] bad_init
[12:15:31] [PASSED] no_init
[12:15:31] [PASSED] init_fini
[12:15:31] [PASSED] check_used
[12:15:31] [PASSED] check_quota
[12:15:31] [PASSED] check_all
[12:15:31] ===================== [PASSED] guc_idm =====================
[12:15:31] ================== no_relay (3 subtests) ===================
[12:15:31] [PASSED] xe_drops_guc2pf_if_not_ready
[12:15:31] [PASSED] xe_drops_guc2vf_if_not_ready
[12:15:31] [PASSED] xe_rejects_send_if_not_ready
[12:15:31] ==================== [PASSED] no_relay =====================
[12:15:31] ================== pf_relay (14 subtests) ==================
[12:15:31] [PASSED] pf_rejects_guc2pf_too_short
[12:15:31] [PASSED] pf_rejects_guc2pf_too_long
[12:15:31] [PASSED] pf_rejects_guc2pf_no_payload
[12:15:31] [PASSED] pf_fails_no_payload
[12:15:31] [PASSED] pf_fails_bad_origin
[12:15:31] [PASSED] pf_fails_bad_type
[12:15:31] [PASSED] pf_txn_reports_error
[12:15:31] [PASSED] pf_txn_sends_pf2guc
[12:15:31] [PASSED] pf_sends_pf2guc
[12:15:31] [SKIPPED] pf_loopback_nop
[12:15:31] [SKIPPED] pf_loopback_echo
[12:15:31] [SKIPPED] pf_loopback_fail
[12:15:31] [SKIPPED] pf_loopback_busy
[12:15:31] [SKIPPED] pf_loopback_retry
[12:15:31] ==================== [PASSED] pf_relay =====================
[12:15:31] ================== vf_relay (3 subtests) ===================
[12:15:31] [PASSED] vf_rejects_guc2vf_too_short
[12:15:31] [PASSED] vf_rejects_guc2vf_too_long
[12:15:31] [PASSED] vf_rejects_guc2vf_no_payload
[12:15:31] ==================== [PASSED] vf_relay =====================
[12:15:31] ================ pf_gt_config (9 subtests) =================
[12:15:31] [PASSED] fair_contexts_1vf
[12:15:31] [PASSED] fair_doorbells_1vf
[12:15:31] [PASSED] fair_ggtt_1vf
[12:15:31] ====================== fair_vram_1vf ======================
[12:15:31] [PASSED] 3.50 GiB
[12:15:31] [PASSED] 11.5 GiB
[12:15:31] [PASSED] 15.5 GiB
[12:15:31] [PASSED] 31.5 GiB
[12:15:31] [PASSED] 63.5 GiB
[12:15:31] [PASSED] 1.91 GiB
[12:15:31] ================== [PASSED] fair_vram_1vf ==================
[12:15:31] ================ fair_vram_1vf_admin_only =================
[12:15:31] [PASSED] 3.50 GiB
[12:15:31] [PASSED] 11.5 GiB
[12:15:31] [PASSED] 15.5 GiB
[12:15:31] [PASSED] 31.5 GiB
[12:15:31] [PASSED] 63.5 GiB
[12:15:31] [PASSED] 1.91 GiB
[12:15:31] ============ [PASSED] fair_vram_1vf_admin_only =============
[12:15:31] ====================== fair_contexts ======================
[12:15:31] [PASSED] 1 VF
[12:15:31] [PASSED] 2 VFs
[12:15:31] [PASSED] 3 VFs
[12:15:31] [PASSED] 4 VFs
[12:15:31] [PASSED] 5 VFs
[12:15:31] [PASSED] 6 VFs
[12:15:31] [PASSED] 7 VFs
[12:15:31] [PASSED] 8 VFs
[12:15:31] [PASSED] 9 VFs
[12:15:31] [PASSED] 10 VFs
[12:15:31] [PASSED] 11 VFs
[12:15:31] [PASSED] 12 VFs
[12:15:31] [PASSED] 13 VFs
[12:15:31] [PASSED] 14 VFs
[12:15:31] [PASSED] 15 VFs
[12:15:31] [PASSED] 16 VFs
[12:15:31] [PASSED] 17 VFs
[12:15:31] [PASSED] 18 VFs
[12:15:31] [PASSED] 19 VFs
[12:15:31] [PASSED] 20 VFs
[12:15:31] [PASSED] 21 VFs
[12:15:31] [PASSED] 22 VFs
[12:15:31] [PASSED] 23 VFs
[12:15:31] [PASSED] 24 VFs
[12:15:31] [PASSED] 25 VFs
[12:15:31] [PASSED] 26 VFs
[12:15:31] [PASSED] 27 VFs
[12:15:31] [PASSED] 28 VFs
[12:15:31] [PASSED] 29 VFs
[12:15:31] [PASSED] 30 VFs
[12:15:31] [PASSED] 31 VFs
[12:15:31] [PASSED] 32 VFs
[12:15:31] [PASSED] 33 VFs
[12:15:31] [PASSED] 34 VFs
[12:15:31] [PASSED] 35 VFs
[12:15:31] [PASSED] 36 VFs
[12:15:31] [PASSED] 37 VFs
[12:15:31] [PASSED] 38 VFs
[12:15:31] [PASSED] 39 VFs
[12:15:31] [PASSED] 40 VFs
[12:15:31] [PASSED] 41 VFs
[12:15:31] [PASSED] 42 VFs
[12:15:31] [PASSED] 43 VFs
[12:15:31] [PASSED] 44 VFs
[12:15:31] [PASSED] 45 VFs
[12:15:31] [PASSED] 46 VFs
[12:15:31] [PASSED] 47 VFs
[12:15:31] [PASSED] 48 VFs
[12:15:31] [PASSED] 49 VFs
[12:15:31] [PASSED] 50 VFs
[12:15:31] [PASSED] 51 VFs
[12:15:31] [PASSED] 52 VFs
[12:15:31] [PASSED] 53 VFs
[12:15:31] [PASSED] 54 VFs
[12:15:31] [PASSED] 55 VFs
[12:15:31] [PASSED] 56 VFs
[12:15:31] [PASSED] 57 VFs
[12:15:31] [PASSED] 58 VFs
[12:15:31] [PASSED] 59 VFs
[12:15:31] [PASSED] 60 VFs
[12:15:31] [PASSED] 61 VFs
[12:15:31] [PASSED] 62 VFs
[12:15:31] [PASSED] 63 VFs
[12:15:31] ================== [PASSED] fair_contexts ==================
[12:15:31] ===================== fair_doorbells ======================
[12:15:31] [PASSED] 1 VF
[12:15:31] [PASSED] 2 VFs
[12:15:31] [PASSED] 3 VFs
[12:15:31] [PASSED] 4 VFs
[12:15:31] [PASSED] 5 VFs
[12:15:31] [PASSED] 6 VFs
[12:15:31] [PASSED] 7 VFs
[12:15:31] [PASSED] 8 VFs
[12:15:31] [PASSED] 9 VFs
[12:15:31] [PASSED] 10 VFs
[12:15:31] [PASSED] 11 VFs
[12:15:31] [PASSED] 12 VFs
[12:15:31] [PASSED] 13 VFs
[12:15:31] [PASSED] 14 VFs
[12:15:31] [PASSED] 15 VFs
[12:15:31] [PASSED] 16 VFs
[12:15:31] [PASSED] 17 VFs
[12:15:31] [PASSED] 18 VFs
[12:15:31] [PASSED] 19 VFs
[12:15:31] [PASSED] 20 VFs
[12:15:31] [PASSED] 21 VFs
[12:15:31] [PASSED] 22 VFs
[12:15:31] [PASSED] 23 VFs
[12:15:31] [PASSED] 24 VFs
[12:15:31] [PASSED] 25 VFs
[12:15:31] [PASSED] 26 VFs
[12:15:31] [PASSED] 27 VFs
[12:15:31] [PASSED] 28 VFs
[12:15:31] [PASSED] 29 VFs
[12:15:31] [PASSED] 30 VFs
[12:15:31] [PASSED] 31 VFs
[12:15:31] [PASSED] 32 VFs
[12:15:31] [PASSED] 33 VFs
[12:15:31] [PASSED] 34 VFs
[12:15:31] [PASSED] 35 VFs
[12:15:31] [PASSED] 36 VFs
[12:15:31] [PASSED] 37 VFs
[12:15:31] [PASSED] 38 VFs
[12:15:31] [PASSED] 39 VFs
[12:15:31] [PASSED] 40 VFs
[12:15:31] [PASSED] 41 VFs
[12:15:31] [PASSED] 42 VFs
[12:15:31] [PASSED] 43 VFs
[12:15:31] [PASSED] 44 VFs
[12:15:31] [PASSED] 45 VFs
[12:15:31] [PASSED] 46 VFs
[12:15:31] [PASSED] 47 VFs
[12:15:31] [PASSED] 48 VFs
[12:15:31] [PASSED] 49 VFs
[12:15:31] [PASSED] 50 VFs
[12:15:31] [PASSED] 51 VFs
[12:15:31] [PASSED] 52 VFs
[12:15:31] [PASSED] 53 VFs
[12:15:31] [PASSED] 54 VFs
[12:15:31] [PASSED] 55 VFs
[12:15:31] [PASSED] 56 VFs
[12:15:31] [PASSED] 57 VFs
[12:15:31] [PASSED] 58 VFs
[12:15:31] [PASSED] 59 VFs
[12:15:31] [PASSED] 60 VFs
[12:15:31] [PASSED] 61 VFs
[12:15:31] [PASSED] 62 VFs
[12:15:31] [PASSED] 63 VFs
[12:15:31] ================= [PASSED] fair_doorbells ==================
[12:15:31] ======================== fair_ggtt ========================
[12:15:31] [PASSED] 1 VF
[12:15:31] [PASSED] 2 VFs
[12:15:31] [PASSED] 3 VFs
[12:15:31] [PASSED] 4 VFs
[12:15:31] [PASSED] 5 VFs
[12:15:31] [PASSED] 6 VFs
[12:15:31] [PASSED] 7 VFs
[12:15:31] [PASSED] 8 VFs
[12:15:31] [PASSED] 9 VFs
[12:15:31] [PASSED] 10 VFs
[12:15:31] [PASSED] 11 VFs
[12:15:31] [PASSED] 12 VFs
[12:15:31] [PASSED] 13 VFs
[12:15:31] [PASSED] 14 VFs
[12:15:31] [PASSED] 15 VFs
[12:15:31] [PASSED] 16 VFs
[12:15:31] [PASSED] 17 VFs
[12:15:31] [PASSED] 18 VFs
[12:15:31] [PASSED] 19 VFs
[12:15:31] [PASSED] 20 VFs
[12:15:31] [PASSED] 21 VFs
[12:15:31] [PASSED] 22 VFs
[12:15:31] [PASSED] 23 VFs
[12:15:31] [PASSED] 24 VFs
[12:15:31] [PASSED] 25 VFs
[12:15:31] [PASSED] 26 VFs
[12:15:31] [PASSED] 27 VFs
[12:15:31] [PASSED] 28 VFs
[12:15:31] [PASSED] 29 VFs
[12:15:31] [PASSED] 30 VFs
[12:15:31] [PASSED] 31 VFs
[12:15:31] [PASSED] 32 VFs
[12:15:31] [PASSED] 33 VFs
[12:15:31] [PASSED] 34 VFs
[12:15:31] [PASSED] 35 VFs
[12:15:31] [PASSED] 36 VFs
[12:15:31] [PASSED] 37 VFs
[12:15:31] [PASSED] 38 VFs
[12:15:31] [PASSED] 39 VFs
[12:15:31] [PASSED] 40 VFs
[12:15:31] [PASSED] 41 VFs
[12:15:31] [PASSED] 42 VFs
[12:15:31] [PASSED] 43 VFs
[12:15:31] [PASSED] 44 VFs
[12:15:31] [PASSED] 45 VFs
[12:15:31] [PASSED] 46 VFs
[12:15:31] [PASSED] 47 VFs
[12:15:31] [PASSED] 48 VFs
[12:15:31] [PASSED] 49 VFs
[12:15:31] [PASSED] 50 VFs
[12:15:31] [PASSED] 51 VFs
[12:15:31] [PASSED] 52 VFs
[12:15:31] [PASSED] 53 VFs
[12:15:31] [PASSED] 54 VFs
[12:15:31] [PASSED] 55 VFs
[12:15:31] [PASSED] 56 VFs
[12:15:31] [PASSED] 57 VFs
[12:15:31] [PASSED] 58 VFs
[12:15:31] [PASSED] 59 VFs
[12:15:31] [PASSED] 60 VFs
[12:15:31] [PASSED] 61 VFs
[12:15:31] [PASSED] 62 VFs
[12:15:31] [PASSED] 63 VFs
[12:15:31] ==================== [PASSED] fair_ggtt ====================
[12:15:31] ======================== fair_vram ========================
[12:15:31] [PASSED] 1 VF
[12:15:31] [PASSED] 2 VFs
[12:15:31] [PASSED] 3 VFs
[12:15:31] [PASSED] 4 VFs
[12:15:31] [PASSED] 5 VFs
[12:15:31] [PASSED] 6 VFs
[12:15:31] [PASSED] 7 VFs
[12:15:31] [PASSED] 8 VFs
[12:15:31] [PASSED] 9 VFs
[12:15:31] [PASSED] 10 VFs
[12:15:31] [PASSED] 11 VFs
[12:15:31] [PASSED] 12 VFs
[12:15:31] [PASSED] 13 VFs
[12:15:31] [PASSED] 14 VFs
[12:15:31] [PASSED] 15 VFs
[12:15:31] [PASSED] 16 VFs
[12:15:31] [PASSED] 17 VFs
[12:15:31] [PASSED] 18 VFs
[12:15:31] [PASSED] 19 VFs
[12:15:31] [PASSED] 20 VFs
[12:15:31] [PASSED] 21 VFs
[12:15:31] [PASSED] 22 VFs
[12:15:31] [PASSED] 23 VFs
[12:15:31] [PASSED] 24 VFs
[12:15:31] [PASSED] 25 VFs
[12:15:31] [PASSED] 26 VFs
[12:15:31] [PASSED] 27 VFs
[12:15:31] [PASSED] 28 VFs
[12:15:31] [PASSED] 29 VFs
[12:15:31] [PASSED] 30 VFs
[12:15:31] [PASSED] 31 VFs
[12:15:31] [PASSED] 32 VFs
[12:15:31] [PASSED] 33 VFs
[12:15:31] [PASSED] 34 VFs
[12:15:31] [PASSED] 35 VFs
[12:15:31] [PASSED] 36 VFs
[12:15:31] [PASSED] 37 VFs
[12:15:31] [PASSED] 38 VFs
[12:15:31] [PASSED] 39 VFs
[12:15:31] [PASSED] 40 VFs
[12:15:31] [PASSED] 41 VFs
[12:15:31] [PASSED] 42 VFs
[12:15:31] [PASSED] 43 VFs
[12:15:31] [PASSED] 44 VFs
[12:15:31] [PASSED] 45 VFs
[12:15:31] [PASSED] 46 VFs
[12:15:31] [PASSED] 47 VFs
[12:15:31] [PASSED] 48 VFs
[12:15:31] [PASSED] 49 VFs
[12:15:31] [PASSED] 50 VFs
[12:15:31] [PASSED] 51 VFs
[12:15:31] [PASSED] 52 VFs
[12:15:31] [PASSED] 53 VFs
[12:15:31] [PASSED] 54 VFs
[12:15:31] [PASSED] 55 VFs
[12:15:31] [PASSED] 56 VFs
[12:15:31] [PASSED] 57 VFs
[12:15:31] [PASSED] 58 VFs
[12:15:31] [PASSED] 59 VFs
[12:15:31] [PASSED] 60 VFs
[12:15:31] [PASSED] 61 VFs
[12:15:31] [PASSED] 62 VFs
[12:15:31] [PASSED] 63 VFs
[12:15:31] ==================== [PASSED] fair_vram ====================
[12:15:31] ================== [PASSED] pf_gt_config ===================
[12:15:31] ===================== lmtt (1 subtest) =====================
[12:15:31] ======================== test_ops =========================
[12:15:31] [PASSED] 2-level
[12:15:31] [PASSED] multi-level
[12:15:31] ==================== [PASSED] test_ops =====================
[12:15:31] ====================== [PASSED] lmtt =======================
[12:15:31] ================= pf_service (11 subtests) =================
[12:15:31] [PASSED] pf_negotiate_any
[12:15:31] [PASSED] pf_negotiate_base_match
[12:15:31] [PASSED] pf_negotiate_base_newer
[12:15:31] [PASSED] pf_negotiate_base_next
[12:15:31] [SKIPPED] pf_negotiate_base_older
[12:15:31] [PASSED] pf_negotiate_base_prev
[12:15:31] [PASSED] pf_negotiate_latest_match
[12:15:31] [PASSED] pf_negotiate_latest_newer
[12:15:31] [PASSED] pf_negotiate_latest_next
[12:15:31] [SKIPPED] pf_negotiate_latest_older
[12:15:31] [SKIPPED] pf_negotiate_latest_prev
[12:15:31] =================== [PASSED] pf_service ====================
[12:15:31] ================= xe_guc_g2g (2 subtests) ==================
[12:15:31] ============== xe_live_guc_g2g_kunit_default ==============
[12:15:31] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[12:15:31] ============== xe_live_guc_g2g_kunit_allmem ===============
[12:15:31] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[12:15:31] =================== [SKIPPED] xe_guc_g2g ===================
[12:15:31] =================== xe_mocs (2 subtests) ===================
[12:15:31] ================ xe_live_mocs_kernel_kunit ================
[12:15:31] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:15:31] ================ xe_live_mocs_reset_kunit =================
[12:15:31] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:15:31] ==================== [SKIPPED] xe_mocs =====================
[12:15:31] ================= xe_migrate (2 subtests) ==================
[12:15:31] ================= xe_migrate_sanity_kunit =================
[12:15:31] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:15:31] ================== xe_validate_ccs_kunit ==================
[12:15:31] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:15:31] =================== [SKIPPED] xe_migrate ===================
[12:15:31] ================== xe_dma_buf (1 subtest) ==================
[12:15:31] ==================== xe_dma_buf_kunit =====================
[12:15:31] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:15:31] =================== [SKIPPED] xe_dma_buf ===================
[12:15:31] ================= xe_bo_shrink (1 subtest) =================
[12:15:31] =================== xe_bo_shrink_kunit ====================
[12:15:31] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:15:31] ================== [SKIPPED] xe_bo_shrink ==================
[12:15:31] ==================== xe_bo (2 subtests) ====================
[12:15:31] ================== xe_ccs_migrate_kunit ===================
[12:15:31] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:15:31] ==================== xe_bo_evict_kunit ====================
[12:15:31] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:15:31] ===================== [SKIPPED] xe_bo ======================
[12:15:31] ==================== args (13 subtests) ====================
[12:15:31] [PASSED] count_args_test
[12:15:31] [PASSED] call_args_example
[12:15:31] [PASSED] call_args_test
[12:15:31] [PASSED] drop_first_arg_example
[12:15:31] [PASSED] drop_first_arg_test
[12:15:31] [PASSED] first_arg_example
[12:15:31] [PASSED] first_arg_test
[12:15:31] [PASSED] last_arg_example
[12:15:31] [PASSED] last_arg_test
[12:15:31] [PASSED] pick_arg_example
[12:15:31] [PASSED] if_args_example
[12:15:31] [PASSED] if_args_test
[12:15:31] [PASSED] sep_comma_example
[12:15:31] ====================== [PASSED] args =======================
[12:15:31] =================== xe_pci (3 subtests) ====================
[12:15:31] ==================== check_graphics_ip ====================
[12:15:31] [PASSED] 12.00 Xe_LP
[12:15:31] [PASSED] 12.10 Xe_LP+
[12:15:31] [PASSED] 12.55 Xe_HPG
[12:15:31] [PASSED] 12.60 Xe_HPC
[12:15:31] [PASSED] 12.70 Xe_LPG
[12:15:31] [PASSED] 12.71 Xe_LPG
[12:15:31] [PASSED] 12.74 Xe_LPG+
[12:15:31] [PASSED] 20.01 Xe2_HPG
[12:15:31] [PASSED] 20.02 Xe2_HPG
[12:15:31] [PASSED] 20.04 Xe2_LPG
[12:15:31] [PASSED] 30.00 Xe3_LPG
[12:15:31] [PASSED] 30.01 Xe3_LPG
[12:15:31] [PASSED] 30.03 Xe3_LPG
[12:15:31] [PASSED] 30.04 Xe3_LPG
[12:15:31] [PASSED] 30.05 Xe3_LPG
[12:15:31] [PASSED] 35.10 Xe3p_LPG
[12:15:31] [PASSED] 35.11 Xe3p_XPC
[12:15:31] ================ [PASSED] check_graphics_ip ================
[12:15:31] ===================== check_media_ip ======================
[12:15:31] [PASSED] 12.00 Xe_M
[12:15:31] [PASSED] 12.55 Xe_HPM
[12:15:31] [PASSED] 13.00 Xe_LPM+
[12:15:31] [PASSED] 13.01 Xe2_HPM
[12:15:31] [PASSED] 20.00 Xe2_LPM
[12:15:31] [PASSED] 30.00 Xe3_LPM
[12:15:31] [PASSED] 30.02 Xe3_LPM
[12:15:31] [PASSED] 35.00 Xe3p_LPM
[12:15:31] [PASSED] 35.03 Xe3p_HPM
[12:15:31] ================= [PASSED] check_media_ip ==================
[12:15:31] =================== check_platform_desc ===================
[12:15:31] [PASSED] 0x9A60 (TIGERLAKE)
[12:15:31] [PASSED] 0x9A68 (TIGERLAKE)
[12:15:31] [PASSED] 0x9A70 (TIGERLAKE)
[12:15:31] [PASSED] 0x9A40 (TIGERLAKE)
[12:15:31] [PASSED] 0x9A49 (TIGERLAKE)
[12:15:31] [PASSED] 0x9A59 (TIGERLAKE)
[12:15:31] [PASSED] 0x9A78 (TIGERLAKE)
[12:15:31] [PASSED] 0x9AC0 (TIGERLAKE)
[12:15:31] [PASSED] 0x9AC9 (TIGERLAKE)
[12:15:31] [PASSED] 0x9AD9 (TIGERLAKE)
[12:15:31] [PASSED] 0x9AF8 (TIGERLAKE)
[12:15:31] [PASSED] 0x4C80 (ROCKETLAKE)
[12:15:31] [PASSED] 0x4C8A (ROCKETLAKE)
[12:15:31] [PASSED] 0x4C8B (ROCKETLAKE)
[12:15:31] [PASSED] 0x4C8C (ROCKETLAKE)
[12:15:31] [PASSED] 0x4C90 (ROCKETLAKE)
[12:15:31] [PASSED] 0x4C9A (ROCKETLAKE)
[12:15:31] [PASSED] 0x4680 (ALDERLAKE_S)
[12:15:31] [PASSED] 0x4682 (ALDERLAKE_S)
[12:15:31] [PASSED] 0x4688 (ALDERLAKE_S)
[12:15:31] [PASSED] 0x468A (ALDERLAKE_S)
[12:15:31] [PASSED] 0x468B (ALDERLAKE_S)
[12:15:31] [PASSED] 0x4690 (ALDERLAKE_S)
[12:15:31] [PASSED] 0x4692 (ALDERLAKE_S)
[12:15:31] [PASSED] 0x4693 (ALDERLAKE_S)
[12:15:31] [PASSED] 0x46A0 (ALDERLAKE_P)
[12:15:31] [PASSED] 0x46A1 (ALDERLAKE_P)
[12:15:31] [PASSED] 0x46A2 (ALDERLAKE_P)
[12:15:31] [PASSED] 0x46A3 (ALDERLAKE_P)
[12:15:31] [PASSED] 0x46A6 (ALDERLAKE_P)
[12:15:31] [PASSED] 0x46A8 (ALDERLAKE_P)
[12:15:31] [PASSED] 0x46AA (ALDERLAKE_P)
[12:15:31] [PASSED] 0x462A (ALDERLAKE_P)
[12:15:31] [PASSED] 0x4626 (ALDERLAKE_P)
[12:15:31] [PASSED] 0x4628 (ALDERLAKE_P)
[12:15:31] [PASSED] 0x46B0 (ALDERLAKE_P)
[12:15:31] [PASSED] 0x46B1 (ALDERLAKE_P)
[12:15:31] [PASSED] 0x46B2 (ALDERLAKE_P)
[12:15:31] [PASSED] 0x46B3 (ALDERLAKE_P)
[12:15:31] [PASSED] 0x46C0 (ALDERLAKE_P)
[12:15:31] [PASSED] 0x46C1 (ALDERLAKE_P)
[12:15:31] [PASSED] 0x46C2 (ALDERLAKE_P)
[12:15:31] [PASSED] 0x46C3 (ALDERLAKE_P)
[12:15:31] [PASSED] 0x46D0 (ALDERLAKE_N)
[12:15:31] [PASSED] 0x46D1 (ALDERLAKE_N)
[12:15:31] [PASSED] 0x46D2 (ALDERLAKE_N)
[12:15:31] [PASSED] 0x46D3 (ALDERLAKE_N)
[12:15:31] [PASSED] 0x46D4 (ALDERLAKE_N)
[12:15:31] [PASSED] 0xA721 (ALDERLAKE_P)
[12:15:31] [PASSED] 0xA7A1 (ALDERLAKE_P)
[12:15:31] [PASSED] 0xA7A9 (ALDERLAKE_P)
[12:15:31] [PASSED] 0xA7AC (ALDERLAKE_P)
[12:15:31] [PASSED] 0xA7AD (ALDERLAKE_P)
[12:15:31] [PASSED] 0xA720 (ALDERLAKE_P)
[12:15:31] [PASSED] 0xA7A0 (ALDERLAKE_P)
[12:15:31] [PASSED] 0xA7A8 (ALDERLAKE_P)
[12:15:31] [PASSED] 0xA7AA (ALDERLAKE_P)
[12:15:31] [PASSED] 0xA7AB (ALDERLAKE_P)
[12:15:31] [PASSED] 0xA780 (ALDERLAKE_S)
[12:15:31] [PASSED] 0xA781 (ALDERLAKE_S)
[12:15:31] [PASSED] 0xA782 (ALDERLAKE_S)
[12:15:31] [PASSED] 0xA783 (ALDERLAKE_S)
[12:15:31] [PASSED] 0xA788 (ALDERLAKE_S)
[12:15:31] [PASSED] 0xA789 (ALDERLAKE_S)
[12:15:31] [PASSED] 0xA78A (ALDERLAKE_S)
[12:15:31] [PASSED] 0xA78B (ALDERLAKE_S)
[12:15:31] [PASSED] 0x4905 (DG1)
[12:15:31] [PASSED] 0x4906 (DG1)
[12:15:31] [PASSED] 0x4907 (DG1)
[12:15:31] [PASSED] 0x4908 (DG1)
[12:15:31] [PASSED] 0x4909 (DG1)
[12:15:31] [PASSED] 0x56C0 (DG2)
[12:15:31] [PASSED] 0x56C2 (DG2)
[12:15:31] [PASSED] 0x56C1 (DG2)
[12:15:31] [PASSED] 0x7D51 (METEORLAKE)
[12:15:31] [PASSED] 0x7DD1 (METEORLAKE)
[12:15:31] [PASSED] 0x7D41 (METEORLAKE)
[12:15:31] [PASSED] 0x7D67 (METEORLAKE)
[12:15:31] [PASSED] 0xB640 (METEORLAKE)
[12:15:31] [PASSED] 0x56A0 (DG2)
[12:15:31] [PASSED] 0x56A1 (DG2)
[12:15:31] [PASSED] 0x56A2 (DG2)
[12:15:31] [PASSED] 0x56BE (DG2)
[12:15:31] [PASSED] 0x56BF (DG2)
[12:15:31] [PASSED] 0x5690 (DG2)
[12:15:31] [PASSED] 0x5691 (DG2)
[12:15:31] [PASSED] 0x5692 (DG2)
[12:15:31] [PASSED] 0x56A5 (DG2)
[12:15:31] [PASSED] 0x56A6 (DG2)
[12:15:31] [PASSED] 0x56B0 (DG2)
[12:15:31] [PASSED] 0x56B1 (DG2)
[12:15:31] [PASSED] 0x56BA (DG2)
[12:15:31] [PASSED] 0x56BB (DG2)
[12:15:31] [PASSED] 0x56BC (DG2)
[12:15:31] [PASSED] 0x56BD (DG2)
[12:15:31] [PASSED] 0x5693 (DG2)
[12:15:31] [PASSED] 0x5694 (DG2)
[12:15:31] [PASSED] 0x5695 (DG2)
[12:15:31] [PASSED] 0x56A3 (DG2)
[12:15:31] [PASSED] 0x56A4 (DG2)
[12:15:31] [PASSED] 0x56B2 (DG2)
[12:15:31] [PASSED] 0x56B3 (DG2)
[12:15:31] [PASSED] 0x5696 (DG2)
[12:15:31] [PASSED] 0x5697 (DG2)
[12:15:31] [PASSED] 0xB69 (PVC)
[12:15:31] [PASSED] 0xB6E (PVC)
[12:15:31] [PASSED] 0xBD4 (PVC)
[12:15:31] [PASSED] 0xBD5 (PVC)
[12:15:31] [PASSED] 0xBD6 (PVC)
[12:15:31] [PASSED] 0xBD7 (PVC)
[12:15:31] [PASSED] 0xBD8 (PVC)
[12:15:31] [PASSED] 0xBD9 (PVC)
[12:15:31] [PASSED] 0xBDA (PVC)
[12:15:31] [PASSED] 0xBDB (PVC)
[12:15:31] [PASSED] 0xBE0 (PVC)
[12:15:31] [PASSED] 0xBE1 (PVC)
[12:15:31] [PASSED] 0xBE5 (PVC)
[12:15:31] [PASSED] 0x7D40 (METEORLAKE)
[12:15:31] [PASSED] 0x7D45 (METEORLAKE)
[12:15:31] [PASSED] 0x7D55 (METEORLAKE)
[12:15:31] [PASSED] 0x7D60 (METEORLAKE)
[12:15:31] [PASSED] 0x7DD5 (METEORLAKE)
[12:15:31] [PASSED] 0x6420 (LUNARLAKE)
[12:15:31] [PASSED] 0x64A0 (LUNARLAKE)
[12:15:31] [PASSED] 0x64B0 (LUNARLAKE)
[12:15:31] [PASSED] 0xE202 (BATTLEMAGE)
[12:15:31] [PASSED] 0xE209 (BATTLEMAGE)
[12:15:31] [PASSED] 0xE20B (BATTLEMAGE)
[12:15:31] [PASSED] 0xE20C (BATTLEMAGE)
[12:15:31] [PASSED] 0xE20D (BATTLEMAGE)
[12:15:31] [PASSED] 0xE210 (BATTLEMAGE)
[12:15:31] [PASSED] 0xE211 (BATTLEMAGE)
[12:15:31] [PASSED] 0xE212 (BATTLEMAGE)
[12:15:31] [PASSED] 0xE216 (BATTLEMAGE)
[12:15:31] [PASSED] 0xE220 (BATTLEMAGE)
[12:15:31] [PASSED] 0xE221 (BATTLEMAGE)
[12:15:31] [PASSED] 0xE222 (BATTLEMAGE)
[12:15:31] [PASSED] 0xE223 (BATTLEMAGE)
[12:15:31] [PASSED] 0xB080 (PANTHERLAKE)
[12:15:31] [PASSED] 0xB081 (PANTHERLAKE)
[12:15:31] [PASSED] 0xB082 (PANTHERLAKE)
[12:15:31] [PASSED] 0xB083 (PANTHERLAKE)
[12:15:31] [PASSED] 0xB084 (PANTHERLAKE)
[12:15:31] [PASSED] 0xB085 (PANTHERLAKE)
[12:15:31] [PASSED] 0xB086 (PANTHERLAKE)
[12:15:31] [PASSED] 0xB087 (PANTHERLAKE)
[12:15:31] [PASSED] 0xB08F (PANTHERLAKE)
[12:15:31] [PASSED] 0xB090 (PANTHERLAKE)
[12:15:31] [PASSED] 0xB0A0 (PANTHERLAKE)
[12:15:31] [PASSED] 0xB0B0 (PANTHERLAKE)
[12:15:31] [PASSED] 0xFD80 (PANTHERLAKE)
[12:15:31] [PASSED] 0xFD81 (PANTHERLAKE)
[12:15:31] [PASSED] 0xD740 (NOVALAKE_S)
[12:15:31] [PASSED] 0xD741 (NOVALAKE_S)
[12:15:31] [PASSED] 0xD742 (NOVALAKE_S)
[12:15:31] [PASSED] 0xD743 (NOVALAKE_S)
[12:15:31] [PASSED] 0xD745 (NOVALAKE_S)
[12:15:31] [PASSED] 0xD74A (NOVALAKE_S)
[12:15:31] [PASSED] 0xD74B (NOVALAKE_S)
[12:15:31] [PASSED] 0x674C (CRESCENTISLAND)
[12:15:31] [PASSED] 0x674D (CRESCENTISLAND)
[12:15:31] [PASSED] 0x674E (CRESCENTISLAND)
[12:15:31] [PASSED] 0x674F (CRESCENTISLAND)
[12:15:31] [PASSED] 0x6750 (CRESCENTISLAND)
[12:15:31] [PASSED] 0xD750 (NOVALAKE_P)
[12:15:31] [PASSED] 0xD751 (NOVALAKE_P)
[12:15:31] [PASSED] 0xD752 (NOVALAKE_P)
[12:15:31] [PASSED] 0xD753 (NOVALAKE_P)
[12:15:31] [PASSED] 0xD754 (NOVALAKE_P)
[12:15:31] [PASSED] 0xD755 (NOVALAKE_P)
[12:15:31] [PASSED] 0xD756 (NOVALAKE_P)
[12:15:31] [PASSED] 0xD757 (NOVALAKE_P)
[12:15:31] [PASSED] 0xD75F (NOVALAKE_P)
[12:15:31] =============== [PASSED] check_platform_desc ===============
[12:15:31] ===================== [PASSED] xe_pci ======================
[12:15:31] ============= xe_rtp_tables_test (4 subtests) ==============
[12:15:31] ================== xe_rtp_table_gt_test ===================
[12:15:31] [PASSED] gt_was/14011060649
[12:15:31] [PASSED] gt_was/14011059788
[12:15:31] [PASSED] gt_was/14015795083
[12:15:31] [PASSED] gt_was/16021867713
[12:15:31] [PASSED] gt_was/14019449301
[12:15:31] [PASSED] gt_was/16028005424
[12:15:31] [PASSED] gt_was/14026578760
[12:15:31] [PASSED] gt_was/1409420604
[12:15:31] [PASSED] gt_was/1408615072
[12:15:31] [PASSED] gt_was/22010523718
[12:15:31] [PASSED] gt_was/14011006942
[12:15:31] [PASSED] gt_was/14014830051
[12:15:31] [PASSED] gt_was/18018781329
[12:15:31] [PASSED] gt_was/1509235366
[12:15:31] [PASSED] gt_was/18018781329
[12:15:31] [PASSED] gt_was/16016694945
[12:15:31] [PASSED] gt_was/14018575942
[12:15:31] [PASSED] gt_was/22016670082
[12:15:31] [PASSED] gt_was/22016670082
[12:15:31] [PASSED] gt_was/14017421178
[12:15:31] [PASSED] gt_was/16025250150
[12:15:31] [PASSED] gt_was/14021871409
[12:15:31] [PASSED] gt_was/16021865536
[12:15:31] [PASSED] gt_was/14021486841
[12:15:31] [PASSED] gt_was/14025160223
[12:15:31] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[12:15:31] [PASSED] gt_was/14025635424
[12:15:31] [PASSED] gt_was/16028005424
[12:15:31] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:15:31] ================== xe_rtp_table_gt_test ===================
[12:15:31] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[12:15:31] [PASSED] gt_tunings/Tuning: 32B Access Enable
[12:15:31] [PASSED] gt_tunings/Tuning: L3 cache
[12:15:31] [PASSED] gt_tunings/Tuning: L3 cache - media
[12:15:31] [PASSED] gt_tunings/Tuning: Compression Overfetch
[12:15:31] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[12:15:31] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[12:15:31] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[12:15:31] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[12:15:31] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[12:15:31] [PASSED] gt_tunings/Tuning: Stateless compression control
[12:15:31] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[12:15:31] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[12:15:31] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[12:15:31] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[12:15:31] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:15:31] ================== xe_rtp_table_oob_test ==================
[12:15:31] [PASSED] oob_was/1607983814
[12:15:31] [PASSED] oob_was/16010904313
[12:15:31] [PASSED] oob_was/18022495364
[12:15:31] [PASSED] oob_was/22012773006
[12:15:31] [PASSED] oob_was/14014475959
[12:15:31] [PASSED] oob_was/22011391025
[12:15:31] [PASSED] oob_was/22012727170
[12:15:31] [PASSED] oob_was/22012727685
[12:15:31] [PASSED] oob_was/22016596838
[12:15:31] [PASSED] oob_was/18020744125
[12:15:31] [PASSED] oob_was/1409600907
[12:15:31] [PASSED] oob_was/22014953428
[12:15:31] [PASSED] oob_was/16017236439
[12:15:31] [PASSED] oob_was/14019821291
[12:15:31] [PASSED] oob_was/14015076503
[12:15:31] [PASSED] oob_was/14018913170
[12:15:31] [PASSED] oob_was/14018094691
[12:15:31] [PASSED] oob_was/18024947630
[12:15:31] [PASSED] oob_was/16022287689
[12:15:31] [PASSED] oob_was/13011645652
[12:15:31] [PASSED] oob_was/14022293748
[12:15:31] [PASSED] oob_was/22019794406
[12:15:31] [PASSED] oob_was/22019338487
[12:15:31] [PASSED] oob_was/16023588340
[12:15:31] [PASSED] oob_was/14019789679
[12:15:31] [PASSED] oob_was/14022866841
[12:15:31] [PASSED] oob_was/16021333562
[12:15:31] [PASSED] oob_was/14016712196
[12:15:31] [PASSED] oob_was/14015568240
[12:15:31] [PASSED] oob_was/18013179988
[12:15:31] [PASSED] oob_was/1508761755
[12:15:31] [PASSED] oob_was/16023105232
[12:15:31] [PASSED] oob_was/16026508708
[12:15:31] [PASSED] oob_was/14020001231
[12:15:31] [PASSED] oob_was/16023683509
[12:15:31] [PASSED] oob_was/14025515070
[12:15:31] [PASSED] oob_was/15015404425_disable
[12:15:31] [PASSED] oob_was/16026007364
[12:15:31] [PASSED] oob_was/14020316580
[12:15:31] [PASSED] oob_was/14025883347
[12:15:31] [PASSED] oob_was/16029380221
[12:15:31] ============== [PASSED] xe_rtp_table_oob_test ==============
[12:15:31] ================ xe_rtp_table_dev_oob_test ================
[12:15:31] [PASSED] device_oob_was/22010954014
[12:15:31] [PASSED] device_oob_was/15015404425
[12:15:31] [PASSED] device_oob_was/22019338487_display
[12:15:31] [PASSED] device_oob_was/14022085890
[12:15:31] [PASSED] device_oob_was/14026539277
[12:15:31] [PASSED] device_oob_was/14026633728
[12:15:31] [PASSED] device_oob_was/14026746987
[12:15:31] [PASSED] device_oob_was/14026779378
[12:15:31] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[12:15:31] =============== [PASSED] xe_rtp_tables_test ================
[12:15:31] =================== xe_rtp (3 subtests) ====================
[12:15:31] =================== xe_rtp_rules_tests ====================
[12:15:31] [PASSED] no
[12:15:31] [PASSED] yes
[12:15:31] [PASSED] no-and-no
[12:15:31] [PASSED] no-and-yes
[12:15:31] [PASSED] yes-and-no
[12:15:31] [PASSED] yes-and-yes
[12:15:31] [PASSED] no-or-no
[12:15:31] [PASSED] no-or-yes
[12:15:31] [PASSED] yes-or-no
[12:15:31] [PASSED] yes-or-yes
[12:15:31] [PASSED] no-yes-or-yes-no
[12:15:31] [PASSED] no-yes-or-yes-yes
[12:15:31] [PASSED] yes-yes-or-no-yes
[12:15:31] [PASSED] yes-yes-or-yes-yes
[12:15:31] [PASSED] no-no-or-yes-or-no
[12:15:31] [PASSED] or
[12:15:31] [PASSED] or-yes
[12:15:31] [PASSED] or-no
[12:15:31] [PASSED] yes-or
[12:15:31] [PASSED] no-or
[12:15:31] [PASSED] no-or-or-yes
[12:15:31] [PASSED] yes-or-or-no
[12:15:31] [PASSED] no-or-or-no
[12:15:31] [PASSED] missing-context-engine-class
[12:15:31] [PASSED] missing-context-engine-class-or-yes
[12:15:31] [PASSED] missing-context-engine-class-or-or-yes
[12:15:31] =============== [PASSED] xe_rtp_rules_tests ================
[12:15:31] =============== xe_rtp_process_to_sr_tests ================
[12:15:31] [PASSED] coalesce-same-reg
[12:15:31] [PASSED] no-match-no-add
[12:15:31] [PASSED] two-regs-two-entries
[12:15:31] [PASSED] clr-one-set-other
[12:15:31] [PASSED] set-field
[12:15:31] [PASSED] conflict-duplicate
[12:15:31] [PASSED] conflict-not-disjoint
[12:15:31] [PASSED] conflict-reg-type
[12:15:31] [PASSED] bad-mcr-reg-forced-to-regular
[12:15:31] [PASSED] bad-regular-reg-forced-to-mcr
[12:15:31] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:15:31] ================== xe_rtp_process_tests ===================
[12:15:31] [PASSED] active1
[12:15:31] [PASSED] active2
[12:15:31] [PASSED] active-inactive
[12:15:31] [PASSED] inactive-active
[12:15:31] [PASSED] inactive-active-inactive
[12:15:31] [PASSED] inactive-inactive-inactive
[12:15:31] ============== [PASSED] xe_rtp_process_tests ===============
[12:15:31] ===================== [PASSED] xe_rtp ======================
[12:15:31] ==================== xe_wa (1 subtest) =====================
[12:15:31] ======================== xe_wa_gt =========================
[12:15:31] [PASSED] TIGERLAKE B0
[12:15:31] [PASSED] DG1 A0
[12:15:31] [PASSED] DG1 B0
[12:15:31] [PASSED] ALDERLAKE_S A0
[12:15:31] [PASSED] ALDERLAKE_S B0
[12:15:31] [PASSED] ALDERLAKE_S C0
[12:15:31] [PASSED] ALDERLAKE_S D0
[12:15:31] [PASSED] ALDERLAKE_P A0
[12:15:31] [PASSED] ALDERLAKE_P B0
[12:15:31] [PASSED] ALDERLAKE_P C0
[12:15:31] [PASSED] ALDERLAKE_S RPLS D0
[12:15:31] [PASSED] ALDERLAKE_P RPLU E0
[12:15:31] [PASSED] DG2 G10 C0
[12:15:31] [PASSED] DG2 G11 B1
[12:15:31] [PASSED] DG2 G12 A1
[12:15:31] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:15:31] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:15:31] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[12:15:31] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[12:15:31] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[12:15:31] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[12:15:31] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[12:15:31] ==================== [PASSED] xe_wa_gt =====================
[12:15:31] ====================== [PASSED] xe_wa ======================
[12:15:31] ============================================================
[12:15:31] Testing complete. Ran 717 tests: passed: 699, skipped: 18
[12:15:31] Elapsed time: 36.145s total, 4.278s configuring, 31.201s building, 0.637s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:15:31] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:15:33] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:15:57] Starting KUnit Kernel (1/1)...
[12:15:57] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:15:57] ============ drm_test_pick_cmdline (2 subtests) ============
[12:15:57] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[12:15:57] =============== drm_test_pick_cmdline_named ===============
[12:15:57] [PASSED] NTSC
[12:15:57] [PASSED] NTSC-J
[12:15:57] [PASSED] PAL
[12:15:57] [PASSED] PAL-M
[12:15:57] =========== [PASSED] drm_test_pick_cmdline_named ===========
[12:15:57] ============== [PASSED] drm_test_pick_cmdline ==============
[12:15:57] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[12:15:57] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[12:15:57] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[12:15:57] =========== drm_validate_clone_mode (2 subtests) ===========
[12:15:57] ============== drm_test_check_in_clone_mode ===============
[12:15:57] [PASSED] in_clone_mode
[12:15:57] [PASSED] not_in_clone_mode
[12:15:57] ========== [PASSED] drm_test_check_in_clone_mode ===========
[12:15:57] =============== drm_test_check_valid_clones ===============
[12:15:57] [PASSED] not_in_clone_mode
[12:15:57] [PASSED] valid_clone
[12:15:57] [PASSED] invalid_clone
[12:15:57] =========== [PASSED] drm_test_check_valid_clones ===========
[12:15:57] ============= [PASSED] drm_validate_clone_mode =============
[12:15:57] ============= drm_validate_modeset (1 subtest) =============
[12:15:57] [PASSED] drm_test_check_connector_changed_modeset
[12:15:57] ============== [PASSED] drm_validate_modeset ===============
[12:15:57] ====== drm_test_bridge_get_current_state (2 subtests) ======
[12:15:57] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[12:15:57] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[12:15:57] ======== [PASSED] drm_test_bridge_get_current_state ========
[12:15:57] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[12:15:57] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[12:15:57] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[12:15:57] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[12:15:57] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[12:15:57] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[12:15:57] ============== drm_bridge_alloc (2 subtests) ===============
[12:15:57] [PASSED] drm_test_drm_bridge_alloc_basic
[12:15:57] [PASSED] drm_test_drm_bridge_alloc_get_put
[12:15:57] ================ [PASSED] drm_bridge_alloc =================
[12:15:57] ============= drm_bridge_bus_fmt (5 subtests) ==============
[12:15:57] [PASSED] drm_test_bridge_rgb_yuv_rgb
[12:15:57] [PASSED] drm_test_bridge_must_convert_to_yuv444
[12:15:57] [PASSED] drm_test_bridge_hdmi_auto_rgb
[12:15:57] [PASSED] drm_test_bridge_auto_first
[12:15:57] [PASSED] drm_test_bridge_rgb_yuv_no_path
[12:15:57] =============== [PASSED] drm_bridge_bus_fmt ================
[12:15:57] ============= drm_cmdline_parser (40 subtests) =============
[12:15:57] [PASSED] drm_test_cmdline_force_d_only
[12:15:57] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:15:57] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:15:57] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:15:57] [PASSED] drm_test_cmdline_force_e_only
[12:15:57] [PASSED] drm_test_cmdline_res
[12:15:57] [PASSED] drm_test_cmdline_res_vesa
[12:15:57] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:15:57] [PASSED] drm_test_cmdline_res_rblank
[12:15:57] [PASSED] drm_test_cmdline_res_bpp
[12:15:57] [PASSED] drm_test_cmdline_res_refresh
[12:15:57] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:15:57] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:15:57] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:15:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:15:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:15:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:15:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:15:57] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:15:57] [PASSED] drm_test_cmdline_res_margins_force_on
[12:15:57] [PASSED] drm_test_cmdline_res_vesa_margins
[12:15:57] [PASSED] drm_test_cmdline_name
[12:15:57] [PASSED] drm_test_cmdline_name_bpp
[12:15:57] [PASSED] drm_test_cmdline_name_option
[12:15:57] [PASSED] drm_test_cmdline_name_bpp_option
[12:15:57] [PASSED] drm_test_cmdline_rotate_0
[12:15:57] [PASSED] drm_test_cmdline_rotate_90
[12:15:57] [PASSED] drm_test_cmdline_rotate_180
[12:15:57] [PASSED] drm_test_cmdline_rotate_270
[12:15:57] [PASSED] drm_test_cmdline_hmirror
[12:15:57] [PASSED] drm_test_cmdline_vmirror
[12:15:57] [PASSED] drm_test_cmdline_margin_options
[12:15:57] [PASSED] drm_test_cmdline_multiple_options
[12:15:57] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:15:57] [PASSED] drm_test_cmdline_extra_and_option
[12:15:57] [PASSED] drm_test_cmdline_freestanding_options
[12:15:57] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:15:57] [PASSED] drm_test_cmdline_panel_orientation
[12:15:57] ================ drm_test_cmdline_invalid =================
[12:15:57] [PASSED] margin_only
[12:15:57] [PASSED] interlace_only
[12:15:57] [PASSED] res_missing_x
[12:15:57] [PASSED] res_missing_y
[12:15:57] [PASSED] res_bad_y
[12:15:57] [PASSED] res_missing_y_bpp
[12:15:57] [PASSED] res_bad_bpp
[12:15:57] [PASSED] res_bad_refresh
[12:15:57] [PASSED] res_bpp_refresh_force_on_off
[12:15:57] [PASSED] res_invalid_mode
[12:15:57] [PASSED] res_bpp_wrong_place_mode
[12:15:57] [PASSED] name_bpp_refresh
[12:15:57] [PASSED] name_refresh
[12:15:57] [PASSED] name_refresh_wrong_mode
[12:15:57] [PASSED] name_refresh_invalid_mode
[12:15:57] [PASSED] rotate_multiple
[12:15:57] [PASSED] rotate_invalid_val
[12:15:57] [PASSED] rotate_truncated
[12:15:57] [PASSED] invalid_option
[12:15:57] [PASSED] invalid_tv_option
[12:15:57] [PASSED] truncated_tv_option
[12:15:57] ============ [PASSED] drm_test_cmdline_invalid =============
[12:15:57] =============== drm_test_cmdline_tv_options ===============
[12:15:57] [PASSED] NTSC
[12:15:57] [PASSED] NTSC_443
[12:15:57] [PASSED] NTSC_J
[12:15:57] [PASSED] PAL
[12:15:57] [PASSED] PAL_M
[12:15:57] [PASSED] PAL_N
[12:15:57] [PASSED] SECAM
[12:15:57] [PASSED] MONO_525
[12:15:57] [PASSED] MONO_625
[12:15:57] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:15:57] =============== [PASSED] drm_cmdline_parser ================
[12:15:57] ========== drmm_connector_hdmi_init (20 subtests) ==========
[12:15:57] [PASSED] drm_test_connector_hdmi_init_valid
[12:15:57] [PASSED] drm_test_connector_hdmi_init_bpc_8
[12:15:57] [PASSED] drm_test_connector_hdmi_init_bpc_10
[12:15:57] [PASSED] drm_test_connector_hdmi_init_bpc_12
[12:15:57] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[12:15:57] [PASSED] drm_test_connector_hdmi_init_bpc_null
[12:15:57] [PASSED] drm_test_connector_hdmi_init_formats_empty
[12:15:57] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[12:15:57] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:15:57] [PASSED] supported_formats=0x9 yuv420_allowed=1
[12:15:57] [PASSED] supported_formats=0x9 yuv420_allowed=0
[12:15:57] [PASSED] supported_formats=0x5 yuv420_allowed=1
[12:15:57] [PASSED] supported_formats=0x5 yuv420_allowed=0
[12:15:57] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:15:57] [PASSED] drm_test_connector_hdmi_init_null_ddc
[12:15:57] [PASSED] drm_test_connector_hdmi_init_null_product
[12:15:57] [PASSED] drm_test_connector_hdmi_init_null_vendor
[12:15:57] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[12:15:57] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[12:15:57] [PASSED] drm_test_connector_hdmi_init_product_valid
[12:15:57] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[12:15:57] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[12:15:57] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[12:15:57] ========= drm_test_connector_hdmi_init_type_valid =========
[12:15:57] [PASSED] HDMI-A
[12:15:57] [PASSED] HDMI-B
[12:15:57] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[12:15:57] ======== drm_test_connector_hdmi_init_type_invalid ========
[12:15:57] [PASSED] Unknown
[12:15:57] [PASSED] VGA
[12:15:57] [PASSED] DVI-I
[12:15:57] [PASSED] DVI-D
[12:15:57] [PASSED] DVI-A
[12:15:57] [PASSED] Composite
[12:15:57] [PASSED] SVIDEO
[12:15:57] [PASSED] LVDS
[12:15:57] [PASSED] Component
[12:15:57] [PASSED] DIN
[12:15:57] [PASSED] DP
[12:15:57] [PASSED] TV
[12:15:57] [PASSED] eDP
[12:15:57] [PASSED] Virtual
[12:15:57] [PASSED] DSI
[12:15:57] [PASSED] DPI
[12:15:57] [PASSED] Writeback
[12:15:57] [PASSED] SPI
[12:15:57] [PASSED] USB
[12:15:57] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[12:15:57] ============ [PASSED] drmm_connector_hdmi_init =============
[12:15:57] ============= drmm_connector_init (3 subtests) =============
[12:15:57] [PASSED] drm_test_drmm_connector_init
[12:15:57] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:15:57] ========= drm_test_drmm_connector_init_type_valid =========
[12:15:57] [PASSED] Unknown
[12:15:57] [PASSED] VGA
[12:15:57] [PASSED] DVI-I
[12:15:57] [PASSED] DVI-D
[12:15:57] [PASSED] DVI-A
[12:15:57] [PASSED] Composite
[12:15:57] [PASSED] SVIDEO
[12:15:57] [PASSED] LVDS
[12:15:57] [PASSED] Component
[12:15:57] [PASSED] DIN
[12:15:57] [PASSED] DP
[12:15:57] [PASSED] HDMI-A
[12:15:57] [PASSED] HDMI-B
[12:15:57] [PASSED] TV
[12:15:57] [PASSED] eDP
[12:15:57] [PASSED] Virtual
[12:15:57] [PASSED] DSI
[12:15:57] [PASSED] DPI
[12:15:57] [PASSED] Writeback
[12:15:57] [PASSED] SPI
[12:15:57] [PASSED] USB
[12:15:57] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:15:57] =============== [PASSED] drmm_connector_init ===============
[12:15:57] ========= drm_connector_dynamic_init (6 subtests) ==========
[12:15:57] [PASSED] drm_test_drm_connector_dynamic_init
[12:15:57] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[12:15:57] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[12:15:57] [PASSED] drm_test_drm_connector_dynamic_init_properties
[12:15:57] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[12:15:57] [PASSED] Unknown
[12:15:57] [PASSED] VGA
[12:15:57] [PASSED] DVI-I
[12:15:57] [PASSED] DVI-D
[12:15:57] [PASSED] DVI-A
[12:15:57] [PASSED] Composite
[12:15:57] [PASSED] SVIDEO
[12:15:57] [PASSED] LVDS
[12:15:57] [PASSED] Component
[12:15:57] [PASSED] DIN
[12:15:57] [PASSED] DP
[12:15:57] [PASSED] HDMI-A
[12:15:57] [PASSED] HDMI-B
[12:15:57] [PASSED] TV
[12:15:57] [PASSED] eDP
[12:15:57] [PASSED] Virtual
[12:15:57] [PASSED] DSI
[12:15:57] [PASSED] DPI
[12:15:57] [PASSED] Writeback
[12:15:57] [PASSED] SPI
[12:15:57] [PASSED] USB
[12:15:57] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[12:15:57] ======== drm_test_drm_connector_dynamic_init_name =========
[12:15:57] [PASSED] Unknown
[12:15:57] [PASSED] VGA
[12:15:57] [PASSED] DVI-I
[12:15:57] [PASSED] DVI-D
[12:15:57] [PASSED] DVI-A
[12:15:57] [PASSED] Composite
[12:15:57] [PASSED] SVIDEO
[12:15:57] [PASSED] LVDS
[12:15:57] [PASSED] Component
[12:15:57] [PASSED] DIN
[12:15:57] [PASSED] DP
[12:15:57] [PASSED] HDMI-A
[12:15:57] [PASSED] HDMI-B
[12:15:57] [PASSED] TV
[12:15:57] [PASSED] eDP
[12:15:57] [PASSED] Virtual
[12:15:57] [PASSED] DSI
[12:15:57] [PASSED] DPI
[12:15:57] [PASSED] Writeback
[12:15:57] [PASSED] SPI
[12:15:57] [PASSED] USB
[12:15:57] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[12:15:57] =========== [PASSED] drm_connector_dynamic_init ============
[12:15:57] ==== drm_connector_dynamic_register_early (4 subtests) =====
[12:15:57] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[12:15:57] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[12:15:57] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[12:15:57] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[12:15:57] ====== [PASSED] drm_connector_dynamic_register_early =======
[12:15:57] ======= drm_connector_dynamic_register (7 subtests) ========
[12:15:57] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[12:15:57] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[12:15:57] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[12:15:57] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[12:15:57] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[12:15:57] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[12:15:57] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[12:15:57] ========= [PASSED] drm_connector_dynamic_register ==========
[12:15:57] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[12:15:57] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[12:15:57] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[12:15:57] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[12:15:57] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:15:57] ========== drm_test_get_tv_mode_from_name_valid ===========
[12:15:57] [PASSED] NTSC
[12:15:57] [PASSED] NTSC-443
[12:15:57] [PASSED] NTSC-J
[12:15:57] [PASSED] PAL
[12:15:57] [PASSED] PAL-M
[12:15:57] [PASSED] PAL-N
[12:15:57] [PASSED] SECAM
[12:15:57] [PASSED] Mono
[12:15:57] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:15:57] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:15:57] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:15:57] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[12:15:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[12:15:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[12:15:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[12:15:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[12:15:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[12:15:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[12:15:57] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[12:15:57] [PASSED] VIC 96
[12:15:57] [PASSED] VIC 97
[12:15:57] [PASSED] VIC 101
[12:15:57] [PASSED] VIC 102
[12:15:57] [PASSED] VIC 106
[12:15:57] [PASSED] VIC 107
[12:15:57] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[12:15:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[12:15:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[12:15:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[12:15:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[12:15:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[12:15:57] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[12:15:57] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[12:15:57] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[12:15:57] [PASSED] Automatic
[12:15:57] [PASSED] Full
[12:15:57] [PASSED] Limited 16:235
[12:15:57] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[12:15:57] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[12:15:57] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[12:15:57] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[12:15:57] === drm_test_drm_hdmi_connector_get_output_format_name ====
[12:15:57] [PASSED] RGB
[12:15:57] [PASSED] YUV 4:2:0
[12:15:57] [PASSED] YUV 4:2:2
[12:15:57] [PASSED] YUV 4:4:4
[12:15:57] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[12:15:57] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[12:15:57] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[12:15:57] ============= drm_damage_helper (21 subtests) ==============
[12:15:57] [PASSED] drm_test_damage_iter_no_damage
[12:15:57] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:15:57] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:15:57] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:15:57] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:15:57] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:15:57] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:15:57] [PASSED] drm_test_damage_iter_simple_damage
[12:15:57] [PASSED] drm_test_damage_iter_single_damage
[12:15:57] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:15:57] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:15:57] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:15:57] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:15:57] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:15:57] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:15:57] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:15:57] [PASSED] drm_test_damage_iter_damage
[12:15:57] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:15:57] [PASSED] drm_test_damage_iter_damage_one_outside
[12:15:57] [PASSED] drm_test_damage_iter_damage_src_moved
[12:15:57] [PASSED] drm_test_damage_iter_damage_not_visible
[12:15:57] ================ [PASSED] drm_damage_helper ================
[12:15:57] ============== drm_dp_mst_helper (3 subtests) ==============
[12:15:57] ============== drm_test_dp_mst_calc_pbn_mode ==============
[12:15:57] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:15:57] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:15:57] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:15:57] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:15:57] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:15:57] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:15:57] ============== drm_test_dp_mst_calc_pbn_div ===============
[12:15:57] [PASSED] Link rate 2000000 lane count 4
[12:15:57] [PASSED] Link rate 2000000 lane count 2
[12:15:57] [PASSED] Link rate 2000000 lane count 1
[12:15:57] [PASSED] Link rate 1350000 lane count 4
[12:15:57] [PASSED] Link rate 1350000 lane count 2
[12:15:57] [PASSED] Link rate 1350000 lane count 1
[12:15:57] [PASSED] Link rate 1000000 lane count 4
[12:15:57] [PASSED] Link rate 1000000 lane count 2
[12:15:57] [PASSED] Link rate 1000000 lane count 1
[12:15:57] [PASSED] Link rate 810000 lane count 4
[12:15:57] [PASSED] Link rate 810000 lane count 2
[12:15:57] [PASSED] Link rate 810000 lane count 1
[12:15:57] [PASSED] Link rate 540000 lane count 4
[12:15:57] [PASSED] Link rate 540000 lane count 2
[12:15:57] [PASSED] Link rate 540000 lane count 1
[12:15:57] [PASSED] Link rate 270000 lane count 4
[12:15:57] [PASSED] Link rate 270000 lane count 2
[12:15:57] [PASSED] Link rate 270000 lane count 1
[12:15:57] [PASSED] Link rate 162000 lane count 4
[12:15:57] [PASSED] Link rate 162000 lane count 2
[12:15:57] [PASSED] Link rate 162000 lane count 1
[12:15:57] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:15:57] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[12:15:57] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:15:57] [PASSED] DP_POWER_UP_PHY with port number
[12:15:57] [PASSED] DP_POWER_DOWN_PHY with port number
[12:15:57] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:15:57] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:15:57] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:15:57] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:15:57] [PASSED] DP_QUERY_PAYLOAD with port number
[12:15:57] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:15:57] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:15:57] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:15:57] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:15:57] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:15:57] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:15:57] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:15:57] [PASSED] DP_REMOTE_I2C_READ with port number
[12:15:57] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:15:57] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:15:57] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:15:57] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:15:57] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:15:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:15:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:15:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:15:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:15:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:15:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:15:57] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:15:57] ================ [PASSED] drm_dp_mst_helper ================
[12:15:57] ================== drm_exec (7 subtests) ===================
[12:15:57] [PASSED] sanitycheck
[12:15:57] [PASSED] test_lock
[12:15:57] [PASSED] test_lock_unlock
[12:15:57] [PASSED] test_duplicates
[12:15:57] [PASSED] test_prepare
[12:15:57] [PASSED] test_prepare_array
[12:15:57] [PASSED] test_multiple_loops
[12:15:57] ==================== [PASSED] drm_exec =====================
[12:15:57] =========== drm_format_helper_test (17 subtests) ===========
[12:15:57] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[12:15:57] [PASSED] single_pixel_source_buffer
[12:15:57] [PASSED] single_pixel_clip_rectangle
[12:15:57] [PASSED] well_known_colors
[12:15:57] [PASSED] destination_pitch
[12:15:57] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:15:57] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[12:15:57] [PASSED] single_pixel_source_buffer
[12:15:57] [PASSED] single_pixel_clip_rectangle
[12:15:57] [PASSED] well_known_colors
[12:15:57] [PASSED] destination_pitch
[12:15:57] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:15:57] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[12:15:57] [PASSED] single_pixel_source_buffer
[12:15:57] [PASSED] single_pixel_clip_rectangle
[12:15:57] [PASSED] well_known_colors
[12:15:57] [PASSED] destination_pitch
[12:15:57] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:15:57] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[12:15:57] [PASSED] single_pixel_source_buffer
[12:15:57] [PASSED] single_pixel_clip_rectangle
[12:15:57] [PASSED] well_known_colors
[12:15:57] [PASSED] destination_pitch
[12:15:57] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:15:57] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[12:15:57] [PASSED] single_pixel_source_buffer
[12:15:57] [PASSED] single_pixel_clip_rectangle
[12:15:57] [PASSED] well_known_colors
[12:15:57] [PASSED] destination_pitch
[12:15:57] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:15:57] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[12:15:57] [PASSED] single_pixel_source_buffer
[12:15:57] [PASSED] single_pixel_clip_rectangle
[12:15:57] [PASSED] well_known_colors
[12:15:57] [PASSED] destination_pitch
[12:15:57] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:15:57] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[12:15:57] [PASSED] single_pixel_source_buffer
[12:15:57] [PASSED] single_pixel_clip_rectangle
[12:15:57] [PASSED] well_known_colors
[12:15:57] [PASSED] destination_pitch
[12:15:57] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:15:57] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[12:15:57] [PASSED] single_pixel_source_buffer
[12:15:57] [PASSED] single_pixel_clip_rectangle
[12:15:57] [PASSED] well_known_colors
[12:15:57] [PASSED] destination_pitch
[12:15:57] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[12:15:57] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[12:15:57] [PASSED] single_pixel_source_buffer
[12:15:57] [PASSED] single_pixel_clip_rectangle
[12:15:57] [PASSED] well_known_colors
[12:15:57] [PASSED] destination_pitch
[12:15:57] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:15:57] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[12:15:57] [PASSED] single_pixel_source_buffer
[12:15:57] [PASSED] single_pixel_clip_rectangle
[12:15:57] [PASSED] well_known_colors
[12:15:57] [PASSED] destination_pitch
[12:15:57] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:15:57] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[12:15:57] [PASSED] single_pixel_source_buffer
[12:15:57] [PASSED] single_pixel_clip_rectangle
[12:15:57] [PASSED] well_known_colors
[12:15:57] [PASSED] destination_pitch
[12:15:57] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:15:57] ============== drm_test_fb_xrgb8888_to_mono ===============
[12:15:57] [PASSED] single_pixel_source_buffer
[12:15:57] [PASSED] single_pixel_clip_rectangle
[12:15:57] [PASSED] well_known_colors
[12:15:57] [PASSED] destination_pitch
[12:15:57] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:15:57] ==================== drm_test_fb_swab =====================
[12:15:57] [PASSED] single_pixel_source_buffer
[12:15:57] [PASSED] single_pixel_clip_rectangle
[12:15:57] [PASSED] well_known_colors
[12:15:57] [PASSED] destination_pitch
[12:15:57] ================ [PASSED] drm_test_fb_swab =================
[12:15:57] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[12:15:57] [PASSED] single_pixel_source_buffer
[12:15:57] [PASSED] single_pixel_clip_rectangle
[12:15:57] [PASSED] well_known_colors
[12:15:57] [PASSED] destination_pitch
[12:15:57] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:15:57] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[12:15:57] [PASSED] single_pixel_source_buffer
[12:15:57] [PASSED] single_pixel_clip_rectangle
[12:15:57] [PASSED] well_known_colors
[12:15:57] [PASSED] destination_pitch
[12:15:57] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:15:57] ================= drm_test_fb_clip_offset =================
[12:15:57] [PASSED] pass through
[12:15:57] [PASSED] horizontal offset
[12:15:57] [PASSED] vertical offset
[12:15:57] [PASSED] horizontal and vertical offset
[12:15:57] [PASSED] horizontal offset (custom pitch)
[12:15:57] [PASSED] vertical offset (custom pitch)
[12:15:57] [PASSED] horizontal and vertical offset (custom pitch)
[12:15:57] ============= [PASSED] drm_test_fb_clip_offset =============
[12:15:57] =================== drm_test_fb_memcpy ====================
[12:15:57] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:15:57] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:15:57] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:15:57] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:15:57] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:15:57] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:15:57] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:15:57] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:15:57] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:15:57] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:15:57] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:15:57] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:15:57] =============== [PASSED] drm_test_fb_memcpy ================
[12:15:57] ============= [PASSED] drm_format_helper_test ==============
[12:15:57] ================= drm_format (18 subtests) =================
[12:15:57] [PASSED] drm_test_format_block_width_invalid
[12:15:57] [PASSED] drm_test_format_block_width_one_plane
[12:15:57] [PASSED] drm_test_format_block_width_two_plane
[12:15:57] [PASSED] drm_test_format_block_width_three_plane
[12:15:57] [PASSED] drm_test_format_block_width_tiled
[12:15:57] [PASSED] drm_test_format_block_height_invalid
[12:15:57] [PASSED] drm_test_format_block_height_one_plane
[12:15:57] [PASSED] drm_test_format_block_height_two_plane
[12:15:57] [PASSED] drm_test_format_block_height_three_plane
[12:15:57] [PASSED] drm_test_format_block_height_tiled
[12:15:57] [PASSED] drm_test_format_min_pitch_invalid
[12:15:57] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:15:57] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:15:57] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:15:57] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:15:57] [PASSED] drm_test_format_min_pitch_two_plane
[12:15:57] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:15:57] [PASSED] drm_test_format_min_pitch_tiled
[12:15:57] =================== [PASSED] drm_format ====================
[12:15:57] ============== drm_framebuffer (10 subtests) ===============
[12:15:57] ========== drm_test_framebuffer_check_src_coords ==========
[12:15:57] [PASSED] Success: source fits into fb
[12:15:57] [PASSED] Fail: overflowing fb with x-axis coordinate
[12:15:57] [PASSED] Fail: overflowing fb with y-axis coordinate
[12:15:57] [PASSED] Fail: overflowing fb with source width
[12:15:57] [PASSED] Fail: overflowing fb with source height
[12:15:57] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[12:15:57] [PASSED] drm_test_framebuffer_cleanup
[12:15:57] =============== drm_test_framebuffer_create ===============
[12:15:57] [PASSED] ABGR8888 normal sizes
[12:15:57] [PASSED] ABGR8888 max sizes
[12:15:57] [PASSED] ABGR8888 pitch greater than min required
[12:15:57] [PASSED] ABGR8888 pitch less than min required
[12:15:57] [PASSED] ABGR8888 Invalid width
[12:15:57] [PASSED] ABGR8888 Invalid buffer handle
[12:15:57] [PASSED] No pixel format
[12:15:57] [PASSED] ABGR8888 Width 0
[12:15:57] [PASSED] ABGR8888 Height 0
[12:15:57] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:15:57] [PASSED] ABGR8888 Large buffer offset
[12:15:57] [PASSED] ABGR8888 Buffer offset for inexistent plane
[12:15:57] [PASSED] ABGR8888 Invalid flag
[12:15:57] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:15:57] [PASSED] ABGR8888 Valid buffer modifier
[12:15:57] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:15:57] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:15:57] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:15:57] [PASSED] NV12 Normal sizes
[12:15:57] [PASSED] NV12 Max sizes
[12:15:57] [PASSED] NV12 Invalid pitch
[12:15:57] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:15:57] [PASSED] NV12 different modifier per-plane
[12:15:57] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:15:57] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:15:57] [PASSED] NV12 Modifier for inexistent plane
[12:15:57] [PASSED] NV12 Handle for inexistent plane
[12:15:57] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:15:57] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:15:57] [PASSED] YVU420 Normal sizes
[12:15:57] [PASSED] YVU420 Max sizes
[12:15:57] [PASSED] YVU420 Invalid pitch
[12:15:57] [PASSED] YVU420 Different pitches
[12:15:57] [PASSED] YVU420 Different buffer offsets/pitches
[12:15:57] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:15:57] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:15:57] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:15:57] [PASSED] YVU420 Valid modifier
[12:15:57] [PASSED] YVU420 Different modifiers per plane
[12:15:57] [PASSED] YVU420 Modifier for inexistent plane
[12:15:57] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[12:15:57] [PASSED] X0L2 Normal sizes
[12:15:57] [PASSED] X0L2 Max sizes
[12:15:57] [PASSED] X0L2 Invalid pitch
[12:15:57] [PASSED] X0L2 Pitch greater than minimum required
[12:15:57] [PASSED] X0L2 Handle for inexistent plane
[12:15:57] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:15:57] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:15:57] [PASSED] X0L2 Valid modifier
[12:15:57] [PASSED] X0L2 Modifier for inexistent plane
[12:15:57] =========== [PASSED] drm_test_framebuffer_create ===========
[12:15:57] [PASSED] drm_test_framebuffer_free
[12:15:57] [PASSED] drm_test_framebuffer_init
[12:15:57] [PASSED] drm_test_framebuffer_init_bad_format
[12:15:57] [PASSED] drm_test_framebuffer_init_dev_mismatch
[12:15:57] [PASSED] drm_test_framebuffer_lookup
[12:15:57] [PASSED] drm_test_framebuffer_lookup_inexistent
[12:15:57] [PASSED] drm_test_framebuffer_modifiers_not_supported
[12:15:57] ================= [PASSED] drm_framebuffer =================
[12:15:57] ================ drm_gem_shmem (8 subtests) ================
[12:15:57] [PASSED] drm_gem_shmem_test_obj_create
[12:15:57] [PASSED] drm_gem_shmem_test_obj_create_private
[12:15:57] [PASSED] drm_gem_shmem_test_pin_pages
[12:15:57] [PASSED] drm_gem_shmem_test_vmap
[12:15:57] [PASSED] drm_gem_shmem_test_get_sg_table
[12:15:57] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:15:57] [PASSED] drm_gem_shmem_test_madvise
[12:15:57] [PASSED] drm_gem_shmem_test_purge
[12:15:57] ================== [PASSED] drm_gem_shmem ==================
[12:15:57] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[12:15:57] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[12:15:57] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[12:15:57] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[12:15:57] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[12:15:57] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[12:15:57] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[12:15:57] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[12:15:57] [PASSED] Automatic
[12:15:57] [PASSED] Full
[12:15:57] [PASSED] Limited 16:235
[12:15:57] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[12:15:57] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[12:15:57] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[12:15:57] [PASSED] drm_test_check_disable_connector
[12:15:57] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[12:15:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[12:15:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[12:15:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[12:15:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[12:15:57] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[12:15:57] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[12:15:57] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[12:15:57] [PASSED] drm_test_check_output_bpc_dvi
[12:15:57] [PASSED] drm_test_check_output_bpc_format_vic_1
[12:15:57] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[12:15:57] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[12:15:57] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[12:15:57] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[12:15:57] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[12:15:57] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[12:15:57] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[12:15:57] ============ drm_test_check_hdmi_color_format =============
[12:15:57] [PASSED] AUTO -> RGB
[12:15:57] [PASSED] YCBCR422 -> YUV422
[12:15:57] [PASSED] YCBCR420 -> YUV420
[12:15:57] [PASSED] YCBCR444 -> YUV444
[12:15:57] [PASSED] RGB -> RGB
[12:15:57] ======== [PASSED] drm_test_check_hdmi_color_format =========
[12:15:57] ======== drm_test_check_hdmi_color_format_420_only ========
[12:15:57] [PASSED] RGB should fail
[12:15:57] [PASSED] YUV444 should fail
[12:15:57] [PASSED] YUV422 should fail
[12:15:57] [PASSED] YUV420 should work
[12:15:57] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[12:15:57] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[12:15:57] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[12:15:57] [PASSED] drm_test_check_broadcast_rgb_value
[12:15:57] [PASSED] drm_test_check_bpc_8_value
[12:15:57] [PASSED] drm_test_check_bpc_10_value
[12:15:57] [PASSED] drm_test_check_bpc_12_value
[12:15:57] [PASSED] drm_test_check_format_value
[12:15:57] [PASSED] drm_test_check_tmds_char_value
[12:15:57] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[12:15:57] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[12:15:57] [PASSED] drm_test_check_mode_valid
[12:15:57] [PASSED] drm_test_check_mode_valid_reject
[12:15:57] [PASSED] drm_test_check_mode_valid_reject_rate
[12:15:57] [PASSED] drm_test_check_mode_valid_reject_max_clock
[12:15:57] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[12:15:57] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[12:15:57] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[12:15:57] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[12:15:57] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[12:15:57] [PASSED] drm_test_check_infoframes
[12:15:57] [PASSED] drm_test_check_reject_avi_infoframe
[12:15:57] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[12:15:57] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[12:15:57] [PASSED] drm_test_check_reject_audio_infoframe
[12:15:57] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[12:15:57] ================= drm_managed (2 subtests) =================
[12:15:57] [PASSED] drm_test_managed_release_action
[12:15:57] [PASSED] drm_test_managed_run_action
[12:15:57] =================== [PASSED] drm_managed ===================
[12:15:57] =================== drm_mm (6 subtests) ====================
[12:15:57] [PASSED] drm_test_mm_init
[12:15:57] [PASSED] drm_test_mm_debug
[12:15:57] [PASSED] drm_test_mm_align32
[12:15:57] [PASSED] drm_test_mm_align64
[12:15:57] [PASSED] drm_test_mm_lowest
[12:15:57] [PASSED] drm_test_mm_highest
[12:15:57] ===================== [PASSED] drm_mm ======================
[12:15:57] ============= drm_modes_analog_tv (5 subtests) =============
[12:15:57] [PASSED] drm_test_modes_analog_tv_mono_576i
[12:15:57] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:15:57] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:15:57] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:15:57] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:15:57] =============== [PASSED] drm_modes_analog_tv ===============
[12:15:57] ============== drm_plane_helper (2 subtests) ===============
[12:15:57] =============== drm_test_check_plane_state ================
[12:15:57] [PASSED] clipping_simple
[12:15:57] [PASSED] clipping_rotate_reflect
[12:15:57] [PASSED] positioning_simple
[12:15:57] [PASSED] upscaling
[12:15:57] [PASSED] downscaling
[12:15:57] [PASSED] rounding1
[12:15:57] [PASSED] rounding2
[12:15:57] [PASSED] rounding3
[12:15:57] [PASSED] rounding4
[12:15:57] =========== [PASSED] drm_test_check_plane_state ============
[12:15:57] =========== drm_test_check_invalid_plane_state ============
[12:15:57] [PASSED] positioning_invalid
[12:15:57] [PASSED] upscaling_invalid
[12:15:57] [PASSED] downscaling_invalid
[12:15:57] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:15:57] ================ [PASSED] drm_plane_helper =================
[12:15:57] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:15:57] ====== drm_test_connector_helper_tv_get_modes_check =======
[12:15:57] [PASSED] None
[12:15:57] [PASSED] PAL
[12:15:57] [PASSED] NTSC
[12:15:57] [PASSED] Both, NTSC Default
[12:15:57] [PASSED] Both, PAL Default
[12:15:57] [PASSED] Both, NTSC Default, with PAL on command-line
[12:15:57] [PASSED] Both, PAL Default, with NTSC on command-line
[12:15:57] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:15:57] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:15:57] ================== drm_rect (9 subtests) ===================
[12:15:57] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:15:57] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:15:57] [PASSED] drm_test_rect_clip_scaled_clipped
[12:15:57] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[12:15:57] ================= drm_test_rect_intersect =================
[12:15:57] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:15:57] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:15:57] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:15:57] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:15:57] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:15:57] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:15:57] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:15:57] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:15:57] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:15:57] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:15:57] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:15:57] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:15:57] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:15:57] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:15:57] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:15:57] ============= [PASSED] drm_test_rect_intersect =============
[12:15:57] ================ drm_test_rect_calc_hscale ================
[12:15:57] [PASSED] normal use
[12:15:57] [PASSED] out of max range
[12:15:57] [PASSED] out of min range
[12:15:57] [PASSED] zero dst
[12:15:57] [PASSED] negative src
[12:15:57] [PASSED] negative dst
[12:15:57] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:15:57] ================ drm_test_rect_calc_vscale ================
[12:15:57] [PASSED] normal use
[12:15:57] [PASSED] out of max range
[12:15:57] [PASSED] out of min range
[12:15:57] [PASSED] zero dst
[12:15:57] [PASSED] negative src
[12:15:57] [PASSED] negative dst
[12:15:57] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:15:57] ================== drm_test_rect_rotate ===================
[12:15:57] [PASSED] reflect-x
[12:15:57] [PASSED] reflect-y
[12:15:57] [PASSED] rotate-0
[12:15:57] [PASSED] rotate-90
[12:15:57] [PASSED] rotate-180
[12:15:57] [PASSED] rotate-270
[12:15:57] ============== [PASSED] drm_test_rect_rotate ===============
[12:15:57] ================ drm_test_rect_rotate_inv =================
[12:15:57] [PASSED] reflect-x
[12:15:57] [PASSED] reflect-y
[12:15:57] [PASSED] rotate-0
[12:15:57] [PASSED] rotate-90
[12:15:57] [PASSED] rotate-180
[12:15:57] [PASSED] rotate-270
[12:15:57] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:15:57] ==================== [PASSED] drm_rect =====================
[12:15:57] ============ drm_sysfb_modeset_test (1 subtest) ============
[12:15:57] ============ drm_test_sysfb_build_fourcc_list =============
[12:15:57] [PASSED] no native formats
[12:15:57] [PASSED] XRGB8888 as native format
[12:15:57] [PASSED] remove duplicates
[12:15:57] [PASSED] convert alpha formats
[12:15:57] [PASSED] random formats
[12:15:57] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[12:15:57] ============= [PASSED] drm_sysfb_modeset_test ==============
[12:15:57] ================== drm_fixp (2 subtests) ===================
[12:15:57] [PASSED] drm_test_int2fixp
[12:15:57] [PASSED] drm_test_sm2fixp
[12:15:57] ==================== [PASSED] drm_fixp =====================
[12:15:57] ============================================================
[12:15:57] Testing complete. Ran 639 tests: passed: 639
[12:15:57] Elapsed time: 26.099s total, 1.722s configuring, 24.209s building, 0.150s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[12:15:57] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:15:59] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:16:09] Starting KUnit Kernel (1/1)...
[12:16:09] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:16:09] ================= ttm_device (5 subtests) ==================
[12:16:09] [PASSED] ttm_device_init_basic
[12:16:09] [PASSED] ttm_device_init_multiple
[12:16:09] [PASSED] ttm_device_fini_basic
[12:16:09] [PASSED] ttm_device_init_no_vma_man
[12:16:09] ================== ttm_device_init_pools ==================
[12:16:09] [PASSED] No DMA allocations, no DMA32 required
[12:16:09] [PASSED] DMA allocations, DMA32 required
[12:16:09] [PASSED] No DMA allocations, DMA32 required
[12:16:09] [PASSED] DMA allocations, no DMA32 required
[12:16:09] ============== [PASSED] ttm_device_init_pools ==============
[12:16:09] =================== [PASSED] ttm_device ====================
[12:16:09] ================== ttm_pool (8 subtests) ===================
[12:16:09] ================== ttm_pool_alloc_basic ===================
[12:16:09] [PASSED] One page
[12:16:09] [PASSED] More than one page
[12:16:09] [PASSED] Above the allocation limit
[12:16:09] [PASSED] One page, with coherent DMA mappings enabled
[12:16:09] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:16:09] ============== [PASSED] ttm_pool_alloc_basic ===============
[12:16:09] ============== ttm_pool_alloc_basic_dma_addr ==============
[12:16:09] [PASSED] One page
[12:16:09] [PASSED] More than one page
[12:16:09] [PASSED] Above the allocation limit
[12:16:09] [PASSED] One page, with coherent DMA mappings enabled
[12:16:09] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:16:09] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[12:16:09] [PASSED] ttm_pool_alloc_order_caching_match
[12:16:09] [PASSED] ttm_pool_alloc_caching_mismatch
[12:16:09] [PASSED] ttm_pool_alloc_order_mismatch
[12:16:09] [PASSED] ttm_pool_free_dma_alloc
[12:16:09] [PASSED] ttm_pool_free_no_dma_alloc
[12:16:09] [PASSED] ttm_pool_fini_basic
[12:16:09] ==================== [PASSED] ttm_pool =====================
[12:16:09] ================ ttm_resource (8 subtests) =================
[12:16:09] ================= ttm_resource_init_basic =================
[12:16:09] [PASSED] Init resource in TTM_PL_SYSTEM
[12:16:09] [PASSED] Init resource in TTM_PL_VRAM
[12:16:09] [PASSED] Init resource in a private placement
[12:16:09] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[12:16:09] ============= [PASSED] ttm_resource_init_basic =============
[12:16:09] [PASSED] ttm_resource_init_pinned
[12:16:09] [PASSED] ttm_resource_fini_basic
[12:16:09] [PASSED] ttm_resource_manager_init_basic
[12:16:09] [PASSED] ttm_resource_manager_usage_basic
[12:16:09] [PASSED] ttm_resource_manager_set_used_basic
[12:16:09] [PASSED] ttm_sys_man_alloc_basic
[12:16:09] [PASSED] ttm_sys_man_free_basic
[12:16:09] ================== [PASSED] ttm_resource ===================
[12:16:09] =================== ttm_tt (15 subtests) ===================
[12:16:09] ==================== ttm_tt_init_basic ====================
[12:16:09] [PASSED] Page-aligned size
[12:16:09] [PASSED] Extra pages requested
[12:16:09] ================ [PASSED] ttm_tt_init_basic ================
[12:16:09] [PASSED] ttm_tt_init_misaligned
[12:16:09] [PASSED] ttm_tt_fini_basic
[12:16:09] [PASSED] ttm_tt_fini_sg
[12:16:09] [PASSED] ttm_tt_fini_shmem
[12:16:09] [PASSED] ttm_tt_create_basic
[12:16:09] [PASSED] ttm_tt_create_invalid_bo_type
[12:16:09] [PASSED] ttm_tt_create_ttm_exists
[12:16:09] [PASSED] ttm_tt_create_failed
[12:16:09] [PASSED] ttm_tt_destroy_basic
[12:16:09] [PASSED] ttm_tt_populate_null_ttm
[12:16:09] [PASSED] ttm_tt_populate_populated_ttm
[12:16:09] [PASSED] ttm_tt_unpopulate_basic
[12:16:09] [PASSED] ttm_tt_unpopulate_empty_ttm
[12:16:09] [PASSED] ttm_tt_swapin_basic
[12:16:09] ===================== [PASSED] ttm_tt ======================
[12:16:09] =================== ttm_bo (14 subtests) ===================
[12:16:09] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[12:16:09] [PASSED] Cannot be interrupted and sleeps
[12:16:09] [PASSED] Cannot be interrupted, locks straight away
[12:16:09] [PASSED] Can be interrupted, sleeps
[12:16:09] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[12:16:09] [PASSED] ttm_bo_reserve_locked_no_sleep
[12:16:09] [PASSED] ttm_bo_reserve_no_wait_ticket
[12:16:09] [PASSED] ttm_bo_reserve_double_resv
[12:16:09] [PASSED] ttm_bo_reserve_interrupted
[12:16:09] [PASSED] ttm_bo_reserve_deadlock
[12:16:09] [PASSED] ttm_bo_unreserve_basic
[12:16:09] [PASSED] ttm_bo_unreserve_pinned
[12:16:09] [PASSED] ttm_bo_unreserve_bulk
[12:16:09] [PASSED] ttm_bo_fini_basic
[12:16:09] [PASSED] ttm_bo_fini_shared_resv
[12:16:09] [PASSED] ttm_bo_pin_basic
[12:16:09] [PASSED] ttm_bo_pin_unpin_resource
[12:16:09] [PASSED] ttm_bo_multiple_pin_one_unpin
[12:16:09] ===================== [PASSED] ttm_bo ======================
[12:16:09] ============== ttm_bo_validate (22 subtests) ===============
[12:16:09] ============== ttm_bo_init_reserved_sys_man ===============
[12:16:09] [PASSED] Buffer object for userspace
[12:16:09] [PASSED] Kernel buffer object
[12:16:09] [PASSED] Shared buffer object
[12:16:09] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[12:16:09] ============== ttm_bo_init_reserved_mock_man ==============
[12:16:09] [PASSED] Buffer object for userspace
[12:16:09] [PASSED] Kernel buffer object
[12:16:09] [PASSED] Shared buffer object
[12:16:09] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[12:16:09] [PASSED] ttm_bo_init_reserved_resv
[12:16:09] ================== ttm_bo_validate_basic ==================
[12:16:09] [PASSED] Buffer object for userspace
[12:16:09] [PASSED] Kernel buffer object
[12:16:09] [PASSED] Shared buffer object
[12:16:09] ============== [PASSED] ttm_bo_validate_basic ==============
[12:16:09] [PASSED] ttm_bo_validate_invalid_placement
[12:16:09] ============= ttm_bo_validate_same_placement ==============
[12:16:09] [PASSED] System manager
[12:16:09] [PASSED] VRAM manager
[12:16:09] ========= [PASSED] ttm_bo_validate_same_placement ==========
[12:16:09] [PASSED] ttm_bo_validate_failed_alloc
[12:16:09] [PASSED] ttm_bo_validate_pinned
[12:16:09] [PASSED] ttm_bo_validate_busy_placement
[12:16:09] ================ ttm_bo_validate_multihop =================
[12:16:09] [PASSED] Buffer object for userspace
[12:16:09] [PASSED] Kernel buffer object
[12:16:09] [PASSED] Shared buffer object
[12:16:09] ============ [PASSED] ttm_bo_validate_multihop =============
[12:16:09] ========== ttm_bo_validate_no_placement_signaled ==========
[12:16:09] [PASSED] Buffer object in system domain, no page vector
[12:16:09] [PASSED] Buffer object in system domain with an existing page vector
[12:16:09] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[12:16:09] ======== ttm_bo_validate_no_placement_not_signaled ========
[12:16:09] [PASSED] Buffer object for userspace
[12:16:09] [PASSED] Kernel buffer object
[12:16:09] [PASSED] Shared buffer object
[12:16:09] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[12:16:09] [PASSED] ttm_bo_validate_move_fence_signaled
[12:16:09] ========= ttm_bo_validate_move_fence_not_signaled =========
[12:16:09] [PASSED] Waits for GPU
[12:16:09] [PASSED] Tries to lock straight away
[12:16:09] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[12:16:09] [PASSED] ttm_bo_validate_swapout
[12:16:09] [PASSED] ttm_bo_validate_happy_evict
[12:16:09] [PASSED] ttm_bo_validate_all_pinned_evict
[12:16:09] [PASSED] ttm_bo_validate_allowed_only_evict
[12:16:09] [PASSED] ttm_bo_validate_deleted_evict
[12:16:09] [PASSED] ttm_bo_validate_busy_domain_evict
[12:16:09] [PASSED] ttm_bo_validate_evict_gutting
[12:16:09] [PASSED] ttm_bo_validate_recrusive_evict
[12:16:09] ================= [PASSED] ttm_bo_validate =================
[12:16:09] ============================================================
[12:16:09] Testing complete. Ran 102 tests: passed: 102
[12:16:09] Elapsed time: 11.357s total, 1.754s configuring, 9.388s building, 0.179s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 4+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe: Improve wedged state management
2026-06-17 12:03 [PATCH v1] drm/xe: Improve wedged state management Raag Jadav
2026-06-17 12:16 ` ✓ CI.KUnit: success for " Patchwork
@ 2026-06-17 12:54 ` Patchwork
2026-06-17 14:06 ` [PATCH v1] " Rodrigo Vivi
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2026-06-17 12:54 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 953 bytes --]
== Series Details ==
Series: drm/xe: Improve wedged state management
URL : https://patchwork.freedesktop.org/series/168706/
State : success
== Summary ==
CI Bug Log - changes from xe-5272-2c78b42ee6ffe01d609bdf18ece05a5627d0bb25_BAT -> xe-pw-168706v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-5272-2c78b42ee6ffe01d609bdf18ece05a5627d0bb25 -> xe-pw-168706v1
IGT_8969: 5a8fa64e48c3c30af9afa2824d6adb5ad2bcc5a3 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5272-2c78b42ee6ffe01d609bdf18ece05a5627d0bb25: 2c78b42ee6ffe01d609bdf18ece05a5627d0bb25
xe-pw-168706v1: 168706v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168706v1/index.html
[-- Attachment #2: Type: text/html, Size: 1501 bytes --]
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v1] drm/xe: Improve wedged state management
2026-06-17 12:03 [PATCH v1] drm/xe: Improve wedged state management Raag Jadav
2026-06-17 12:16 ` ✓ CI.KUnit: success for " Patchwork
2026-06-17 12:54 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-06-17 14:06 ` Rodrigo Vivi
2 siblings, 0 replies; 4+ messages in thread
From: Rodrigo Vivi @ 2026-06-17 14:06 UTC (permalink / raw)
To: Raag Jadav
Cc: intel-xe, matthew.brost, riana.tauro, michal.wajdeczko,
matthew.d.roper, mallesh.koujalagi
On Wed, Jun 17, 2026 at 05:33:45PM +0530, Raag Jadav wrote:
> Currently, wedged state is serving a single usecase where the device is
> permanently declared wedged, but this doesn't allow any wedged state
> management for runtime usecases. In preparation of usecases which require
> to facilitate temporary device wedging, convert wedged.flag to wedged.ref
> which serves as a driver internal refcount for wedged state and blocks
> critical path execution during device lifetime. While at it, introduce
> wedged.perm which signifies permanent device wedging and operates
> independent of the refcount allowing relevant cleanup action on unwind
> path.
>
> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> Split from FLR series[1].
>
> [1] https://lore.kernel.org/intel-xe/20260603101814.916948-9-raag.jadav@intel.com/
> ---
> drivers/gpu/drm/xe/xe_device.c | 5 +++--
> drivers/gpu/drm/xe/xe_device.h | 18 +++++++++++++++++-
> drivers/gpu/drm/xe/xe_device_types.h | 6 ++++--
> 3 files changed, 24 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index ef730f2bdf32..00ade433a23b 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -916,7 +916,7 @@ static void xe_device_wedged_fini(struct drm_device *drm, void *arg)
> {
> struct xe_device *xe = arg;
>
> - if (atomic_read(&xe->wedged.flag))
> + if (atomic_read(&xe->wedged.perm))
> xe_pm_runtime_put(xe);
> }
>
> @@ -1421,7 +1421,8 @@ void xe_device_declare_wedged(struct xe_device *xe)
> return;
> }
>
> - if (!atomic_xchg(&xe->wedged.flag, 1)) {
> + if (!atomic_xchg(&xe->wedged.perm, 1)) {
Sashiko doesn't like this change. Specially like a standalone patch.
https://sashiko.dev/#/patchset/20260617120542.96444-1-raag.jadav%40intel.com
Opus-4.8 is trying to convince me here that although this race does exist it
is not problematic.
I'm wondering if we should go first with increasing the refcount and having
an aux function to get_permanent() or something like that to differentiate
the cases. Opus believe it is not necessary.
Anyway, let's hold this patch for now.... Please, at least think about this case
when you are refreshing the whole series and let's merge together with the
series.
If you decide to go with this patch as is you still have my reviewed-by
and my ack to ignore Sashiko.
Thanks,
Rodrigo.
> + xe_device_wedged_get(xe);
> xe->needs_flr_on_fini = true;
> xe_pm_runtime_get_noresume(xe);
> drm_err(&xe->drm,
> diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
> index 975768a6a9c8..1aea83e3517c 100644
> --- a/drivers/gpu/drm/xe/xe_device.h
> +++ b/drivers/gpu/drm/xe/xe_device.h
> @@ -192,9 +192,25 @@ bool xe_device_is_l2_flush_optimized(struct xe_device *xe);
> void xe_device_td_flush(struct xe_device *xe);
> void xe_device_l2_flush(struct xe_device *xe);
>
> +static inline void xe_device_wedged_get(struct xe_device *xe)
> +{
> + int ref;
> +
> + ref = atomic_inc_return(&xe->wedged.ref);
> + xe_assert(xe, ref > 0);
> +}
> +
> +static inline void xe_device_wedged_put(struct xe_device *xe)
> +{
> + int ref;
> +
> + ref = atomic_dec_return(&xe->wedged.ref);
> + xe_assert(xe, ref >= 0);
> +}
> +
> static inline bool xe_device_wedged(struct xe_device *xe)
> {
> - return atomic_read(&xe->wedged.flag);
> + return atomic_read(&xe->wedged.ref);
> }
>
> void xe_device_set_wedged_method(struct xe_device *xe, unsigned long method);
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 32dd2ffbc796..f13e0fb2f18e 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -485,8 +485,10 @@ struct xe_device {
>
> /** @wedged: Struct to control Wedged States and mode */
> struct {
> - /** @wedged.flag: Xe device faced a critical error and is now blocked. */
> - atomic_t flag;
> + /** @wedged.perm: Permanently wedged, needs cleanup on fini */
> + atomic_t perm;
> + /** @wedged.ref: Refcount for wedged device, blocks critical path execution */
> + atomic_t ref;
> /** @wedged.mode: Mode controlled by kernel parameter and debugfs */
> enum xe_wedged_mode mode;
> /** @wedged.method: Recovery method to be sent in the drm device wedged uevent */
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2026-06-17 14:06 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2026-06-17 12:03 [PATCH v1] drm/xe: Improve wedged state management Raag Jadav
2026-06-17 12:16 ` ✓ CI.KUnit: success for " Patchwork
2026-06-17 12:54 ` ✓ Xe.CI.BAT: " Patchwork
2026-06-17 14:06 ` [PATCH v1] " Rodrigo Vivi
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