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From: Jim MacArthur <jim.macarthur@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH v2 3/6] target/arm/ptw.c: Add Granule Bypass Windows
Date: Thu, 18 Jun 2026 15:48:35 +0100	[thread overview]
Message-ID: <ajQFQ1RY_JfYooNH@linaro.org> (raw)
In-Reply-To: <7615fda1-4052-4696-b477-6eacc057c4a5@linaro.org>

On Wed, Jun 10, 2026 at 09:41:56AM -0700, Richard Henderson wrote:
> On 6/3/26 11:26, Jim MacArthur wrote:
> > +    const uint64_t BW_STRIDE_SHIFT = 40;
> ...
> > +        switch (bw_stride_field) {
> > +        case 0b00000:
> > +        case 0b00010:
> > +        case 0b00100:
> > +        case 0b00110:
> > +        case 0b00111:
> > +        case 0b01000:
> > +        case 0b01001:
> > +        case 0b01010:
> > +        case 0b10000:
> > +            bw_stride = 1ULL << (bw_stride_field + BW_STRIDE_SHIFT);
> 
> BW_STRIDE_SHIFT should be 39 not 40.
> 
> Everything else is correct.
> 

Agree with the simplification, but BW_STRIDE_SHIFT should be 40. As per D24.2.54, a BWSTRIDE field of 0 gives a stride size of 1TB or 1<<40 bytes.
(gpcbwu, the highest bit set in the mask, is indeed 39+BWSTRIDE, but the subtraction of bw_size from bw_stride has the same effect.)
There was an error in a later use of bw_stride which might have made it look like something else was intended.

I'll respin with the simplification suggested; thank you.

Jim


  reply	other threads:[~2026-06-18 14:49 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-03 18:26 [PATCH v2 0/6] target/arm: Add aarch64 GPC3 bypass windows Jim MacArthur
2026-06-03 18:26 ` [PATCH v2 1/6] target/arm/tcg/cpu64.c: Extra test for GPC3 Jim MacArthur
2026-06-10 16:08   ` Richard Henderson
2026-06-03 18:26 ` [PATCH v2 2/6] target/arm: Setup new registers " Jim MacArthur
2026-06-10 16:17   ` Richard Henderson
2026-06-03 18:26 ` [PATCH v2 3/6] target/arm/ptw.c: Add Granule Bypass Windows Jim MacArthur
2026-06-10 16:41   ` Richard Henderson
2026-06-18 14:48     ` Jim MacArthur [this message]
2026-06-18 16:40       ` Richard Henderson
2026-06-03 18:26 ` [PATCH v2 4/6] target/arm/cpu-features.h: x-rme now means GPC3 Jim MacArthur
2026-06-10 16:42   ` Richard Henderson
2026-06-03 18:26 ` [PATCH v2 5/6] tests/tcg/aarch64/system: Alternative boot object for exception logging Jim MacArthur
2026-06-10 17:12   ` Richard Henderson
2026-06-03 18:26 ` [PATCH v2 6/6] tests/tcg/aarch64/system/gpc-test.c: Basic test for granule protection check Jim MacArthur
2026-06-10 17:15   ` Richard Henderson

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