From: Mostafa Saleh <smostafa@google.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: iommu@lists.linux.dev, "Joerg Roedel (AMD)" <joro@8bytes.org>,
Jean-Philippe Brucker <jpb@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>,
David Matlack <dmatlack@google.com>,
Pasha Tatashin <pasha.tatashin@soleen.com>,
patches@lists.linux.dev, Pranjal Shrivastava <praan@google.com>,
Samiullah Khawaja <skhawaja@google.com>
Subject: Re: [PATCH v2 4/8] iommu/arm-smmu-v3: Keep track in the arm_smmu_invs if RIL is used
Date: Tue, 7 Jul 2026 11:46:51 +0000 [thread overview]
Message-ID: <akznKwVE-Rc8ZjJN@google.com> (raw)
In-Reply-To: <4-v2-43074a57a53a+fb95-smmu_tlbi_jgg@nvidia.com>
On Mon, Jul 06, 2026 at 01:26:41PM -0300, Jason Gunthorpe wrote:
> Summarize if any of the inv entries will use RIL. The next patch will use
> this to avoid RIL pre-calculations unless RIL is being used by the
> invalidation.
>
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Mostafa Saleh <smostafa@google.com>
Thanks,
Mostafa
> ---
> .../iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c | 30 +++++++++----------
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 18 ++++++++---
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 ++
> 3 files changed, 31 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c
> index add671363c828c..785dd21bd68b7a 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c
> @@ -655,37 +655,37 @@ static void arm_smmu_v3_invs_test_verify(struct kunit *test,
>
> static struct arm_smmu_invs invs1 = {
> .num_invs = 3,
> - .inv = { { .type = INV_TYPE_S2_VMID, .id = 1, },
> - { .type = INV_TYPE_S2_VMID_S1_CLEAR, .id = 1, },
> - { .type = INV_TYPE_ATS, .id = 3, }, },
> + .inv = { { .smmu = &smmu, .type = INV_TYPE_S2_VMID, .id = 1, },
> + { .smmu = &smmu, .type = INV_TYPE_S2_VMID_S1_CLEAR, .id = 1, },
> + { .smmu = &smmu, .type = INV_TYPE_ATS, .id = 3, }, },
> };
>
> static struct arm_smmu_invs invs2 = {
> .num_invs = 3,
> - .inv = { { .type = INV_TYPE_S2_VMID, .id = 1, }, /* duplicated */
> - { .type = INV_TYPE_ATS, .id = 4, },
> - { .type = INV_TYPE_ATS, .id = 5, }, },
> + .inv = { { .smmu = &smmu, .type = INV_TYPE_S2_VMID, .id = 1, }, /* duplicated */
> + { .smmu = &smmu, .type = INV_TYPE_ATS, .id = 4, },
> + { .smmu = &smmu, .type = INV_TYPE_ATS, .id = 5, }, },
> };
>
> static struct arm_smmu_invs invs3 = {
> .num_invs = 3,
> - .inv = { { .type = INV_TYPE_S2_VMID, .id = 1, }, /* duplicated */
> - { .type = INV_TYPE_ATS, .id = 5, }, /* recover a trash */
> - { .type = INV_TYPE_ATS, .id = 6, }, },
> + .inv = { { .smmu = &smmu, .type = INV_TYPE_S2_VMID, .id = 1, }, /* duplicated */
> + { .smmu = &smmu, .type = INV_TYPE_ATS, .id = 5, }, /* recover a trash */
> + { .smmu = &smmu, .type = INV_TYPE_ATS, .id = 6, }, },
> };
>
> static struct arm_smmu_invs invs4 = {
> .num_invs = 3,
> - .inv = { { .type = INV_TYPE_ATS, .id = 10, .ssid = 1 },
> - { .type = INV_TYPE_ATS, .id = 10, .ssid = 3 },
> - { .type = INV_TYPE_ATS, .id = 12, .ssid = 1 }, },
> + .inv = { { .smmu = &smmu, .type = INV_TYPE_ATS, .id = 10, .ssid = 1 },
> + { .smmu = &smmu, .type = INV_TYPE_ATS, .id = 10, .ssid = 3 },
> + { .smmu = &smmu, .type = INV_TYPE_ATS, .id = 12, .ssid = 1 }, },
> };
>
> static struct arm_smmu_invs invs5 = {
> .num_invs = 3,
> - .inv = { { .type = INV_TYPE_ATS, .id = 10, .ssid = 2 },
> - { .type = INV_TYPE_ATS, .id = 10, .ssid = 3 }, /* duplicate */
> - { .type = INV_TYPE_ATS, .id = 12, .ssid = 2 }, },
> + .inv = { { .smmu = &smmu, .type = INV_TYPE_ATS, .id = 10, .ssid = 2 },
> + { .smmu = &smmu, .type = INV_TYPE_ATS, .id = 10, .ssid = 3 }, /* duplicate */
> + { .smmu = &smmu, .type = INV_TYPE_ATS, .id = 12, .ssid = 2 }, },
> };
>
> static void arm_smmu_v3_invs_test(struct kunit *test)
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 1ad642e09eb92d..02323fd7709f07 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -988,6 +988,18 @@ static inline int arm_smmu_invs_iter_next_cmp(struct arm_smmu_invs *invs_l,
> return arm_smmu_inv_cmp(cur_l, &invs_r->inv[next_r]);
> }
>
> +static void arm_smmu_invs_update_caps(struct arm_smmu_invs *invs,
> + const struct arm_smmu_inv *inv)
> +{
> + if (arm_smmu_inv_is_ats(inv))
> + invs->has_ats = true;
> +
> + if (!(inv->smmu->features & ARM_SMMU_FEAT_RANGE_INV))
> + return;
> +
> + invs->has_range_inv = true;
> +}
> +
> /**
> * arm_smmu_invs_for_each_cmp - Iterate over two sorted arrays computing for
> * arm_smmu_invs_merge() or arm_smmu_invs_unref()
> @@ -1058,8 +1070,7 @@ struct arm_smmu_invs *arm_smmu_invs_merge(struct arm_smmu_invs *invs,
> */
> if (new != new_invs->inv)
> WARN_ON_ONCE(arm_smmu_inv_cmp(new - 1, new) == 1);
> - if (arm_smmu_inv_is_ats(new))
> - new_invs->has_ats = true;
> + arm_smmu_invs_update_caps(new_invs, new);
> new++;
> }
>
> @@ -1169,8 +1180,7 @@ struct arm_smmu_invs *arm_smmu_invs_purge(struct arm_smmu_invs *invs)
>
> arm_smmu_invs_for_each_entry(invs, i, inv) {
> new_invs->inv[num_invs] = *inv;
> - if (arm_smmu_inv_is_ats(inv))
> - new_invs->has_ats = true;
> + arm_smmu_invs_update_caps(new_invs, inv);
> num_invs++;
> }
>
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> index 2fc695817671fe..3ef55f8af63d90 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> @@ -755,6 +755,7 @@ static inline bool arm_smmu_inv_is_ats(const struct arm_smmu_inv *inv)
> * Must not be greater than @num_invs
> * @rwlock: optional rwlock to fence ATS operations
> * @has_ats: flag if the array contains an INV_TYPE_ATS or INV_TYPE_ATS_FULL
> + * @has_range_inv: flag if any entry's SMMU supports range invalidation
> * @rcu: rcu head for kfree_rcu()
> * @inv: flexible invalidation array
> *
> @@ -784,6 +785,7 @@ struct arm_smmu_invs {
> size_t num_trashes;
> rwlock_t rwlock;
> bool has_ats;
> + bool has_range_inv;
> struct rcu_head rcu;
> struct arm_smmu_inv inv[] __counted_by(max_invs);
> };
> --
> 2.43.0
>
next prev parent reply other threads:[~2026-07-07 11:47 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-06 16:26 [PATCH v2 0/8] Organize the SMMUv3 invalidation flow so iommupt can use it Jason Gunthorpe
2026-07-06 16:26 ` [PATCH v2 1/8] iommu/arm-smmu-v3: Pass the parameters for the invalidation in a struct Jason Gunthorpe
2026-07-07 3:04 ` Nicolin Chen
2026-07-07 11:18 ` Mostafa Saleh
2026-07-06 16:26 ` [PATCH v2 2/8] iommu/arm-smmu-v3: Move pgsize out of arm_smmu_inv Jason Gunthorpe
2026-07-07 3:57 ` Nicolin Chen
2026-07-07 16:15 ` Jason Gunthorpe
2026-07-07 17:21 ` Nicolin Chen
2026-07-08 18:43 ` Jason Gunthorpe
2026-07-07 11:24 ` Mostafa Saleh
2026-07-07 18:08 ` Jason Gunthorpe
2026-07-11 17:38 ` Daniel Mentz
2026-07-10 4:06 ` Daniel Mentz
2026-07-10 14:28 ` Jason Gunthorpe
2026-07-06 16:26 ` [PATCH v2 3/8] iommu/arm-smmu-v3: Optimize range invalidation for latency Jason Gunthorpe
2026-07-07 7:27 ` Nicolin Chen
2026-07-07 19:13 ` Jason Gunthorpe
2026-07-07 21:07 ` Nicolin Chen
2026-07-07 11:45 ` Mostafa Saleh
2026-07-08 0:10 ` Jason Gunthorpe
2026-07-06 16:26 ` [PATCH v2 4/8] iommu/arm-smmu-v3: Keep track in the arm_smmu_invs if RIL is used Jason Gunthorpe
2026-07-07 7:27 ` Nicolin Chen
2026-07-07 11:46 ` Mostafa Saleh [this message]
2026-07-06 16:26 ` [PATCH v2 5/8] iommu/arm-smmu-v3: Precompute the invalidation commands Jason Gunthorpe
2026-07-07 11:52 ` Mostafa Saleh
2026-07-07 14:58 ` Jason Gunthorpe
2026-07-08 9:00 ` Mostafa Saleh
2026-07-08 13:15 ` Jason Gunthorpe
2026-07-07 20:31 ` Nicolin Chen
2026-07-09 12:07 ` Jason Gunthorpe
2026-07-09 19:10 ` Nicolin Chen
2026-07-06 16:26 ` [PATCH v2 6/8] iommu/arm-smmu-v3: Populate the tlbi at the top of the call chain Jason Gunthorpe
2026-07-07 11:57 ` Mostafa Saleh
2026-07-08 18:09 ` Jason Gunthorpe
2026-07-07 21:51 ` Nicolin Chen
2026-07-08 18:40 ` Jason Gunthorpe
2026-07-06 16:26 ` [PATCH v2 7/8] iommu/arm-smmu-v3: Change how the tlbi describes the invalidation Jason Gunthorpe
2026-07-06 18:00 ` Robin Murphy
2026-07-06 19:45 ` Jason Gunthorpe
2026-07-08 1:41 ` Nicolin Chen
2026-07-08 18:27 ` Jason Gunthorpe
2026-07-08 5:29 ` Nicolin Chen
2026-07-09 18:25 ` Jason Gunthorpe
2026-07-09 21:32 ` Nicolin Chen
2026-07-06 16:26 ` [PATCH v2 8/8] iommu/arm-smmu-v3: Support the DS expansion of RIL's SCALE Jason Gunthorpe
2026-07-07 23:20 ` Nicolin Chen
2026-07-08 0:02 ` Jason Gunthorpe
2026-07-08 2:10 ` Nicolin Chen
2026-07-08 13:05 ` Jason Gunthorpe
2026-07-07 12:25 ` [PATCH v2 0/8] Organize the SMMUv3 invalidation flow so iommupt can use it Mostafa Saleh
2026-07-07 15:00 ` Jason Gunthorpe
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