[PATCH v3 v3] PCI: dwc: Add pci id for LECARC pcie pmu

[PATCH v3 v3] PCI: dwc: Add pci id for LECARC pcie pmu

[Braden Zhang]

From: Brett Zhou <brett_zhou@lecomputing.com>

This patch adds support for the PCIe PMU found
on LECARC SoCs, which utilize the DesignWare PCIe Controller IP

Signed-off-by: Brett Zhou <brett_zhou@lecomputing.com>
Reviewed-by: Bjorn Helgaas <helgaas@kernel.org>
Signed-off-by: Braden Zhang <braden_zhang@lecomputing.com>
---
Changes in v3:
- Update: move definition to pcie-dwc.h a
- Format: Update the subject line to follow the style of previous pcie-dwc.h changes.
- Link to v2: https://patch.msgid.link/20260710-pcie-pmu-v2-1-a3d73d4d9051@lecomputing.com

Changes in v2:
- Format: repalce space with tab to separate the macro name and the value.
- Link to v1: https://patch.msgid.link/20260710-pcie-pmu-v1-1-1519e580313f@lecomputing.com

To: Bjorn Helgaas <bhelgaas@google.com>
To: Jingoo Han <jingoohan1@gmail.com>
To: Manivannan Sadhasivam <mani@kernel.org>
Cc: linux-pci@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 include/linux/pcie-dwc.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/linux/pcie-dwc.h b/include/linux/pcie-dwc.h
index 8ff778e7aec0..0df5fa81b561 100644
--- a/include/linux/pcie-dwc.h
+++ b/include/linux/pcie-dwc.h
@@ -11,6 +11,8 @@
 
 #include <linux/pci_ids.h>
 
+#define PCI_VENDOR_ID_LECARC           0x0720
+
 struct dwc_pcie_vsec_id {
 	u16 vendor_id;
 	u16 vsec_id;
@@ -32,6 +34,8 @@ static const struct dwc_pcie_vsec_id dwc_pcie_rasdes_vsec_ids[] = {
 	  .vsec_id = 0x02, .vsec_rev = 0x4 },
 	{ .vendor_id = PCI_VENDOR_ID_SAMSUNG,
 	  .vsec_id = 0x02, .vsec_rev = 0x4 },
+	{ .vendor_id = PCI_VENDOR_ID_LECARC,
+	  .vsec_id = 0x02, .vsec_rev = 0x4 },
 	{}
 };
 

---
base-commit: a635d6748234582ea287c5ffeae28b9b23f91c7e
change-id: 20260710-pcie-pmu-5ef78c56c3b6

Best regards,
--  
Braden Zhang <braden_zhang@lecomputing.com>

Re: [PATCH v3 v3] PCI: dwc: Add pci id for LECARC pcie pmu

[sashiko-bot]

> From: Brett Zhou <brett_zhou@lecomputing.com>
> 
> This patch adds support for the PCIe PMU found
> on LECARC SoCs, which utilize the DesignWare PCIe Controller IP
> 
> Signed-off-by: Brett Zhou <brett_zhou@lecomputing.com>
> Reviewed-by: Bjorn Helgaas <helgaas@kernel.org>
> Signed-off-by: Braden Zhang <braden_zhang@lecomputing.com>

Sashiko has reviewed this patch and found no issues. It looks great!

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260713-pcie-pmu-v3-1-5e4a8d82248d@lecomputing.com?part=1

Re: [PATCH v3 v3] PCI: dwc: Add pci id for LECARC pcie pmu

[Manivannan Sadhasivam]

On Mon, Jul 13, 2026 at 10:10:13AM +0800, Braden Zhang wrote:
> From: Brett Zhou <brett_zhou@lecomputing.com>
> 
> This patch adds support for the PCIe PMU found
> on LECARC SoCs, which utilize the DesignWare PCIe Controller IP
> 

LECARC looks like a ACPI based platform. I'm wondering how you are able to make
use of this patch without adding the ACPI ID support to enumerate the DWC
driver.

- Mani

> Signed-off-by: Brett Zhou <brett_zhou@lecomputing.com>
> Reviewed-by: Bjorn Helgaas <helgaas@kernel.org>
> Signed-off-by: Braden Zhang <braden_zhang@lecomputing.com>
> ---
> Changes in v3:
> - Update: move definition to pcie-dwc.h a
> - Format: Update the subject line to follow the style of previous pcie-dwc.h changes.
> - Link to v2: https://patch.msgid.link/20260710-pcie-pmu-v2-1-a3d73d4d9051@lecomputing.com
> 
> Changes in v2:
> - Format: repalce space with tab to separate the macro name and the value.
> - Link to v1: https://patch.msgid.link/20260710-pcie-pmu-v1-1-1519e580313f@lecomputing.com
> 
> To: Bjorn Helgaas <bhelgaas@google.com>
> To: Jingoo Han <jingoohan1@gmail.com>
> To: Manivannan Sadhasivam <mani@kernel.org>
> Cc: linux-pci@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> ---
>  include/linux/pcie-dwc.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/include/linux/pcie-dwc.h b/include/linux/pcie-dwc.h
> index 8ff778e7aec0..0df5fa81b561 100644
> --- a/include/linux/pcie-dwc.h
> +++ b/include/linux/pcie-dwc.h
> @@ -11,6 +11,8 @@
>  
>  #include <linux/pci_ids.h>
>  
> +#define PCI_VENDOR_ID_LECARC           0x0720
> +
>  struct dwc_pcie_vsec_id {
>  	u16 vendor_id;
>  	u16 vsec_id;
> @@ -32,6 +34,8 @@ static const struct dwc_pcie_vsec_id dwc_pcie_rasdes_vsec_ids[] = {
>  	  .vsec_id = 0x02, .vsec_rev = 0x4 },
>  	{ .vendor_id = PCI_VENDOR_ID_SAMSUNG,
>  	  .vsec_id = 0x02, .vsec_rev = 0x4 },
> +	{ .vendor_id = PCI_VENDOR_ID_LECARC,
> +	  .vsec_id = 0x02, .vsec_rev = 0x4 },
>  	{}
>  };
>  
> 
> ---
> base-commit: a635d6748234582ea287c5ffeae28b9b23f91c7e
> change-id: 20260710-pcie-pmu-5ef78c56c3b6
> 
> Best regards,
> --  
> Braden Zhang <braden_zhang@lecomputing.com>
> 

-- 
மணிவண்ணன் சதாசிவம்

Re: [PATCH v3 v3] PCI: dwc: Add pci id for LECARC pcie pmu

[Braden Zhang]

On Mon, Jul 13, 2026 at 07:14:25AM +0200, Manivannan Sadhasivam wrote:
> Date: Mon, 13 Jul 2026 07:14:25 +0200
> From: Manivannan Sadhasivam <mani@kernel.org>
> To: Braden Zhang <braden_zhang@lecomputing.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>, Jingoo Han <jingoohan1@gmail.com>,
>  linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Brett Zhou
>  <brett_zhou@lecomputing.com>, Bjorn Helgaas <helgaas@kernel.org>
> Subject: Re: [PATCH v3 v3] PCI: dwc: Add pci id for LECARC pcie pmu
> 
> On Mon, Jul 13, 2026 at 10:10:13AM +0800, Braden Zhang wrote:
> > From: Brett Zhou <brett_zhou@lecomputing.com>
> > 
> > This patch adds support for the PCIe PMU found
> > on LECARC SoCs, which utilize the DesignWare PCIe Controller IP
> > 
> 
> LECARC looks like a ACPI based platform. I'm wondering how you are able to make
> use of this patch without adding the ACPI ID support to enumerate the DWC
> driver.
> 
> - Mani
> 
> > Signed-off-by: Brett Zhou <brett_zhou@lecomputing.com>
> > Reviewed-by: Bjorn Helgaas <helgaas@kernel.org>
> > Signed-off-by: Braden Zhang <braden_zhang@lecomputing.com>
> > ---
> > 
> > ---
> > base-commit: a635d6748234582ea287c5ffeae28b9b23f91c7e
> > change-id: 20260710-pcie-pmu-5ef78c56c3b6
> > 
> > Best regards,
> > --  
> > Braden Zhang <braden_zhang@lecomputing.com>
> > 
> 
> -- 
Hi Mani,

Thanks for the review.

LECARC platforms use the standard DesignWare PCIe Controller, and the
existing DWC driver already handles the enumeration and basic
functionality through the generic PCIe core. This patch only adds the
PCI vendor ID to the vendor-specific capability (VSEC) list, which
enables the standard DWC RAS/DES feature detection.

We don't require a separate PMU driver or additional ACPI ID support
because the PMU functionality is already covered by the generic DWC
PMU framework. The existing driver infrastructure handles the PMU
features transparently once the vendor ID is recognized in the VSEC
table.

Please let us know if you have any other concerns.

Best regards,
Braden Zhang

Re: [PATCH v3 v3] PCI: dwc: Add pci id for LECARC pcie pmu

[Manivannan Sadhasivam]

On Mon, Jul 20, 2026 at 03:43:15PM +0800, Braden Zhang wrote:
> On Mon, Jul 13, 2026 at 07:14:25AM +0200, Manivannan Sadhasivam wrote:
> > Date: Mon, 13 Jul 2026 07:14:25 +0200
> > From: Manivannan Sadhasivam <mani@kernel.org>
> > To: Braden Zhang <braden_zhang@lecomputing.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>, Jingoo Han <jingoohan1@gmail.com>,
> >  linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Brett Zhou
> >  <brett_zhou@lecomputing.com>, Bjorn Helgaas <helgaas@kernel.org>
> > Subject: Re: [PATCH v3 v3] PCI: dwc: Add pci id for LECARC pcie pmu
> > 
> > On Mon, Jul 13, 2026 at 10:10:13AM +0800, Braden Zhang wrote:
> > > From: Brett Zhou <brett_zhou@lecomputing.com>
> > > 
> > > This patch adds support for the PCIe PMU found
> > > on LECARC SoCs, which utilize the DesignWare PCIe Controller IP
> > > 
> > 
> > LECARC looks like a ACPI based platform. I'm wondering how you are able to make
> > use of this patch without adding the ACPI ID support to enumerate the DWC
> > driver.
> > 
> > - Mani
> > 
> > > Signed-off-by: Brett Zhou <brett_zhou@lecomputing.com>
> > > Reviewed-by: Bjorn Helgaas <helgaas@kernel.org>
> > > Signed-off-by: Braden Zhang <braden_zhang@lecomputing.com>
> > > ---
> > > 
> > > ---
> > > base-commit: a635d6748234582ea287c5ffeae28b9b23f91c7e
> > > change-id: 20260710-pcie-pmu-5ef78c56c3b6
> > > 
> > > Best regards,
> > > --  
> > > Braden Zhang <braden_zhang@lecomputing.com>
> > > 
> > 
> > -- 
> Hi Mani,
> 
> Thanks for the review.
> 
> LECARC platforms use the standard DesignWare PCIe Controller, and the
> existing DWC driver already handles the enumeration and basic
> functionality through the generic PCIe core.
> This patch only adds the
> PCI vendor ID to the vendor-specific capability (VSEC) list, which
> enables the standard DWC RAS/DES feature detection.
> 
> We don't require a separate PMU driver or additional ACPI ID support
> because the PMU functionality is already covered by the generic DWC
> PMU framework. The existing driver infrastructure handles the PMU
> features transparently once the vendor ID is recognized in the VSEC
> table.
> 

Ah, makes sense now. It didn't occur to me that 'dwc_pcie_rasdes_vsec_ids'
struct array is used by the PMU driver also.

Please incorporate comments from Bjorn and resend.

- Mani

-- 
மணிவண்ணன் சதாசிவம்

Re: [PATCH v3 v3] PCI: dwc: Add pci id for LECARC pcie pmu

[Bjorn Helgaas]

On Mon, Jul 13, 2026 at 10:10:13AM +0800, Braden Zhang wrote:
> From: Brett Zhou <brett_zhou@lecomputing.com>
> 
> This patch adds support for the PCIe PMU found
> on LECARC SoCs, which utilize the DesignWare PCIe Controller IP
> 
> Signed-off-by: Brett Zhou <brett_zhou@lecomputing.com>
> Reviewed-by: Bjorn Helgaas <helgaas@kernel.org>

I gave you some comments but did not provide a "Reviewed-by" tag, so
including one here is not valid, see:

  https://lore.kernel.org/linux-pci/20260710172212.GA964796@bhelgaas/
  https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/submitting-patches.rst?id=v7.1#n539

Also relevant:

  https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/maintainer-tip.rst?id=v7.1#n134

In this case, you could say something like:

  Add support for the PCIe PMU found on LECARC SoCs, which use the
  DesignWare PCIe Controller IP.

Wrap it to fill 75 columns.

In the subject line:

  s/pci/PCI/
  s/id/ID/
  s/pcie/PCIe/
  s/pmu/PMU/

since these are all initialisms, not ordinary English words.

> Signed-off-by: Braden Zhang <braden_zhang@lecomputing.com>
> ---
> Changes in v3:
> - Update: move definition to pcie-dwc.h a
> - Format: Update the subject line to follow the style of previous pcie-dwc.h changes.
> - Link to v2: https://patch.msgid.link/20260710-pcie-pmu-v2-1-a3d73d4d9051@lecomputing.com
> 
> Changes in v2:
> - Format: repalce space with tab to separate the macro name and the value.
> - Link to v1: https://patch.msgid.link/20260710-pcie-pmu-v1-1-1519e580313f@lecomputing.com
> 
> To: Bjorn Helgaas <bhelgaas@google.com>
> To: Jingoo Han <jingoohan1@gmail.com>
> To: Manivannan Sadhasivam <mani@kernel.org>
> Cc: linux-pci@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> ---
>  include/linux/pcie-dwc.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/include/linux/pcie-dwc.h b/include/linux/pcie-dwc.h
> index 8ff778e7aec0..0df5fa81b561 100644
> --- a/include/linux/pcie-dwc.h
> +++ b/include/linux/pcie-dwc.h
> @@ -11,6 +11,8 @@
>  
>  #include <linux/pci_ids.h>
>  
> +#define PCI_VENDOR_ID_LECARC           0x0720
> +
>  struct dwc_pcie_vsec_id {
>  	u16 vendor_id;
>  	u16 vsec_id;
> @@ -32,6 +34,8 @@ static const struct dwc_pcie_vsec_id dwc_pcie_rasdes_vsec_ids[] = {
>  	  .vsec_id = 0x02, .vsec_rev = 0x4 },
>  	{ .vendor_id = PCI_VENDOR_ID_SAMSUNG,
>  	  .vsec_id = 0x02, .vsec_rev = 0x4 },
> +	{ .vendor_id = PCI_VENDOR_ID_LECARC,
> +	  .vsec_id = 0x02, .vsec_rev = 0x4 },
>  	{}
>  };
>  
> 
> ---
> base-commit: a635d6748234582ea287c5ffeae28b9b23f91c7e
> change-id: 20260710-pcie-pmu-5ef78c56c3b6
> 
> Best regards,
> --  
> Braden Zhang <braden_zhang@lecomputing.com>
>