From: Vinod Koul <vkoul@kernel.org>
To: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>,
Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Neil Armstrong <neil.armstrong@linaro.org>,
Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>,
Wesley Cheng <quic_wcheng@quicinc.com>,
Xiangxu Yin <xiangxu.yin@oss.qualcomm.com>,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 2/4] dt-bindings: phy: qcs615-qmp-usb3dp: Add support for Shikra SoC
Date: Mon, 20 Jul 2026 16:53:12 +0530 [thread overview]
Message-ID: <al4FICuDRLYdPE_8@vaman> (raw)
In-Reply-To: <20260712-usb-shikra-phy-v6-v6-2-1b3e51bf1541@oss.qualcomm.com>
On 12-07-26, 20:58, Krishna Kurapati wrote:
Krzysztof okay with this..?
> Declare the USB-C QMP PHY present on the Qualcomm Shikra SoC. Shikra uses
> 3 resets to be programmed before initialising the phy. As per the hardware
> documentation, the third reset is PHY_PRIM_SP0_BCR, hence naming it "phy".
>
> Also, add remote endpoints and orientation switch support for getting
> Type-C orientation information.
>
> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> ---
> .../bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml | 49 +++++++++++++++++++++-
> 1 file changed, 48 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml
> index efb465c71c1b..98397006fa62 100644
> --- a/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml
> @@ -18,6 +18,7 @@ properties:
> compatible:
> enum:
> - qcom,qcs615-qmp-usb3-dp-phy
> + - qcom,shikra-qmp-usb3-dp-phy
>
> reg:
> maxItems: 1
> @@ -33,12 +34,15 @@ properties:
> - const: pipe
>
> resets:
> - maxItems: 2
> + minItems: 2
> + maxItems: 3
>
> reset-names:
> + minItems: 2
> items:
> - const: phy_phy
> - const: dp_phy
> + - const: phy
>
> vdda-phy-supply: true
>
> @@ -63,6 +67,22 @@ properties:
> - description: offset of the PHY mode register
> description: Clamp and PHY mode register present in the TCSR
>
> + orientation-switch:
> + description:
> + Flag the PHY as possible handler of USB Type-C orientation switching
> + type: boolean
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Output endpoint of the PHY
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Incoming endpoint from the USB controller
> +
> required:
> - compatible
> - reg
> @@ -78,6 +98,33 @@ required:
>
> additionalProperties: false
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,shikra-qmp-usb3-dp-phy
> + then:
> + properties:
> + resets:
> + minItems: 3
> + reset-names:
> + minItems: 3
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,qcs615-qmp-usb3-dp-phy
> + then:
> + properties:
> + resets:
> + maxItems: 2
> + reset-names:
> + maxItems: 2
> +
> examples:
> - |
> #include <dt-bindings/clock/qcom,qcs615-gcc.h>
>
> --
> 2.34.1
--
~Vinod
WARNING: multiple messages have this Message-ID (diff)
From: Vinod Koul <vkoul@kernel.org>
To: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>,
Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Neil Armstrong <neil.armstrong@linaro.org>,
Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>,
Wesley Cheng <quic_wcheng@quicinc.com>,
Xiangxu Yin <xiangxu.yin@oss.qualcomm.com>,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 2/4] dt-bindings: phy: qcs615-qmp-usb3dp: Add support for Shikra SoC
Date: Mon, 20 Jul 2026 16:53:12 +0530 [thread overview]
Message-ID: <al4FICuDRLYdPE_8@vaman> (raw)
In-Reply-To: <20260712-usb-shikra-phy-v6-v6-2-1b3e51bf1541@oss.qualcomm.com>
On 12-07-26, 20:58, Krishna Kurapati wrote:
Krzysztof okay with this..?
> Declare the USB-C QMP PHY present on the Qualcomm Shikra SoC. Shikra uses
> 3 resets to be programmed before initialising the phy. As per the hardware
> documentation, the third reset is PHY_PRIM_SP0_BCR, hence naming it "phy".
>
> Also, add remote endpoints and orientation switch support for getting
> Type-C orientation information.
>
> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> ---
> .../bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml | 49 +++++++++++++++++++++-
> 1 file changed, 48 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml
> index efb465c71c1b..98397006fa62 100644
> --- a/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml
> @@ -18,6 +18,7 @@ properties:
> compatible:
> enum:
> - qcom,qcs615-qmp-usb3-dp-phy
> + - qcom,shikra-qmp-usb3-dp-phy
>
> reg:
> maxItems: 1
> @@ -33,12 +34,15 @@ properties:
> - const: pipe
>
> resets:
> - maxItems: 2
> + minItems: 2
> + maxItems: 3
>
> reset-names:
> + minItems: 2
> items:
> - const: phy_phy
> - const: dp_phy
> + - const: phy
>
> vdda-phy-supply: true
>
> @@ -63,6 +67,22 @@ properties:
> - description: offset of the PHY mode register
> description: Clamp and PHY mode register present in the TCSR
>
> + orientation-switch:
> + description:
> + Flag the PHY as possible handler of USB Type-C orientation switching
> + type: boolean
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Output endpoint of the PHY
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Incoming endpoint from the USB controller
> +
> required:
> - compatible
> - reg
> @@ -78,6 +98,33 @@ required:
>
> additionalProperties: false
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,shikra-qmp-usb3-dp-phy
> + then:
> + properties:
> + resets:
> + minItems: 3
> + reset-names:
> + minItems: 3
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,qcs615-qmp-usb3-dp-phy
> + then:
> + properties:
> + resets:
> + maxItems: 2
> + reset-names:
> + maxItems: 2
> +
> examples:
> - |
> #include <dt-bindings/clock/qcom,qcs615-gcc.h>
>
> --
> 2.34.1
--
~Vinod
--
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next prev parent reply other threads:[~2026-07-20 11:23 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-12 15:28 [PATCH v6 0/4] Add USB Phy driver and binding changes for Qualcomm Shikra SoC Krishna Kurapati
2026-07-12 15:28 ` Krishna Kurapati
2026-07-12 15:28 ` [PATCH v6 1/4] dt-bindings: phy: qcom,qusb2: Document QUSB2 Phy for Shikra Krishna Kurapati
2026-07-12 15:28 ` Krishna Kurapati
2026-07-12 15:28 ` [PATCH v6 2/4] dt-bindings: phy: qcs615-qmp-usb3dp: Add support for Shikra SoC Krishna Kurapati
2026-07-12 15:28 ` Krishna Kurapati
2026-07-20 11:23 ` Vinod Koul [this message]
2026-07-20 11:23 ` Vinod Koul
2026-07-12 15:28 ` [PATCH v6 3/4] phy: qcom-qusb2: Add support for Shikra Krishna Kurapati
2026-07-12 15:28 ` Krishna Kurapati
2026-07-12 15:28 ` [PATCH v6 4/4] phy: qcom: qmp-usbc: Add qmp configuration " Krishna Kurapati
2026-07-12 15:28 ` Krishna Kurapati
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