Re: [PATCH v4 2/8] phy: rockchip: samsung-hdptx: Prevent divide-by-zero when computing clk rate

From: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
To: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Cc: sashiko-reviews@lists.linux.dev, neil.armstrong@linaro.org,
	olteanv@gmail.com, linux-phy@lists.infradead.org,
	vkoul@kernel.org
Subject: Re: [PATCH v4 2/8] phy: rockchip: samsung-hdptx: Prevent divide-by-zero when computing clk rate
Date: Mon, 20 Jul 2026 17:10:11 +0300	[thread overview]
Message-ID: <al4sQ1kNriKH7hHL@umbar.lan> (raw)
In-Reply-To: <90ac7bbc-977b-432a-9f17-b7280e19d819@collabora.com>

On Fri, Jun 12, 2026 at 03:18:52AM +0300, Cristian Ciocaltea wrote:
> On 6/12/26 2:57 AM, sashiko-bot@kernel.org wrote:
> > Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> > 
> > Pre-existing issues:
> > - [High] Potential integer underflow in `fout` calculation when hardware state is misconfigured, leading to a massive bogus clock rate that could hang downstream components.
> > --
> 
> If the hardware reached such a damaged state, the kernel is likely already encountering more serious issues.
> 
> Regardless, I will address this in the "FRL TxFFE level control" series, which is currently blocked by this one, to avoid any further delays.
> 

With the overflow handled:

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>

-- 
With best wishes
Dmitry

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy