From: Pavel Machek <pavel@nabladev.com>
To: Biju <biju.das.au@gmail.com>
Cc: cip-dev@lists.cip-project.org,
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.x90@mail.toshiba>,
Pavel Machek <pavel@nabladev.com>,
Biju Das <biju.das.jz@bp.renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH 5.10.y-cip 0/4] arm64: dts: renesas: Add max-frequency to SDHI nodes
Date: Mon, 13 Jul 2026 23:09:14 +0200 [thread overview]
Message-ID: <alVT-m89Z6_dQcF4@duo.ucw.cz> (raw)
In-Reply-To: <20260713120354.29288-1-biju.das.jz@bp.renesas.com>
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Hi!
> This patch series aims to add the max-frequency property set to
> 133333333 Hz (133.33 MHz) to both SDHI0 and SDHI1 MMC controller nodes in
> the RZ/G2{L,LC,UL}/RZ/V2L device tree.
>
> This change results in approximately 33% performance improvement as
> it sets the SD clk to 100 MHz instead of the max 133 MHz.
>
> All the patches in this series are cherry-picked from mainline.
Ok, so as I understand it, we don't need this for 6.1-cip and others,
because it is already in mainline 6.1, so no backport is needed.
Best regards,
Pavel
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next prev parent reply other threads:[~2026-07-13 21:09 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-13 12:03 [PATCH 5.10.y-cip 0/4] arm64: dts: renesas: Add max-frequency to SDHI nodes Biju
2026-07-13 12:03 ` [PATCH 5.10.y-cip 1/4] arm64: dts: renesas: r9a07g043: " Biju
2026-07-13 12:03 ` [PATCH 5.10.y-cip 2/4] arm64: dts: renesas: r9a07g044: Rename SDHI clocks Biju
2026-07-13 12:03 ` [PATCH 5.10.y-cip 3/4] arm64: dts: renesas: r9a07g044: Add max-frequency to SDHI nodes Biju
2026-07-13 12:03 ` [PATCH 5.10.y-cip 4/4] arm64: dts: renesas: r9a07g054: " Biju
2026-07-13 21:09 ` Pavel Machek [this message]
2026-07-14 6:30 ` [PATCH 5.10.y-cip 0/4] arm64: dts: renesas: " Biju Das
2026-07-14 18:33 ` Pavel Machek
2026-07-13 21:13 ` Pavel Machek
2026-07-15 11:01 ` Pavel Machek
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