All of lore.kernel.org
 help / color / mirror / Atom feed
From: Pranjal Shrivastava <praan@google.com>
To: Nicolin Chen <nicolinc@nvidia.com>
Cc: Will Deacon <will@kernel.org>, Jason Gunthorpe <jgg@nvidia.com>,
	Kevin Tian <kevin.tian@intel.com>,
	Lu Baolu <baolu.lu@linux.intel.com>,
	Robin Murphy <robin.murphy@arm.com>,
	joro@8bytes.org, David Woodhouse <dwmw2@infradead.org>,
	linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 3/5] iommufd/selftest: Convert cache invalidation mocks to the core array loop
Date: Tue, 14 Jul 2026 13:06:57 +0000	[thread overview]
Message-ID: <alY0ceR2leyRxXTy@google.com> (raw)
In-Reply-To: <4383c0afeba9795c9ae312826443fd7d5fc3fb58.1783539724.git.nicolinc@nvidia.com>

On Wed, Jul 08, 2026 at 12:44:18PM -0700, Nicolin Chen wrote:
> The vIOMMU and the nested-domain selftest invalidation mocks each used to
> walk the whole request array on their own, with the vIOMMU mock even
> allocating a buffer sized to the entire array in order to do so first.
> 
> The iommufd core now iterates the request array itself and re-invokes the
> op with the not-yet-handled sub-array, so handle just a single request per
> call out of the front of that sub-array and report one handled entry via
> the array->entry_num. Drop both of the loops and the kzalloc_objs() in the
> viommu callback function, and keep returning a success for an empty array
> as a probe of the selftest data type.
> 
> Reviewed-by: Kevin Tian <kevin.tian@intel.com>
> Assisted-by: Claude:claude-opus-4-8
> Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
 
Reviewed-by: Pranjal Shrivastava <praan@google.com>

Thanks,
Praan

  reply	other threads:[~2026-07-14 13:07 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-08 19:44 [PATCH v3 0/5] iommufd: Iterate the cache invalidation array in the core Nicolin Chen
2026-07-08 19:44 ` [PATCH v3 1/5] iommu/arm-smmu-v3-iommufd: Reject unsupported bits in invalidation commands Nicolin Chen
2026-07-14  9:35   ` Pranjal Shrivastava
2026-07-14 12:14     ` Jason Gunthorpe
2026-07-14 13:00       ` Pranjal Shrivastava
2026-07-08 19:44 ` [PATCH v3 2/5] iommufd: Iterate the cache invalidation array in the core Nicolin Chen
2026-07-13  5:58   ` Baolu Lu
2026-07-14 12:29   ` Pranjal Shrivastava
2026-07-08 19:44 ` [PATCH v3 3/5] iommufd/selftest: Convert cache invalidation mocks to the core array loop Nicolin Chen
2026-07-14 13:06   ` Pranjal Shrivastava [this message]
2026-07-08 19:44 ` [PATCH v3 4/5] iommu/arm-smmu-v3-iommufd: Convert cache invalidation " Nicolin Chen
2026-07-14 13:33   ` Pranjal Shrivastava
2026-07-08 19:44 ` [PATCH v3 5/5] iommu/vt-d: Convert nested " Nicolin Chen
2026-07-13  5:58   ` Baolu Lu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=alY0ceR2leyRxXTy@google.com \
    --to=praan@google.com \
    --cc=baolu.lu@linux.intel.com \
    --cc=dwmw2@infradead.org \
    --cc=iommu@lists.linux.dev \
    --cc=jgg@nvidia.com \
    --cc=joro@8bytes.org \
    --cc=kevin.tian@intel.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=nicolinc@nvidia.com \
    --cc=robin.murphy@arm.com \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.