Re: [PATCH 1/2] riscv: dts: spacemit: k3: add USB controller and USB phy support

From: Aurelien Jarno <aurelien@aurel32.net>
To: Inochi Amaoto <inochiama@gmail.com>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>, Yixun Lan <dlan@kernel.org>,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	spacemit@lists.linux.dev, linux-kernel@vger.kernel.org,
	Yixun Lan <dlan@gentoo.org>, Longbin Li <looong.bin@gmail.com>
Subject: Re: [PATCH 1/2] riscv: dts: spacemit: k3: add USB controller and USB phy support
Date: Thu, 16 Jul 2026 23:31:10 +0200	[thread overview]
Message-ID: <allNnol5HttviAan@aurel32.net> (raw)
In-Reply-To: <20260709040415.977784-2-inochiama@gmail.com>

On 2026-07-09 12:04, Inochi Amaoto wrote:
> Add all USB device node to the Spacemit K3.
> 
> Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> ---
>  arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 13 ++++++
>  arch/riscv/boot/dts/spacemit/k3.dtsi         | 42 ++++++++++++++++++++
>  2 files changed, 55 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> index b89c1521e664..2a6d35a64d5c 100644
> --- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> +++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> @@ -182,6 +182,11 @@ dldo7: dldo7 {
>  	};
>  };
>  
> +&combophy {
> +	spacemit,apmu = <&syscon_apmu 0x11>;
> +	status = "okay";
> +};
> +
>  &eth0 {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&gmac0_rgmii_0_cfg>, <&gmac0_phy_0_cfg>;
> @@ -221,3 +226,11 @@ hub@1 {
>  &usb2_phy {
>  	status = "okay";
>  };
> +
> +&usb3d_u2phy {
> +	status = "okay";
> +};
> +
> +&usb3d {
> +	status = "okay";
> +};
> diff --git a/arch/riscv/boot/dts/spacemit/k3.dtsi b/arch/riscv/boot/dts/spacemit/k3.dtsi
> index 19fc9b49668e..82c9e2da82e9 100644
> --- a/arch/riscv/boot/dts/spacemit/k3.dtsi
> +++ b/arch/riscv/boot/dts/spacemit/k3.dtsi
> @@ -7,6 +7,7 @@
>  #include <dt-bindings/clock/spacemit,k3-clocks.h>
>  #include <dt-bindings/reset/spacemit,k3-resets.h>
>  #include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/phy/phy.h>
>  
>  /dts-v1/;
>  
> @@ -438,6 +439,47 @@ soc: soc {
>  		dma-noncoherent;
>  		ranges;
>  
> +		usb3d: usb@81a00000 {
> +			compatible = "spacemit,k3-dwc3";
> +			reg = <0x0 0x81a00000 0x0 0x10000>;
> +			interrupts = <149 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-parent = <&saplic>;
> +			clocks = <&syscon_apmu CLK_APMU_USB3_PORTD_BUS>;
> +			clock-names = "usbdrd30";
> +			resets = <&syscon_apmu RESET_APMU_USB3_D_AHB>,
> +				 <&syscon_apmu RESET_APMU_USB3_D_VCC>,
> +				 <&syscon_apmu RESET_APMU_USB3_D_PHY>;
> +			reset-names = "ahb", "vcc", "phy";
> +			phys = <&usb3d_u2phy>,
> +			       <&combophy 4 PHY_TYPE_USB3>;
> +			phy-names = "usb2-phy", "usb3-phy";
> +			phy_type = "utmi";
> +			snps,dis_enblslpm_quirk;
> +			snps,dis_u2_susphy_quirk;
> +			snps,dis_u3_susphy_quirk;
> +			snps,dis-del-phy-power-chg-quirk;
> +			snps,dis-tx-ipgap-linecheck-quirk;
> +			snps,parkmode-disable-ss-quirk;
> +			dr_mode = "host";
> +			status = "disabled";
> +		};
> +
> +		usb3d_u2phy: phy@81b00000 {
> +			compatible = "spacemit,k3-usb2-phy";
> +			reg = <0x0 0x81b00000 0x0 0x200>;
> +			clocks = <&syscon_apmu CLK_APMU_USB2_BUS>;

This should be CLK_APMU_USB3_PORTD_BUS.

I am also not sure you want to declare the USB3 PHY in k3.dtsi. I think
it should be defined at the board level, as other boards than the k3 
Pico ITX might decide to keep this controller as USB 2 only and use the 
combo PHY for PCIe.

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                     http://aurel32.net