[PATCH v3 0/3] purwa: Drop the Hamoa PDC workaround from purwa

[PATCH v3 0/3] purwa: Drop the Hamoa PDC workaround from purwa

[Maulik Shah]

Purwa shares the Hamoa PDC compatible. Hamoa had the software workaround
added due to hardware register bug mentioned in commit [1] which used
Hamoa/X1E80100 compatible to apply the workaround.

As the hardware bug mentioned in [1] is fixed on purwa silicon add purwa
compatible to avoid applying workaround meant for hamoa.

Patch 1 and 2 are not dependent while Patch 3 of the series was dependent
on [2] patches which are also already pulled in linux-next.

[1] https://lore.kernel.org/all/20250218-x1e80100-pdc-hw-wa-v2-1-29be4c98e355@linaro.org/
[2] https://lore.kernel.org/linux-arm-msm/CAMRc=MeU0QuRozMscv02M59+a66S05Jm18CyvNE-qSYrY=S7hQ@mail.gmail.com/

---
Changes in v3:
- Remove the dependency (b4 prerequisite-patch-id) as dependency is merged
- Rebase, Add reviewed-by, acked-by tags for first two changes
- Link to v2: https://patch.msgid.link/20260616-purwa-pdc-v2-0-8dda7ef25ce5@oss.qualcomm.com

Changes in v2:
- Remove Fixes tag from bindings
- Rename $subject to use hamoa and purwa name
- Add comment above compatible in devicetree
- Rebase and mark dependency
- Add new change to invoke SMC call for purwa PDC mode setting
- Link to v1: https://lore.kernel.org/r/20251231-purwa_pdc-v1-0-2b4979dd88ad@oss.qualcomm.com
---

To: Thomas Gleixner <tglx@kernel.org>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Bjorn Andersson <andersson@kernel.org>
To: Konrad Dybcio <konradybcio@kernel.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>

---
Maulik Shah (3):
      dt-bindings: interrupt-controller: qcom,pdc: Document Purwa PDC
      arm64: dts: qcom: purwa: Drop the Hamoa workaround for PDC
      irqchip/qcom-pdc: Add puwra compatible for PDC secondary mode

 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml | 1 +
 arch/arm64/boot/dts/qcom/purwa.dtsi                                  | 5 +++++
 drivers/irqchip/qcom-pdc.c                                           | 3 +++
 3 files changed, 9 insertions(+)
---
base-commit: ccb82733ff94d656a66447c374b16ecfdf8d4cb0
change-id: 20260616-purwa-pdc-198063b482b9

Best regards,
--  
Maulik Shah <maulik.shah@oss.qualcomm.com>

[PATCH v3 1/3] dt-bindings: interrupt-controller: qcom,pdc: Document Purwa PDC

[Maulik Shah]

X1P42100 (Purwa) shares the X1E80100 (Hamoa) PDC device, but the hardware
register bug addressed in commit e9a48ea4d90b ("irqchip/qcom-pdc:
Workaround hardware register bug on X1E80100") is already fixed in
X1P42100 silicon.

X1E80100 compatible forces the software workaround. Add PDC compatible
for purwa as "qcom,x1p42100-pdc" to remove the workaround from Purwa.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
---
 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
index 8162a49d49a6..b3d19c86a240 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
@@ -58,6 +58,7 @@ properties:
           - qcom,sm8650-pdc
           - qcom,sm8750-pdc
           - qcom,x1e80100-pdc
+          - qcom,x1p42100-pdc
       - const: qcom,pdc
 
   reg:

-- 
2.43.0

[PATCH v3 2/3] arm64: dts: qcom: purwa: Drop the Hamoa workaround for PDC

[Maulik Shah]

X1P42100 (Purwa) shares the X1E80100 (Hamoa) PDC device, but the hardware
register bug addressed in commit e9a48ea4d90b ("irqchip/qcom-pdc:
Workaround hardware register bug on X1E80100") is already fixed in
X1P42100 silicon.

X1E80100 compatible forces the software workaround. Use the X1P42100
specific compatible string for the PDC node to remove the workaround.

Fixes: f08edb529916 ("arm64: dts: qcom: Add X1P42100 SoC and CRD")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/purwa.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/purwa.dtsi b/arch/arm64/boot/dts/qcom/purwa.dtsi
index 3d73d1211cd0..591a89098a62 100644
--- a/arch/arm64/boot/dts/qcom/purwa.dtsi
+++ b/arch/arm64/boot/dts/qcom/purwa.dtsi
@@ -174,6 +174,11 @@ &pcie6a_phy {
 	compatible = "qcom,x1p42100-qmp-gen4x4-pcie-phy";
 };
 
+/* X1P42100 PDC is same as X1E80100, but without hardware register bug */
+&pdc {
+	compatible = "qcom,x1p42100-pdc", "qcom,pdc";
+};
+
 &qfprom {
 	gpu_speed_bin: gpu-speed-bin@119 {
 		reg = <0x119 0x2>;

-- 
2.43.0

[PATCH v3 3/3] irqchip/qcom-pdc: Add puwra compatible for PDC secondary mode

[Maulik Shah]

X1P42100 (Purwa) and X1E80100 (Hamoa) shares the same PDC and windows
firmware sets the PDC to secondary mode for X1P42100 too. Add support
to reset the PDC to pass through mode using qcom_scm_io_writel() similar
to X1E80100.

Make sure x1e_quirk to workaround a hardware bug is set only for X1E80100
as X1P42100 have this fixed in sillicon.

Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
---
 drivers/irqchip/qcom-pdc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c
index ce6d80c7f17a..29025a212ece 100644
--- a/drivers/irqchip/qcom-pdc.c
+++ b/drivers/irqchip/qcom-pdc.c
@@ -715,7 +715,10 @@ static int qcom_pdc_probe(struct platform_device *pdev, struct device_node *pare
 		}
 
 		pdc->x1e_quirk = true;
+	}
 
+	if (of_device_is_compatible(node, "qcom,x1e80100-pdc") ||
+	    of_device_is_compatible(node, "qcom,x1p42100-pdc")) {
 		if (!qcom_scm_is_available())
 			return -EPROBE_DEFER;
 

-- 
2.43.0

Re: [PATCH v3 0/3] purwa: Drop the Hamoa PDC workaround from purwa

[Konrad Dybcio]

On 7/15/26 3:21 PM, Maulik Shah wrote:
> Purwa shares the Hamoa PDC compatible. Hamoa had the software workaround
> added due to hardware register bug mentioned in commit [1] which used
> Hamoa/X1E80100 compatible to apply the workaround.
> 
> As the hardware bug mentioned in [1] is fixed on purwa silicon add purwa
> compatible to avoid applying workaround meant for hamoa.
> 
> Patch 1 and 2 are not dependent while Patch 3 of the series was dependent
> on [2] patches which are also already pulled in linux-next.
> 
> [1] https://lore.kernel.org/all/20250218-x1e80100-pdc-hw-wa-v2-1-29be4c98e355@linaro.org/
> [2] https://lore.kernel.org/linux-arm-msm/CAMRc=MeU0QuRozMscv02M59+a66S05Jm18CyvNE-qSYrY=S7hQ@mail.gmail.com/
> 
> ---

[...]

> Maulik Shah (3):
>       dt-bindings: interrupt-controller: qcom,pdc: Document Purwa PDC
>       arm64: dts: qcom: purwa: Drop the Hamoa workaround for PDC
>       irqchip/qcom-pdc: Add puwra compatible for PDC secondary mode

If applied in this order, we'll have a regression

Konrad

Re: [PATCH v3 2/3] arm64: dts: qcom: purwa: Drop the Hamoa workaround for PDC

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Removing the `qcom,x1e80100-pdc` compatible string to bypass the hardware register bug inadvertently also bypasses the firmware SCM call used to configure the PDC pass-through mode.
--

--- Patch [2]: [PATCH v3 2/3] arm64: dts: qcom: purwa: Drop the Hamoa workaround for PDC ---
commit e773040084ef92725984012956d31476c93e6557
Author: Maulik Shah <maulik.shah@oss.qualcomm.com>

arm64: dts: qcom: purwa: Drop the Hamoa workaround for PDC

This commit drops the "qcom,x1e80100-pdc" compatible string for the X1P42100
PDC node to remove a hardware register workaround. It replaces it with a
device-specific string and the generic "qcom,pdc" fallback.

> diff --git a/arch/arm64/boot/dts/qcom/purwa.dtsi b/arch/arm64/boot/dts/qcom/purwa.dtsi
> --- a/arch/arm64/boot/dts/qcom/purwa.dtsi
> +++ b/arch/arm64/boot/dts/qcom/purwa.dtsi
> @@ -174,6 +174,11 @@ &pcie6a_phy {
>  	compatible = "qcom,x1p42100-qmp-gen4x4-pcie-phy";
>  };
>  
> +/* X1P42100 PDC is same as X1E80100, but without hardware register bug */
> +&pdc {
> +	compatible = "qcom,x1p42100-pdc", "qcom,pdc";
> +};
> +

[Severity: Medium]
Does dropping the "qcom,x1e80100-pdc" compatible string also unintentionally
bypass the firmware SCM call needed to configure the PDC pass-through mode?

Looking at qcom_pdc_probe() in drivers/irqchip/qcom-pdc.c, the SCM call is
coupled directly to this compatible string:

drivers/irqchip/qcom-pdc.c:qcom_pdc_probe() {
    if (of_device_is_compatible(node, "qcom,x1e80100-pdc")) {
        pdc->prev_base = devm_ioremap(dev, res.start - PDC_DRV_SIZE,...);
        ...
        pdc->x1e_quirk = true;

        if (!qcom_scm_is_available())
            return -EPROBE_DEFER;

        ret = qcom_scm_io_writel(PDC_GPIO_INT_CTL_ENABLE, PDC_PASS_THROUGH_MODE);
        ...
    }
}

If the X1P firmware boots in secondary mode (similar to X1E firmware on CRD
boards), skipping this SCM call might cause the kernel to assume pass-through
mode while the hardware remains in secondary mode.

Could this lead to an interrupt storm and system lockup due to omitted
Ack/Clear operations for latched GPIO interrupts?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260715-purwa-pdc-v3-0-be08934dc916@oss.qualcomm.com?part=2

Re: [PATCH v3 2/3] arm64: dts: qcom: purwa: Drop the Hamoa workaround for PDC

[Krzysztof Kozlowski]

On Wed, Jul 15, 2026 at 06:52:01PM +0530, Maulik Shah wrote:
> X1P42100 (Purwa) shares the X1E80100 (Hamoa) PDC device, but the hardware
> register bug addressed in commit e9a48ea4d90b ("irqchip/qcom-pdc:
> Workaround hardware register bug on X1E80100") is already fixed in
> X1P42100 silicon.
> 
> X1E80100 compatible forces the software workaround. Use the X1P42100
> specific compatible string for the PDC node to remove the workaround.
> 
> Fixes: f08edb529916 ("arm64: dts: qcom: Add X1P42100 SoC and CRD")
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/purwa.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)

Why does the DT change appear in the middle of the patchset? Please read
submitting patches documents - both of them - and maintainer-soc
profile.

Best regards,
Krzysztof

Re: [PATCH v3 2/3] arm64: dts: qcom: purwa: Drop the Hamoa workaround for PDC

[Bjorn Andersson]

On Thu, Jul 16, 2026 at 09:59:44AM +0200, Krzysztof Kozlowski wrote:
> On Wed, Jul 15, 2026 at 06:52:01PM +0530, Maulik Shah wrote:
> > X1P42100 (Purwa) shares the X1E80100 (Hamoa) PDC device, but the hardware
> > register bug addressed in commit e9a48ea4d90b ("irqchip/qcom-pdc:
> > Workaround hardware register bug on X1E80100") is already fixed in
> > X1P42100 silicon.
> > 
> > X1E80100 compatible forces the software workaround. Use the X1P42100
> > specific compatible string for the PDC node to remove the workaround.
> > 
> > Fixes: f08edb529916 ("arm64: dts: qcom: Add X1P42100 SoC and CRD")
> > Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> > Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
> > ---
> >  arch/arm64/boot/dts/qcom/purwa.dtsi | 5 +++++
> >  1 file changed, 5 insertions(+)
> 
> Why does the DT change appear in the middle of the patchset? Please read
> submitting patches documents - both of them - and maintainer-soc
> profile.
> 

I thought I had figured it out, but I'm not sure anymore.

The claim from the cover letter is that patch 1 and 2 are completely
independent, but patch 3 depends on Bartosz's thank you letter [2] that
arrived a week before this series was sent out.

We're not merging the three changes through the same tree and there's no
expressed dependency between patch 2 and 3 (only implicitly by the order
in the series). But as Konrad points out, in-between patch 2 and 3 we
would not enable the secondary GPIO in the PDC driver, so Purwa would
have broken GPIOs for a while (not ok). I think merging them in the
opposite order would be what we want (i.e. 1, 3, then 2)


But this series implies that Purwa has been broken from the start - that
the PDC driver has always operated on the wrong registers.

Perhaps the impact of this was limited as there's not that many direct
&pdc references in the DT, but the patch that Bartosz's thank-you email
was sent for got merged as 77fbc756d9cb ("Revert "pinctrl: qcom:
x1e80100: Bypass PDC wakeup parent for now""), and that would make a lot
more use of the PDC.

So while nothing in this series states it, it sounds like Purwa might be
completely broken right now and this series aims to fix it?


It's not clear to me why the driver change doesn't have a Fixes tag, it
seems like the patch that introduced x1e_quirk was broken and should be
marked as Fixes.

[2] https://lore.kernel.org/linux-arm-msm/CAMRc=MeU0QuRozMscv02M59+a66S05Jm18CyvNE-qSYrY=S7hQ@mail.gmail.com/

Regards,
Bjorn

> Best regards,
> Krzysztof
> 

Re: [PATCH v3 2/3] arm64: dts: qcom: purwa: Drop the Hamoa workaround for PDC

[Maulik Shah (mkshah)]

On 7/17/2026 7:38 AM, Bjorn Andersson wrote:
> On Thu, Jul 16, 2026 at 09:59:44AM +0200, Krzysztof Kozlowski wrote:
>> On Wed, Jul 15, 2026 at 06:52:01PM +0530, Maulik Shah wrote:
>>> X1P42100 (Purwa) shares the X1E80100 (Hamoa) PDC device, but the hardware
>>> register bug addressed in commit e9a48ea4d90b ("irqchip/qcom-pdc:
>>> Workaround hardware register bug on X1E80100") is already fixed in
>>> X1P42100 silicon.
>>>
>>> X1E80100 compatible forces the software workaround. Use the X1P42100
>>> specific compatible string for the PDC node to remove the workaround.
>>>
>>> Fixes: f08edb529916 ("arm64: dts: qcom: Add X1P42100 SoC and CRD")
>>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>> Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
>>> ---
>>>  arch/arm64/boot/dts/qcom/purwa.dtsi | 5 +++++
>>>  1 file changed, 5 insertions(+)
>>
>> Why does the DT change appear in the middle of the patchset? Please read
>> submitting patches documents - both of them - and maintainer-soc
>> profile.
>>
> 
> I thought I had figured it out, but I'm not sure anymore.
> 
> The claim from the cover letter is that patch 1 and 2 are completely
> independent, but patch 3 depends on Bartosz's thank you letter [2] that
> arrived a week before this series was sent out.
> 
> We're not merging the three changes through the same tree and there's no
> expressed dependency between patch 2 and 3 (only implicitly by the order
> in the series). But as Konrad points out, in-between patch 2 and 3 we
> would not enable the secondary GPIO in the PDC driver, so Purwa would
> have broken GPIOs for a while (not ok). I think merging them in the
> opposite order would be what we want (i.e. 1, 3, then 2)

purwa-iot-evk.dts where firmware sets pass through mode, so current order of the patch seems to be ok.
(patch 3 as such is no impact for iot evk)

x1p42100-crd.dts where firmware sets secondary mode, applying in 1, 2, and then 3 may leave crd boards
in broken GPIOs for a while after [2],  so yes order 1, 3, and then 2 makes more sense.

patch 1/2 - fixes the purwa to operate on correct registers.
patch 3 - Allow crd boards to re-set the mode to pass through

> 
> 
> But this series implies that Purwa has been broken from the start - that
> the PDC driver has always operated on the wrong registers.

yes, purwa always operated on the wrong registers.

> 
> Perhaps the impact of this was limited as there's not that many direct
> &pdc references in the DT, but the patch that Bartosz's thank-you email
> was sent for got merged as 77fbc756d9cb ("Revert "pinctrl: qcom:
> x1e80100: Bypass PDC wakeup parent for now""), and that would make a lot
> more use of the PDC.
> 
> So while nothing in this series states it, it sounds like Purwa might be
> completely broken right now and this series aims to fix it?
> 
> 
> It's not clear to me why the driver change doesn't have a Fixes tag, it
> seems like the patch that introduced x1e_quirk was broken and should be
> marked as Fixes.

x1e_quirk in the driver via commit e9a48ea4d90b ("irqchip/qcom-pdc: Workaround hardware register bug on X1E80100")
says only about x1e/ hamoa specific bug, it seemed it never wanted to enable the quirk for x1p / purwa. the quirk
rather got anyway enabled for purwa due to both hamoa/purwa sharing the same compatible.

Patch 1/2 of the series aims to fix this (and patch-2 carries the fixes: tag).

Thanks,
Maulik

> 
> [2] https://lore.kernel.org/linux-arm-msm/CAMRc=MeU0QuRozMscv02M59+a66S05Jm18CyvNE-qSYrY=S7hQ@mail.gmail.com/
> 
> Regards,
> Bjorn
> 
>> Best regards,
>> Krzysztof
>>