* [PATCH v2 0/1] target/i386: Add support for KVM APERF/MPERF passthrough
@ 2026-06-02 14:03 Anderson Nascimento
2026-06-02 14:03 ` [PATCH v2 1/1] " Anderson Nascimento
0 siblings, 1 reply; 5+ messages in thread
From: Anderson Nascimento @ 2026-06-02 14:03 UTC (permalink / raw)
To: qemu-devel, kvm, pbonzini, zhao1.liu, mtosatti; +Cc: Anderson Nascimento
Hello,
I have implemented support for exposing and enabling APERF/MPERF
MSR passthrough for x86 QEMU guests when running on KVM.
As of last year, the Linux kernel supports providing a capability
to disable APERF/MPERF read intercepts [1]. However, there is
currently no native way in QEMU to instruct KVM to activate this
capability or expose the feature bit cleanly via CPUID.
My patch introduces the `aperfmperf` feature flag via `FEAT_6_ECX`
(CPUID.06H:ECX[bit 0]). It ties into the existing power management
framework, so when a user enables power management via
`-overcommit cpu-pm=on` and passes `+aperfmperf` to the CPU, QEMU
requests KVM to drop the MSR intercepts.
For testing, I passed the feature via Libvirt XML like so:
<qemu:arg value="-overcommit"/>
<qemu:arg value="cpu-pm=on"/>
<qemu:arg value="-cpu"/>
<qemu:arg value="host,+aperfmperf,+invtsc"/>
A FreeBSD 16 guest is successfully able to read the changing
values of the MSRs directly without exiting to the hypervisor:
root@freebsd16development:/home/user # cpucontrol -i 6 /dev/cpuctl0
cpuid level 0x6: 0x00000004 0x00000000 0x00000001 0x00000000
root@freebsd16development:/home/user # cpucontrol -m 0xe7 /dev/cpuctl0
MSR 0xe7: 0x00007fdf 0x22480f90
root@freebsd16development:/home/user # cpucontrol -m 0xe7 /dev/cpuctl0
MSR 0xe7: 0x00007fdf 0x2b8b48b0
root@freebsd16development:/home/user # cpucontrol -m 0xe8 /dev/cpuctl0
MSR 0xe8: 0x000050de 0x49270831
root@freebsd16development:/home/user # cpucontrol -m 0xe8 /dev/cpuctl0
MSR 0xe8: 0x000050de 0x4ad66ae6
root@freebsd16development:/home/user #
Based-on: QEMU v11.0.50 (commit 5611a9268d)
v1 -> v2 changelog:
- Add migration flags
Anderson Nascimento (1):
target/i386: Add support for KVM APERF/MPERF passthrough
target/i386/cpu.c | 18 +++++++++++++++++-
target/i386/cpu.h | 2 ++
target/i386/kvm/kvm.c | 5 ++++-
3 files changed, 23 insertions(+), 2 deletions(-)
--
2.54.0
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2 1/1] target/i386: Add support for KVM APERF/MPERF passthrough
2026-06-02 14:03 [PATCH v2 0/1] target/i386: Add support for KVM APERF/MPERF passthrough Anderson Nascimento
@ 2026-06-02 14:03 ` Anderson Nascimento
2026-06-26 0:50 ` Anderson Nascimento
2026-07-23 8:48 ` Zhao Liu
0 siblings, 2 replies; 5+ messages in thread
From: Anderson Nascimento @ 2026-06-02 14:03 UTC (permalink / raw)
To: qemu-devel, kvm, pbonzini, zhao1.liu, mtosatti; +Cc: Anderson Nascimento
Introduce support for exposing and enabling APERF/MPERF MSR passthrough
for x86 QEMU guests when running under KVM.
The Linux kernel supports a KVM capability allowing the hypervisor to
disable read intercepts on the IA32_APERF and IA32_MPERF MSRs, enabling
guests to track effective frequency directly without VM-exits. QEMU
currently lacks a native way to request this capability or expose the
corresponding feature bit to the guest.
This patch adds the `aperfmperf` feature flag via `FEAT_6_ECX`
(CPUID.06H:ECX[bit 0]). To ensure safe tracking across power states,
the flag ties into QEMU's existing host power management framework.
When host CPU power management is explicitly requested by the user
(via `-overcommit cpu-pm=on`) and the `+aperfmperf` flag is provided
to the CPU, QEMU will invoke the KVM ioctl to drop the APERF/MPERF
MSR read intercepts.
This implementation allows guest operating systems (such as FreeBSD
or Linux) to dynamically calculate CPU utilization and turbo-boost
metrics without incurring performance overhead from hypervisor trap-and-
emulate loops.
Signed-off-by: Anderson Nascimento <anderson@allelesecurity.com>
---
Changes in v2
- Added migration flags
- Link to v1: https://lore.kernel.org/all/20260602022048.752453-1-anderson@allelesecurity.com/
target/i386/cpu.c | 18 +++++++++++++++++-
target/i386/cpu.h | 2 ++
target/i386/kvm/kvm.c | 5 ++++-
3 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 8929a75c7c..544738d406 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1544,6 +1544,22 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
.cpuid = { .eax = 6, .reg = R_EAX, },
.tcg_features = TCG_6_EAX_FEATURES,
},
+ [FEAT_6_ECX] = {
+ .type = CPUID_FEATURE_WORD,
+ .feat_names = {
+ "aperfmperf", NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ },
+ .cpuid = { .eax = 6, .reg = R_ECX, },
+ .tcg_features = 0,
+ .unmigratable_flags = CPUID_6_ECX_APERFMPERF,
+ },
[FEAT_XSAVE_XCR0_LO] = {
.type = CPUID_FEATURE_WORD,
.cpuid = {
@@ -8770,7 +8786,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
/* Thermal and Power Leaf */
*eax = env->features[FEAT_6_EAX];
*ebx = 0;
- *ecx = 0;
+ *ecx = env->features[FEAT_6_ECX];
*edx = 0;
break;
case 7:
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 67e2ecf325..87864969c7 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -700,6 +700,7 @@ typedef enum FeatureWord {
FEAT_SVM, /* CPUID[8000_000A].EDX */
FEAT_XSAVE, /* CPUID[EAX=0xd,ECX=1].EAX */
FEAT_6_EAX, /* CPUID[6].EAX */
+ FEAT_6_ECX, /* CPUID[6].ECX */
FEAT_XSAVE_XCR0_LO, /* CPUID[EAX=0xd,ECX=0].EAX */
FEAT_XSAVE_XCR0_HI, /* CPUID[EAX=0xd,ECX=0].EDX */
FEAT_ARCH_CAPABILITIES,
@@ -1232,6 +1233,7 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w);
#define CPUID_XSAVE_XFD (1U << 4)
#define CPUID_6_EAX_ARAT (1U << 2)
+#define CPUID_6_ECX_APERFMPERF (1U << 0)
/* CPUID[0x80000007].EDX flags: */
#define CPUID_APM_INVTSC (1U << 8)
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index 9e352882c8..ca722ff9e9 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -498,6 +498,8 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function,
}
} else if (function == 6 && reg == R_EAX) {
ret |= CPUID_6_EAX_ARAT; /* safe to allow because of emulated APIC */
+ } else if (function == 6 && reg == R_ECX) {
+ ret |= CPUID_6_ECX_APERFMPERF;
} else if (function == 7 && index == 0 && reg == R_EBX) {
/* Not new instructions, just an optimization. */
uint32_t ebx;
@@ -3291,7 +3293,8 @@ static int kvm_vm_enable_disable_exits(KVMState *s)
disable_exits &= (KVM_X86_DISABLE_EXITS_MWAIT |
KVM_X86_DISABLE_EXITS_HLT |
KVM_X86_DISABLE_EXITS_PAUSE |
- KVM_X86_DISABLE_EXITS_CSTATE);
+ KVM_X86_DISABLE_EXITS_CSTATE |
+ KVM_X86_DISABLE_EXITS_APERFMPERF);
}
return kvm_vm_enable_cap(s, KVM_CAP_X86_DISABLE_EXITS, 0,
--
2.54.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/1] target/i386: Add support for KVM APERF/MPERF passthrough
2026-06-02 14:03 ` [PATCH v2 1/1] " Anderson Nascimento
@ 2026-06-26 0:50 ` Anderson Nascimento
2026-07-15 15:59 ` Anderson Nascimento
2026-07-23 8:48 ` Zhao Liu
1 sibling, 1 reply; 5+ messages in thread
From: Anderson Nascimento @ 2026-06-26 0:50 UTC (permalink / raw)
To: qemu-devel, kvm, pbonzini, zhao1.liu, mtosatti
On Tue, Jun 2, 2026 at 11:05 AM Anderson Nascimento
<anderson@allelesecurity.com> wrote:
>
> Introduce support for exposing and enabling APERF/MPERF MSR passthrough
> for x86 QEMU guests when running under KVM.
>
> The Linux kernel supports a KVM capability allowing the hypervisor to
> disable read intercepts on the IA32_APERF and IA32_MPERF MSRs, enabling
> guests to track effective frequency directly without VM-exits. QEMU
> currently lacks a native way to request this capability or expose the
> corresponding feature bit to the guest.
>
> This patch adds the `aperfmperf` feature flag via `FEAT_6_ECX`
> (CPUID.06H:ECX[bit 0]). To ensure safe tracking across power states,
> the flag ties into QEMU's existing host power management framework.
> When host CPU power management is explicitly requested by the user
> (via `-overcommit cpu-pm=on`) and the `+aperfmperf` flag is provided
> to the CPU, QEMU will invoke the KVM ioctl to drop the APERF/MPERF
> MSR read intercepts.
>
> This implementation allows guest operating systems (such as FreeBSD
> or Linux) to dynamically calculate CPU utilization and turbo-boost
> metrics without incurring performance overhead from hypervisor trap-and-
> emulate loops.
>
> Signed-off-by: Anderson Nascimento <anderson@allelesecurity.com>
> ---
> Changes in v2
> - Added migration flags
> - Link to v1: https://lore.kernel.org/all/20260602022048.752453-1-anderson@allelesecurity.com/
>
> target/i386/cpu.c | 18 +++++++++++++++++-
> target/i386/cpu.h | 2 ++
> target/i386/kvm/kvm.c | 5 ++++-
> 3 files changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 8929a75c7c..544738d406 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -1544,6 +1544,22 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
> .cpuid = { .eax = 6, .reg = R_EAX, },
> .tcg_features = TCG_6_EAX_FEATURES,
> },
> + [FEAT_6_ECX] = {
> + .type = CPUID_FEATURE_WORD,
> + .feat_names = {
> + "aperfmperf", NULL, NULL, NULL,
> + NULL, NULL, NULL, NULL,
> + NULL, NULL, NULL, NULL,
> + NULL, NULL, NULL, NULL,
> + NULL, NULL, NULL, NULL,
> + NULL, NULL, NULL, NULL,
> + NULL, NULL, NULL, NULL,
> + NULL, NULL, NULL, NULL,
> + },
> + .cpuid = { .eax = 6, .reg = R_ECX, },
> + .tcg_features = 0,
> + .unmigratable_flags = CPUID_6_ECX_APERFMPERF,
> + },
> [FEAT_XSAVE_XCR0_LO] = {
> .type = CPUID_FEATURE_WORD,
> .cpuid = {
> @@ -8770,7 +8786,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> /* Thermal and Power Leaf */
> *eax = env->features[FEAT_6_EAX];
> *ebx = 0;
> - *ecx = 0;
> + *ecx = env->features[FEAT_6_ECX];
> *edx = 0;
> break;
> case 7:
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index 67e2ecf325..87864969c7 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -700,6 +700,7 @@ typedef enum FeatureWord {
> FEAT_SVM, /* CPUID[8000_000A].EDX */
> FEAT_XSAVE, /* CPUID[EAX=0xd,ECX=1].EAX */
> FEAT_6_EAX, /* CPUID[6].EAX */
> + FEAT_6_ECX, /* CPUID[6].ECX */
> FEAT_XSAVE_XCR0_LO, /* CPUID[EAX=0xd,ECX=0].EAX */
> FEAT_XSAVE_XCR0_HI, /* CPUID[EAX=0xd,ECX=0].EDX */
> FEAT_ARCH_CAPABILITIES,
> @@ -1232,6 +1233,7 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w);
> #define CPUID_XSAVE_XFD (1U << 4)
>
> #define CPUID_6_EAX_ARAT (1U << 2)
> +#define CPUID_6_ECX_APERFMPERF (1U << 0)
>
> /* CPUID[0x80000007].EDX flags: */
> #define CPUID_APM_INVTSC (1U << 8)
> diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
> index 9e352882c8..ca722ff9e9 100644
> --- a/target/i386/kvm/kvm.c
> +++ b/target/i386/kvm/kvm.c
> @@ -498,6 +498,8 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function,
> }
> } else if (function == 6 && reg == R_EAX) {
> ret |= CPUID_6_EAX_ARAT; /* safe to allow because of emulated APIC */
> + } else if (function == 6 && reg == R_ECX) {
> + ret |= CPUID_6_ECX_APERFMPERF;
> } else if (function == 7 && index == 0 && reg == R_EBX) {
> /* Not new instructions, just an optimization. */
> uint32_t ebx;
> @@ -3291,7 +3293,8 @@ static int kvm_vm_enable_disable_exits(KVMState *s)
> disable_exits &= (KVM_X86_DISABLE_EXITS_MWAIT |
> KVM_X86_DISABLE_EXITS_HLT |
> KVM_X86_DISABLE_EXITS_PAUSE |
> - KVM_X86_DISABLE_EXITS_CSTATE);
> + KVM_X86_DISABLE_EXITS_CSTATE |
> + KVM_X86_DISABLE_EXITS_APERFMPERF);
> }
>
> return kvm_vm_enable_cap(s, KVM_CAP_X86_DISABLE_EXITS, 0,
> --
> 2.54.0
>
ping
Is there anything I should do to get this patch applied?
--
Anderson Nascimento
Allele Security Intelligence
https://www.allelesecurity.com
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/1] target/i386: Add support for KVM APERF/MPERF passthrough
2026-06-26 0:50 ` Anderson Nascimento
@ 2026-07-15 15:59 ` Anderson Nascimento
0 siblings, 0 replies; 5+ messages in thread
From: Anderson Nascimento @ 2026-07-15 15:59 UTC (permalink / raw)
To: qemu-devel, kvm, pbonzini, zhao1.liu, mtosatti
ping
On Thu, Jun 25, 2026 at 9:50 PM Anderson Nascimento
<anderson@allelesecurity.com> wrote:
>
> On Tue, Jun 2, 2026 at 11:05 AM Anderson Nascimento
> <anderson@allelesecurity.com> wrote:
> >
> > Introduce support for exposing and enabling APERF/MPERF MSR passthrough
> > for x86 QEMU guests when running under KVM.
> >
> > The Linux kernel supports a KVM capability allowing the hypervisor to
> > disable read intercepts on the IA32_APERF and IA32_MPERF MSRs, enabling
> > guests to track effective frequency directly without VM-exits. QEMU
> > currently lacks a native way to request this capability or expose the
> > corresponding feature bit to the guest.
> >
> > This patch adds the `aperfmperf` feature flag via `FEAT_6_ECX`
> > (CPUID.06H:ECX[bit 0]). To ensure safe tracking across power states,
> > the flag ties into QEMU's existing host power management framework.
> > When host CPU power management is explicitly requested by the user
> > (via `-overcommit cpu-pm=on`) and the `+aperfmperf` flag is provided
> > to the CPU, QEMU will invoke the KVM ioctl to drop the APERF/MPERF
> > MSR read intercepts.
> >
> > This implementation allows guest operating systems (such as FreeBSD
> > or Linux) to dynamically calculate CPU utilization and turbo-boost
> > metrics without incurring performance overhead from hypervisor trap-and-
> > emulate loops.
> >
> > Signed-off-by: Anderson Nascimento <anderson@allelesecurity.com>
> > ---
> > Changes in v2
> > - Added migration flags
> > - Link to v1: https://lore.kernel.org/all/20260602022048.752453-1-anderson@allelesecurity.com/
> >
> > target/i386/cpu.c | 18 +++++++++++++++++-
> > target/i386/cpu.h | 2 ++
> > target/i386/kvm/kvm.c | 5 ++++-
> > 3 files changed, 23 insertions(+), 2 deletions(-)
> >
> > diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> > index 8929a75c7c..544738d406 100644
> > --- a/target/i386/cpu.c
> > +++ b/target/i386/cpu.c
> > @@ -1544,6 +1544,22 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
> > .cpuid = { .eax = 6, .reg = R_EAX, },
> > .tcg_features = TCG_6_EAX_FEATURES,
> > },
> > + [FEAT_6_ECX] = {
> > + .type = CPUID_FEATURE_WORD,
> > + .feat_names = {
> > + "aperfmperf", NULL, NULL, NULL,
> > + NULL, NULL, NULL, NULL,
> > + NULL, NULL, NULL, NULL,
> > + NULL, NULL, NULL, NULL,
> > + NULL, NULL, NULL, NULL,
> > + NULL, NULL, NULL, NULL,
> > + NULL, NULL, NULL, NULL,
> > + NULL, NULL, NULL, NULL,
> > + },
> > + .cpuid = { .eax = 6, .reg = R_ECX, },
> > + .tcg_features = 0,
> > + .unmigratable_flags = CPUID_6_ECX_APERFMPERF,
> > + },
> > [FEAT_XSAVE_XCR0_LO] = {
> > .type = CPUID_FEATURE_WORD,
> > .cpuid = {
> > @@ -8770,7 +8786,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> > /* Thermal and Power Leaf */
> > *eax = env->features[FEAT_6_EAX];
> > *ebx = 0;
> > - *ecx = 0;
> > + *ecx = env->features[FEAT_6_ECX];
> > *edx = 0;
> > break;
> > case 7:
> > diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> > index 67e2ecf325..87864969c7 100644
> > --- a/target/i386/cpu.h
> > +++ b/target/i386/cpu.h
> > @@ -700,6 +700,7 @@ typedef enum FeatureWord {
> > FEAT_SVM, /* CPUID[8000_000A].EDX */
> > FEAT_XSAVE, /* CPUID[EAX=0xd,ECX=1].EAX */
> > FEAT_6_EAX, /* CPUID[6].EAX */
> > + FEAT_6_ECX, /* CPUID[6].ECX */
> > FEAT_XSAVE_XCR0_LO, /* CPUID[EAX=0xd,ECX=0].EAX */
> > FEAT_XSAVE_XCR0_HI, /* CPUID[EAX=0xd,ECX=0].EDX */
> > FEAT_ARCH_CAPABILITIES,
> > @@ -1232,6 +1233,7 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w);
> > #define CPUID_XSAVE_XFD (1U << 4)
> >
> > #define CPUID_6_EAX_ARAT (1U << 2)
> > +#define CPUID_6_ECX_APERFMPERF (1U << 0)
> >
> > /* CPUID[0x80000007].EDX flags: */
> > #define CPUID_APM_INVTSC (1U << 8)
> > diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
> > index 9e352882c8..ca722ff9e9 100644
> > --- a/target/i386/kvm/kvm.c
> > +++ b/target/i386/kvm/kvm.c
> > @@ -498,6 +498,8 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function,
> > }
> > } else if (function == 6 && reg == R_EAX) {
> > ret |= CPUID_6_EAX_ARAT; /* safe to allow because of emulated APIC */
> > + } else if (function == 6 && reg == R_ECX) {
> > + ret |= CPUID_6_ECX_APERFMPERF;
> > } else if (function == 7 && index == 0 && reg == R_EBX) {
> > /* Not new instructions, just an optimization. */
> > uint32_t ebx;
> > @@ -3291,7 +3293,8 @@ static int kvm_vm_enable_disable_exits(KVMState *s)
> > disable_exits &= (KVM_X86_DISABLE_EXITS_MWAIT |
> > KVM_X86_DISABLE_EXITS_HLT |
> > KVM_X86_DISABLE_EXITS_PAUSE |
> > - KVM_X86_DISABLE_EXITS_CSTATE);
> > + KVM_X86_DISABLE_EXITS_CSTATE |
> > + KVM_X86_DISABLE_EXITS_APERFMPERF);
> > }
> >
> > return kvm_vm_enable_cap(s, KVM_CAP_X86_DISABLE_EXITS, 0,
> > --
> > 2.54.0
> >
>
> ping
>
> Is there anything I should do to get this patch applied?
>
> --
> Anderson Nascimento
> Allele Security Intelligence
> https://www.allelesecurity.com
--
Anderson Nascimento
Allele Security Intelligence
https://www.allelesecurity.com
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/1] target/i386: Add support for KVM APERF/MPERF passthrough
2026-06-02 14:03 ` [PATCH v2 1/1] " Anderson Nascimento
2026-06-26 0:50 ` Anderson Nascimento
@ 2026-07-23 8:48 ` Zhao Liu
1 sibling, 0 replies; 5+ messages in thread
From: Zhao Liu @ 2026-07-23 8:48 UTC (permalink / raw)
To: Anderson Nascimento; +Cc: qemu-devel, kvm, pbonzini, mtosatti
Hi Anderson,
> + [FEAT_6_ECX] = {
> + .type = CPUID_FEATURE_WORD,
> + .feat_names = {
> + "aperfmperf", NULL, NULL, NULL,
> + NULL, NULL, NULL, NULL,
> + NULL, NULL, NULL, NULL,
> + NULL, NULL, NULL, NULL,
> + NULL, NULL, NULL, NULL,
> + NULL, NULL, NULL, NULL,
> + NULL, NULL, NULL, NULL,
> + NULL, NULL, NULL, NULL,
> + },
> + .cpuid = { .eax = 6, .reg = R_ECX, },
> + .tcg_features = 0,
> + .unmigratable_flags = CPUID_6_ECX_APERFMPERF,
Considerring APER/MPERF passthrough have many specific restrictions
(listed in KVM's api.rst, "7.13 KVM_CAP_X86_DISABLE_EXITS"), I think
we also need not to enable it by default for max/host CPUs:
.no_autoenable_flags = CPUID_6_ECX_APERFMPERF
This indicates that users must manually enable this feature, and it is
assumed that they are aware of its limitations and have implemented
appropriate policies (such as no preemption, vCPU affinity, no idle or
C state in the guest, etc.).
> + },
...
> /* CPUID[0x80000007].EDX flags: */
> #define CPUID_APM_INVTSC (1U << 8)
> diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
> index 9e352882c8..ca722ff9e9 100644
> --- a/target/i386/kvm/kvm.c
> +++ b/target/i386/kvm/kvm.c
> @@ -498,6 +498,8 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function,
> }
> } else if (function == 6 && reg == R_EAX) {
> ret |= CPUID_6_EAX_ARAT; /* safe to allow because of emulated APIC */
> + } else if (function == 6 && reg == R_ECX) {
> + ret |= CPUID_6_ECX_APERFMPERF;
if we bind this feature to cpu-pm, then we should check enable_cpu_pm
before setting CPUID. Otherwise, if this CPUID is present but
cpu-pm=off, Guest may try to access related MSRs and triggers #GP.
if (enable_cpu_pm) {
int disable_exits = kvm_check_extension(s,
KVM_CAP_X86_DISABLE_EXITS);
if (disable_exits & KVM_X86_DISABLE_EXITS_APERFMPERF) {
ret |= CPUID_6_ECX_APERFMPERF;
}
}
But on the other hande, maybe we don't need to bind this feature to
cpu-pm?
For example, a compute-intensive workload doesn't allow the Guest to
enter idle, then it still seems make sense to estimate performance
using aperf and mperf?
Thanks,
Zhao
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2026-07-23 8:49 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-06-02 14:03 [PATCH v2 0/1] target/i386: Add support for KVM APERF/MPERF passthrough Anderson Nascimento
2026-06-02 14:03 ` [PATCH v2 1/1] " Anderson Nascimento
2026-06-26 0:50 ` Anderson Nascimento
2026-07-15 15:59 ` Anderson Nascimento
2026-07-23 8:48 ` Zhao Liu
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