[PATCH v6 0/3] drm/xe: make CTX_TIMESTAMP TOCTOU-safe and handle sentinels

[PATCH v6 0/3] drm/xe: make CTX_TIMESTAMP TOCTOU-safe and handle sentinels

[Gajendra Uttamchand]

Fix timestamp handling for Xe LRC contexts to avoid races and false
timeout detection. This patch documents and centralises the
CONTEXT_ACTIVE sentinel and makes MMIO reads of CTX_TIMESTAMP TOCTOU-
safe by verifying the LRC-stored timestamp before and after the MMIO
read.

Fixes: d243ef6a39c6 ("drm/xe/lrc: Refactor xe_lrc_timestamp to simplify logic")

v2:
Dropped the redundant second patch (Matt Brost)

v3:
Added the Fixes tag for the original commit (Umesh Nerlige)

v4:
Added Reviewed-by for the original commit (Umesh Nerlige)
Added Acked-by for the original commit (Matt Brost)

v5:
Fix incorrect 'From:' username in commit header (Kamil)"

v6:
Fix AI review comments from sashiko.dev
 - Fix torn read of CTX_TIMESTAMP from LRC
 - Fix ABA race on engine migration in context timestamp read

Gajendra Uttamchand (3):
  drm/xe/lrc: document sentinel and make CTX_TIMESTAMP read TOCTOU-safe
  drm/xe/lrc: Fix torn read of CTX_TIMESTAMP from LRC
  drm/xe/lrc: Fix ABA race on engine migration in context timestamp read

 drivers/gpu/drm/xe/xe_lrc.c | 88 ++++++++++++++++++++++++++++++-------
 drivers/gpu/drm/xe/xe_lrc.h |  7 +++
 2 files changed, 80 insertions(+), 15 deletions(-)

--
2.43.0

[PATCH v6 1/3] [PATCH] drm/xe/lrc: document sentinel and make CTX_TIMESTAMP read TOCTOU-safe

[Gajendra Uttamchand]

Problem: CTX_TIMESTAMP MMIO reads could be stale if a context
switched out between check and read; LRC stores a sentinel while
a context starts that must not be treated as a real timestamp.

Fix: Check the LRC-stored sentinel before and after the MMIO read;
return the LRC value if the context switched out to avoid TOCTOU.

Note: Keep XE_LRC_CTX_TIMESTAMP_ACTIVE in xe_lrc.h as the
canonical sentinel.

Signed-off-by: Gajendra Uttamchand <gajendra.uttamchand@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Acked-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_lrc.c | 29 +++++++++++++++++++++--------
 drivers/gpu/drm/xe/xe_lrc.h |  7 +++++++
 2 files changed, 28 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index a4292a11391d..e284c008c126 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -1096,7 +1096,7 @@ static void xe_lrc_finish(struct xe_lrc *lrc)
  * on until it is scheduled, we also read the ENGINE_ID MMIO in the WA BB and
  * store it in the PPHSWP.
  */
-#define CONTEXT_ACTIVE 1ULL
+#define CONTEXT_ACTIVE XE_LRC_CTX_TIMESTAMP_ACTIVE
 static ssize_t setup_utilization_wa(struct xe_lrc *lrc,
 				    struct xe_hw_engine *hwe,
 				    u32 *batch,
@@ -2720,21 +2720,34 @@ static u64 xe_lrc_update_multi_queue_timestamp(struct xe_lrc *lrc, u64 *old_ts)
 static u64 xe_lrc_context_timestamp(struct xe_lrc *lrc)
 {
 	u64 reg_ts, new_ts = lrc->ctx_timestamp;
+	u64 stored;

 	/* CTX_TIMESTAMP mmio read is invalid on VF, so return the LRC value */
 	if (IS_SRIOV_VF(lrc_to_xe(lrc)))
 		return xe_lrc_ctx_timestamp(lrc);

-	if (context_active(lrc) &&
-	    !get_ctx_timestamp(lrc, xe_lrc_engine_id(lrc), &reg_ts))
+	/*
+	 * Safely read CTX_TIMESTAMP: check the LRC-stored value before and
+	 * after the MMIO read to avoid a TOCTOU where a context switch makes the
+	 * MMIO value stale. If the LRC value is not `CONTEXT_ACTIVE` return it;
+	 * otherwise accept the MMIO value only if the context remained active.
+	 */
+
+	stored = xe_lrc_ctx_timestamp(lrc);
+	if (stored != CONTEXT_ACTIVE)
+		return stored;
+
+	/* Context is active: read the live timestamp from the engine's MMIO register. */
+	if (!get_ctx_timestamp(lrc, xe_lrc_engine_id(lrc), &reg_ts))
 		new_ts = reg_ts;

-	/*
-	 * If context swicthed out while we were here, just return the latest
-	 * LRC CTX TIMESTAMP value.
+	/* Re-check the LRC-stored timestamp: if the context switched out while
+	 * reading MMIO the hardware saved the canonical timestamp into the LRC
+	 * during context-save, so return that value instead of the MMIO read.
 	 */
-	if (!context_active(lrc))
-		return xe_lrc_ctx_timestamp(lrc);
+	stored = xe_lrc_ctx_timestamp(lrc);
+	if (stored != CONTEXT_ACTIVE)
+		return stored;

 	return new_ts;
 }
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index 0a3a611391ee..7be5e3da8bc8 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -9,6 +9,13 @@

 #include "xe_lrc_types.h"

+/*
+ * Sentinel value stored in lrc->ctx_timestamp while a context is starting.
+ * The hardware hasn't yet written the real CTX_TIMESTAMP, so this is not a
+ * valid elapsed-time sample and must not be used as one.
+ */
+#define XE_LRC_CTX_TIMESTAMP_ACTIVE 1ULL
+
 struct drm_printer;
 struct xe_bb;
 struct xe_device;
--
2.43.0

[PATCH v6 2/3] drm/xe/lrc: Fix torn read of CTX_TIMESTAMP from LRC

[Gajendra Uttamchand]

xe_lrc_ctx_timestamp() reads the 64-bit CTX_TIMESTAMP value stored in
the LRC as two independent 32-bit reads (ldw, then udw). The GPU can
concurrently overwrite this location as part of a context-save, so a
plain back-to-back read of the two dwords can observe a torn
combination that matches neither the previous value (e.g. the
CONTEXT_ACTIVE sentinel written on context-restore) nor the final
saved timestamp written by hardware. Callers such as context_active()
and xe_lrc_context_timestamp() rely on this value being coherent to
decide whether the context is still active, so a torn read can lead to
an incorrect/garbage timestamp being sampled or reported.

Make xe_lrc_ctx_timestamp() robust against torn reads by reading the
upper 32-bit half first and re-reading the lower/upper pair until the
upper half stabilizes across two consecutive reads (bounded to a small
retry limit), then combine them into the final 64-bit value.

This fixes the problem at the source so all callers get a coherent
timestamp, instead of patching individual callers.

Signed-off-by: Gajendra Uttamchand <gajendra.uttamchand@intel.com>
---
 drivers/gpu/drm/xe/xe_lrc.c | 27 +++++++++++++++++++++++----
 1 file changed, 23 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index e284c008c126..1e910669e8d1 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -868,20 +868,39 @@ u32 xe_lrc_ctx_timestamp_udw_ggtt_addr(struct xe_lrc *lrc)
  * xe_lrc_ctx_timestamp() - Read ctx timestamp value
  * @lrc: Pointer to the lrc.
  *
+ * The ldw and udw halves are stored at independent offsets and can be
+ * written by the GPU (context-save) concurrently with this read, so a
+ * naive back-to-back read of the two dwords can observe a torn value
+ * that matches neither the previous value (e.g. the CONTEXT_ACTIVE
+ * sentinel) nor the final saved timestamp. Guard against that by
+ * re-reading until the udw half stabilizes across two consecutive reads.
+ *
  * Returns: ctx timestamp value
  */
 static u64 xe_lrc_ctx_timestamp(struct xe_lrc *lrc)
 {
 	struct xe_device *xe = lrc_to_xe(lrc);
 	struct iosys_map map;
-	u32 ldw, udw = 0;
+	u32 ldw, udw = 0, old_udw;
+	int retries;

-	map = __xe_lrc_ctx_timestamp_map(lrc);
-	ldw = xe_map_read32(xe, &map);
+	if (!xe->info.has_64bit_timestamp) {
+		map = __xe_lrc_ctx_timestamp_map(lrc);
+		return xe_map_read32(xe, &map);
+	}

-	if (xe->info.has_64bit_timestamp) {
+	map = __xe_lrc_ctx_timestamp_udw_map(lrc);
+	old_udw = xe_map_read32(xe, &map);
+	for (retries = 5; retries; --retries) {
+		map = __xe_lrc_ctx_timestamp_map(lrc);
+		ldw = xe_map_read32(xe, &map);
 		map = __xe_lrc_ctx_timestamp_udw_map(lrc);
 		udw = xe_map_read32(xe, &map);
+
+		if (udw == old_udw)
+			break;
+
+		old_udw = udw;
 	}

 	return (u64)udw << 32 | ldw;
--
2.43.0

[PATCH v6 3/3] drm/xe/lrc: Fix ABA race on engine migration in context timestamp read

[Gajendra Uttamchand]

xe_lrc_context_timestamp() reads the engine id once via
xe_lrc_engine_id(lrc) and uses it to fetch the live CTX_TIMESTAMP MMIO
register, then re-checks the LRC-stored value to detect whether the
context switched out while the MMIO read was in flight. That check
only confirms the context is (still/again) active - it does not
confirm it is active on the *same* engine the MMIO read targeted.

If the context is saved and restored onto a different engine between
the initial engine id read and the final activity check, the
CONTEXT_ACTIVE sentinel will be observed again (now for the new
engine), and the stale MMIO value read from the old, now-unrelated
engine is returned as if it were valid.

Pin the engine id used for the MMIO read and re-validate it against
the current engine id after the final activity check. If the engine
changed, retry the whole read (bounded by a small retry count) instead
of trusting a timestamp sampled from an unrelated context, falling
back to the last cached value if the context keeps migrating.

Signed-off-by: Gajendra Uttamchand <gajendra.uttamchand@intel.com>
---
 drivers/gpu/drm/xe/xe_lrc.c | 66 ++++++++++++++++++++++++++-----------
 1 file changed, 46 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 1e910669e8d1..314de730ace6 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -2736,39 +2736,65 @@ static u64 xe_lrc_update_multi_queue_timestamp(struct xe_lrc *lrc, u64 *old_ts)
 	return lrc->queue_timestamp;
 }

+/*
+ * Between reading the engine id and re-checking that the context is
+ * still active below, the context may have been saved and restored
+ * onto a *different* engine, in which case the MMIO read in between
+ * targeted an unrelated context on the old engine.
+ * Bound the number of times we retry the full read sequence when a
+ * context migration between engines is detected. A small bound (3)
+ * prevents long loops; if we exhaust retries we fall back to the
+ * last cached `lrc->ctx_timestamp`.
+ */
+#define CTX_TIMESTAMP_MAX_RETRIES 3
+
 static u64 xe_lrc_context_timestamp(struct xe_lrc *lrc)
 {
 	u64 reg_ts, new_ts = lrc->ctx_timestamp;
 	u64 stored;
+	u32 engine_id;
+	int retries = CTX_TIMESTAMP_MAX_RETRIES;

 	/* CTX_TIMESTAMP mmio read is invalid on VF, so return the LRC value */
 	if (IS_SRIOV_VF(lrc_to_xe(lrc)))
 		return xe_lrc_ctx_timestamp(lrc);

-	/*
-	 * Safely read CTX_TIMESTAMP: check the LRC-stored value before and
-	 * after the MMIO read to avoid a TOCTOU where a context switch makes the
-	 * MMIO value stale. If the LRC value is not `CONTEXT_ACTIVE` return it;
-	 * otherwise accept the MMIO value only if the context remained active.
-	 */
+	do {
+		/*
+		 * Safely read CTX_TIMESTAMP: check the LRC-stored value before and
+		 * after the MMIO read to avoid a TOCTOU where a context switch makes the
+		 * MMIO value stale. If the LRC value is not `CONTEXT_ACTIVE` return it;
+		 * otherwise accept the MMIO value only if the context remained active.
+		 */

-	stored = xe_lrc_ctx_timestamp(lrc);
-	if (stored != CONTEXT_ACTIVE)
-		return stored;
+		stored = xe_lrc_ctx_timestamp(lrc);
+		if (stored != CONTEXT_ACTIVE)
+			return stored;

-	/* Context is active: read the live timestamp from the engine's MMIO register. */
-	if (!get_ctx_timestamp(lrc, xe_lrc_engine_id(lrc), &reg_ts))
-		new_ts = reg_ts;
+		/* Context is active: read the live timestamp from the engine's MMIO register. */
+		engine_id = xe_lrc_engine_id(lrc);
+		if (!get_ctx_timestamp(lrc, engine_id, &reg_ts))
+			new_ts = reg_ts;

-	/* Re-check the LRC-stored timestamp: if the context switched out while
-	 * reading MMIO the hardware saved the canonical timestamp into the LRC
-	 * during context-save, so return that value instead of the MMIO read.
-	 */
-	stored = xe_lrc_ctx_timestamp(lrc);
-	if (stored != CONTEXT_ACTIVE)
-		return stored;
+		/* Re-check the LRC-stored timestamp: if the context switched out while
+		 * reading MMIO the hardware saved the canonical timestamp into the LRC
+		 * during context-save, so return that value instead of the MMIO read.
+		 */
+		stored = xe_lrc_ctx_timestamp(lrc);
+		if (stored != CONTEXT_ACTIVE)
+			return stored;
+
+		/*
+		 * Still active, but possibly on a different engine than the one
+		 * we just read MMIO from (context switched out and back in
+		 * elsewhere). Only trust new_ts if the engine id hasn't changed;
+		 * otherwise retry the whole sequence against the current engine.
+		 */
+		if (xe_lrc_engine_id(lrc) == engine_id)
+			return new_ts;
+	} while (--retries);

-	return new_ts;
+	return lrc->ctx_timestamp;
 }

 static u64 xe_lrc_update_context_timestamp(struct xe_lrc *lrc, u64 *old_ts)
--
2.43.0

✓ CI.KUnit: success for drm/xe: make CTX_TIMESTAMP TOCTOU-safe and handle sentinels (rev6)

[Patchwork]

== Series Details ==

Series: drm/xe: make CTX_TIMESTAMP TOCTOU-safe and handle sentinels (rev6)
URL   : https://patchwork.freedesktop.org/series/168394/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[11:05:12] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:05:17] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:05:49] Starting KUnit Kernel (1/1)...
[11:05:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:05:49] ================== guc_buf (11 subtests) ===================
[11:05:49] [PASSED] test_smallest
[11:05:49] [PASSED] test_largest
[11:05:49] [PASSED] test_granular
[11:05:49] [PASSED] test_unique
[11:05:49] [PASSED] test_overlap
[11:05:49] [PASSED] test_reusable
[11:05:49] [PASSED] test_too_big
[11:05:49] [PASSED] test_flush
[11:05:49] [PASSED] test_lookup
[11:05:49] [PASSED] test_data
[11:05:49] [PASSED] test_class
[11:05:49] ===================== [PASSED] guc_buf =====================
[11:05:49] =================== guc_dbm (7 subtests) ===================
[11:05:49] [PASSED] test_empty
[11:05:49] [PASSED] test_default
[11:05:49] ======================== test_size  ========================
[11:05:49] [PASSED] 4
[11:05:49] [PASSED] 8
[11:05:49] [PASSED] 32
[11:05:49] [PASSED] 256
[11:05:49] ==================== [PASSED] test_size ====================
[11:05:49] ======================= test_reuse  ========================
[11:05:49] [PASSED] 4
[11:05:49] [PASSED] 8
[11:05:49] [PASSED] 32
[11:05:49] [PASSED] 256
[11:05:49] =================== [PASSED] test_reuse ====================
[11:05:49] =================== test_range_overlap  ====================
[11:05:49] [PASSED] 4
[11:05:49] [PASSED] 8
[11:05:49] [PASSED] 32
[11:05:49] [PASSED] 256
[11:05:49] =============== [PASSED] test_range_overlap ================
[11:05:49] =================== test_range_compact  ====================
[11:05:49] [PASSED] 4
[11:05:49] [PASSED] 8
[11:05:49] [PASSED] 32
[11:05:49] [PASSED] 256
[11:05:49] =============== [PASSED] test_range_compact ================
[11:05:49] ==================== test_range_spare  =====================
[11:05:49] [PASSED] 4
[11:05:49] [PASSED] 8
[11:05:49] [PASSED] 32
[11:05:49] [PASSED] 256
[11:05:49] ================ [PASSED] test_range_spare =================
[11:05:49] ===================== [PASSED] guc_dbm =====================
[11:05:49] =================== guc_idm (6 subtests) ===================
[11:05:49] [PASSED] bad_init
[11:05:49] [PASSED] no_init
[11:05:49] [PASSED] init_fini
[11:05:49] [PASSED] check_used
[11:05:49] [PASSED] check_quota
[11:05:49] [PASSED] check_all
[11:05:49] ===================== [PASSED] guc_idm =====================
[11:05:49] =============== guc_klv_helpers (9 subtests) ===============
[11:05:49] [PASSED] test_count
[11:05:49] [PASSED] test_encode_u32
[11:05:49] [PASSED] test_encode_u64
[11:05:49] [PASSED] test_encode_string
[11:05:49] [PASSED] test_encode_object_raw
[11:05:49] [PASSED] test_encode_object_klv
[11:05:49] [PASSED] test_encode_object_nested
[11:05:49] [PASSED] test_encode_object_basic
[11:05:49] [PASSED] test_print
[11:05:49] ================= [PASSED] guc_klv_helpers =================
[11:05:49] ================== no_relay (3 subtests) ===================
[11:05:49] [PASSED] xe_drops_guc2pf_if_not_ready
[11:05:49] [PASSED] xe_drops_guc2vf_if_not_ready
[11:05:49] [PASSED] xe_rejects_send_if_not_ready
[11:05:49] ==================== [PASSED] no_relay =====================
[11:05:49] ================== pf_relay (14 subtests) ==================
[11:05:49] [PASSED] pf_rejects_guc2pf_too_short
[11:05:49] [PASSED] pf_rejects_guc2pf_too_long
[11:05:49] [PASSED] pf_rejects_guc2pf_no_payload
[11:05:49] [PASSED] pf_fails_no_payload
[11:05:49] [PASSED] pf_fails_bad_origin
[11:05:49] [PASSED] pf_fails_bad_type
[11:05:49] [PASSED] pf_txn_reports_error
[11:05:49] [PASSED] pf_txn_sends_pf2guc
[11:05:49] [PASSED] pf_sends_pf2guc
[11:05:49] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:05:49] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:05:49] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:05:49] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:05:49] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:05:49] ==================== [PASSED] pf_relay =====================
[11:05:49] ================== vf_relay (3 subtests) ===================
[11:05:49] [PASSED] vf_rejects_guc2vf_too_short
[11:05:49] [PASSED] vf_rejects_guc2vf_too_long
[11:05:49] [PASSED] vf_rejects_guc2vf_no_payload
[11:05:49] ==================== [PASSED] vf_relay =====================
[11:05:49] ================ pf_gt_config (9 subtests) =================
[11:05:49] [PASSED] fair_contexts_1vf
[11:05:49] [PASSED] fair_doorbells_1vf
[11:05:49] [PASSED] fair_ggtt_1vf
[11:05:49] ====================== fair_vram_1vf  ======================
[11:05:49] [PASSED] 3.50 GiB
[11:05:49] [PASSED] 11.5 GiB
[11:05:49] [PASSED] 15.5 GiB
[11:05:49] [PASSED] 31.5 GiB
[11:05:49] [PASSED] 63.5 GiB
[11:05:49] [PASSED] 1.91 GiB
[11:05:49] ================== [PASSED] fair_vram_1vf ==================
[11:05:49] ================ fair_vram_1vf_admin_only  =================
[11:05:49] [PASSED] 3.50 GiB
[11:05:49] [PASSED] 11.5 GiB
[11:05:49] [PASSED] 15.5 GiB
[11:05:49] [PASSED] 31.5 GiB
[11:05:49] [PASSED] 63.5 GiB
[11:05:49] [PASSED] 1.91 GiB
[11:05:49] ============ [PASSED] fair_vram_1vf_admin_only =============
[11:05:49] ====================== fair_contexts  ======================
[11:05:49] [PASSED] 1 VF
[11:05:49] [PASSED] 2 VFs
[11:05:49] [PASSED] 3 VFs
[11:05:49] [PASSED] 4 VFs
[11:05:49] [PASSED] 5 VFs
[11:05:49] [PASSED] 6 VFs
[11:05:49] [PASSED] 7 VFs
[11:05:49] [PASSED] 8 VFs
[11:05:49] [PASSED] 9 VFs
[11:05:49] [PASSED] 10 VFs
[11:05:49] [PASSED] 11 VFs
[11:05:49] [PASSED] 12 VFs
[11:05:49] [PASSED] 13 VFs
[11:05:49] [PASSED] 14 VFs
[11:05:49] [PASSED] 15 VFs
[11:05:49] [PASSED] 16 VFs
[11:05:49] [PASSED] 17 VFs
[11:05:49] [PASSED] 18 VFs
[11:05:49] [PASSED] 19 VFs
[11:05:49] [PASSED] 20 VFs
[11:05:49] [PASSED] 21 VFs
[11:05:49] [PASSED] 22 VFs
[11:05:49] [PASSED] 23 VFs
[11:05:49] [PASSED] 24 VFs
[11:05:49] [PASSED] 25 VFs
[11:05:49] [PASSED] 26 VFs
[11:05:49] [PASSED] 27 VFs
[11:05:49] [PASSED] 28 VFs
[11:05:49] [PASSED] 29 VFs
[11:05:49] [PASSED] 30 VFs
[11:05:49] [PASSED] 31 VFs
[11:05:49] [PASSED] 32 VFs
[11:05:49] [PASSED] 33 VFs
[11:05:49] [PASSED] 34 VFs
[11:05:49] [PASSED] 35 VFs
[11:05:49] [PASSED] 36 VFs
[11:05:49] [PASSED] 37 VFs
[11:05:49] [PASSED] 38 VFs
[11:05:49] [PASSED] 39 VFs
[11:05:49] [PASSED] 40 VFs
[11:05:49] [PASSED] 41 VFs
[11:05:49] [PASSED] 42 VFs
[11:05:49] [PASSED] 43 VFs
[11:05:49] [PASSED] 44 VFs
[11:05:49] [PASSED] 45 VFs
[11:05:49] [PASSED] 46 VFs
[11:05:49] [PASSED] 47 VFs
[11:05:49] [PASSED] 48 VFs
[11:05:49] [PASSED] 49 VFs
[11:05:49] [PASSED] 50 VFs
[11:05:49] [PASSED] 51 VFs
[11:05:49] [PASSED] 52 VFs
[11:05:49] [PASSED] 53 VFs
[11:05:49] [PASSED] 54 VFs
[11:05:49] [PASSED] 55 VFs
[11:05:49] [PASSED] 56 VFs
[11:05:49] [PASSED] 57 VFs
[11:05:49] [PASSED] 58 VFs
[11:05:49] [PASSED] 59 VFs
[11:05:49] [PASSED] 60 VFs
[11:05:49] [PASSED] 61 VFs
[11:05:49] [PASSED] 62 VFs
[11:05:49] [PASSED] 63 VFs
[11:05:49] ================== [PASSED] fair_contexts ==================
[11:05:49] ===================== fair_doorbells  ======================
[11:05:49] [PASSED] 1 VF
[11:05:49] [PASSED] 2 VFs
[11:05:49] [PASSED] 3 VFs
[11:05:49] [PASSED] 4 VFs
[11:05:49] [PASSED] 5 VFs
[11:05:49] [PASSED] 6 VFs
[11:05:49] [PASSED] 7 VFs
[11:05:49] [PASSED] 8 VFs
[11:05:49] [PASSED] 9 VFs
[11:05:49] [PASSED] 10 VFs
[11:05:49] [PASSED] 11 VFs
[11:05:49] [PASSED] 12 VFs
[11:05:49] [PASSED] 13 VFs
[11:05:49] [PASSED] 14 VFs
[11:05:49] [PASSED] 15 VFs
[11:05:49] [PASSED] 16 VFs
[11:05:49] [PASSED] 17 VFs
[11:05:49] [PASSED] 18 VFs
[11:05:49] [PASSED] 19 VFs
[11:05:49] [PASSED] 20 VFs
[11:05:49] [PASSED] 21 VFs
[11:05:49] [PASSED] 22 VFs
[11:05:49] [PASSED] 23 VFs
[11:05:49] [PASSED] 24 VFs
[11:05:49] [PASSED] 25 VFs
[11:05:49] [PASSED] 26 VFs
[11:05:49] [PASSED] 27 VFs
[11:05:49] [PASSED] 28 VFs
[11:05:49] [PASSED] 29 VFs
[11:05:49] [PASSED] 30 VFs
[11:05:49] [PASSED] 31 VFs
[11:05:49] [PASSED] 32 VFs
[11:05:49] [PASSED] 33 VFs
[11:05:49] [PASSED] 34 VFs
[11:05:49] [PASSED] 35 VFs
[11:05:49] [PASSED] 36 VFs
[11:05:49] [PASSED] 37 VFs
[11:05:49] [PASSED] 38 VFs
[11:05:49] [PASSED] 39 VFs
[11:05:49] [PASSED] 40 VFs
[11:05:49] [PASSED] 41 VFs
[11:05:49] [PASSED] 42 VFs
[11:05:49] [PASSED] 43 VFs
[11:05:49] [PASSED] 44 VFs
[11:05:49] [PASSED] 45 VFs
[11:05:49] [PASSED] 46 VFs
[11:05:49] [PASSED] 47 VFs
[11:05:49] [PASSED] 48 VFs
[11:05:49] [PASSED] 49 VFs
[11:05:49] [PASSED] 50 VFs
[11:05:49] [PASSED] 51 VFs
[11:05:49] [PASSED] 52 VFs
[11:05:49] [PASSED] 53 VFs
[11:05:49] [PASSED] 54 VFs
[11:05:49] [PASSED] 55 VFs
[11:05:49] [PASSED] 56 VFs
[11:05:49] [PASSED] 57 VFs
[11:05:49] [PASSED] 58 VFs
[11:05:49] [PASSED] 59 VFs
[11:05:49] [PASSED] 60 VFs
[11:05:49] [PASSED] 61 VFs
[11:05:49] [PASSED] 62 VFs
[11:05:49] [PASSED] 63 VFs
[11:05:49] ================= [PASSED] fair_doorbells ==================
[11:05:49] ======================== fair_ggtt  ========================
[11:05:49] [PASSED] 1 VF
[11:05:49] [PASSED] 2 VFs
[11:05:49] [PASSED] 3 VFs
[11:05:49] [PASSED] 4 VFs
[11:05:49] [PASSED] 5 VFs
[11:05:49] [PASSED] 6 VFs
[11:05:49] [PASSED] 7 VFs
[11:05:49] [PASSED] 8 VFs
[11:05:49] [PASSED] 9 VFs
[11:05:49] [PASSED] 10 VFs
[11:05:49] [PASSED] 11 VFs
[11:05:49] [PASSED] 12 VFs
[11:05:49] [PASSED] 13 VFs
[11:05:49] [PASSED] 14 VFs
[11:05:49] [PASSED] 15 VFs
[11:05:49] [PASSED] 16 VFs
[11:05:49] [PASSED] 17 VFs
[11:05:49] [PASSED] 18 VFs
[11:05:49] [PASSED] 19 VFs
[11:05:49] [PASSED] 20 VFs
[11:05:49] [PASSED] 21 VFs
[11:05:49] [PASSED] 22 VFs
[11:05:49] [PASSED] 23 VFs
[11:05:49] [PASSED] 24 VFs
[11:05:49] [PASSED] 25 VFs
[11:05:49] [PASSED] 26 VFs
[11:05:49] [PASSED] 27 VFs
[11:05:49] [PASSED] 28 VFs
[11:05:49] [PASSED] 29 VFs
[11:05:49] [PASSED] 30 VFs
[11:05:49] [PASSED] 31 VFs
[11:05:49] [PASSED] 32 VFs
[11:05:49] [PASSED] 33 VFs
[11:05:49] [PASSED] 34 VFs
[11:05:49] [PASSED] 35 VFs
[11:05:49] [PASSED] 36 VFs
[11:05:49] [PASSED] 37 VFs
[11:05:49] [PASSED] 38 VFs
[11:05:49] [PASSED] 39 VFs
[11:05:49] [PASSED] 40 VFs
[11:05:49] [PASSED] 41 VFs
[11:05:49] [PASSED] 42 VFs
[11:05:49] [PASSED] 43 VFs
[11:05:49] [PASSED] 44 VFs
[11:05:49] [PASSED] 45 VFs
[11:05:49] [PASSED] 46 VFs
[11:05:49] [PASSED] 47 VFs
[11:05:49] [PASSED] 48 VFs
[11:05:49] [PASSED] 49 VFs
[11:05:49] [PASSED] 50 VFs
[11:05:49] [PASSED] 51 VFs
[11:05:49] [PASSED] 52 VFs
[11:05:49] [PASSED] 53 VFs
[11:05:49] [PASSED] 54 VFs
[11:05:49] [PASSED] 55 VFs
[11:05:49] [PASSED] 56 VFs
[11:05:49] [PASSED] 57 VFs
[11:05:49] [PASSED] 58 VFs
[11:05:49] [PASSED] 59 VFs
[11:05:49] [PASSED] 60 VFs
[11:05:50] [PASSED] 61 VFs
[11:05:50] [PASSED] 62 VFs
[11:05:50] [PASSED] 63 VFs
[11:05:50] ==================== [PASSED] fair_ggtt ====================
[11:05:50] ======================== fair_vram  ========================
[11:05:50] [PASSED] 1 VF
[11:05:50] [PASSED] 2 VFs
[11:05:50] [PASSED] 3 VFs
[11:05:50] [PASSED] 4 VFs
[11:05:50] [PASSED] 5 VFs
[11:05:50] [PASSED] 6 VFs
[11:05:50] [PASSED] 7 VFs
[11:05:50] [PASSED] 8 VFs
[11:05:50] [PASSED] 9 VFs
[11:05:50] [PASSED] 10 VFs
[11:05:50] [PASSED] 11 VFs
[11:05:50] [PASSED] 12 VFs
[11:05:50] [PASSED] 13 VFs
[11:05:50] [PASSED] 14 VFs
[11:05:50] [PASSED] 15 VFs
[11:05:50] [PASSED] 16 VFs
[11:05:50] [PASSED] 17 VFs
[11:05:50] [PASSED] 18 VFs
[11:05:50] [PASSED] 19 VFs
[11:05:50] [PASSED] 20 VFs
[11:05:50] [PASSED] 21 VFs
[11:05:50] [PASSED] 22 VFs
[11:05:50] [PASSED] 23 VFs
[11:05:50] [PASSED] 24 VFs
[11:05:50] [PASSED] 25 VFs
[11:05:50] [PASSED] 26 VFs
[11:05:50] [PASSED] 27 VFs
[11:05:50] [PASSED] 28 VFs
[11:05:50] [PASSED] 29 VFs
[11:05:50] [PASSED] 30 VFs
[11:05:50] [PASSED] 31 VFs
[11:05:50] [PASSED] 32 VFs
[11:05:50] [PASSED] 33 VFs
[11:05:50] [PASSED] 34 VFs
[11:05:50] [PASSED] 35 VFs
[11:05:50] [PASSED] 36 VFs
[11:05:50] [PASSED] 37 VFs
[11:05:50] [PASSED] 38 VFs
[11:05:50] [PASSED] 39 VFs
[11:05:50] [PASSED] 40 VFs
[11:05:50] [PASSED] 41 VFs
[11:05:50] [PASSED] 42 VFs
[11:05:50] [PASSED] 43 VFs
[11:05:50] [PASSED] 44 VFs
[11:05:50] [PASSED] 45 VFs
[11:05:50] [PASSED] 46 VFs
[11:05:50] [PASSED] 47 VFs
[11:05:50] [PASSED] 48 VFs
[11:05:50] [PASSED] 49 VFs
[11:05:50] [PASSED] 50 VFs
[11:05:50] [PASSED] 51 VFs
[11:05:50] [PASSED] 52 VFs
[11:05:50] [PASSED] 53 VFs
[11:05:50] [PASSED] 54 VFs
[11:05:50] [PASSED] 55 VFs
[11:05:50] [PASSED] 56 VFs
[11:05:50] [PASSED] 57 VFs
[11:05:50] [PASSED] 58 VFs
[11:05:50] [PASSED] 59 VFs
[11:05:50] [PASSED] 60 VFs
[11:05:50] [PASSED] 61 VFs
[11:05:50] [PASSED] 62 VFs
[11:05:50] [PASSED] 63 VFs
[11:05:50] ==================== [PASSED] fair_vram ====================
[11:05:50] ================== [PASSED] pf_gt_config ===================
[11:05:50] ===================== lmtt (1 subtest) =====================
[11:05:50] ======================== test_ops  =========================
[11:05:50] [PASSED] 2-level
[11:05:50] [PASSED] multi-level
[11:05:50] ==================== [PASSED] test_ops =====================
[11:05:50] ====================== [PASSED] lmtt =======================
[11:05:50] ================= sriov_packet (1 subtest) =================
[11:05:50] [PASSED] test_descriptor_init
[11:05:50] ================== [PASSED] sriov_packet ===================
[11:05:50] ================= pf_service (11 subtests) =================
[11:05:50] [PASSED] pf_negotiate_any
[11:05:50] [PASSED] pf_negotiate_base_match
[11:05:50] [PASSED] pf_negotiate_base_newer
[11:05:50] [PASSED] pf_negotiate_base_next
[11:05:50] [SKIPPED] pf_negotiate_base_older (no older minor)
[11:05:50] [PASSED] pf_negotiate_base_prev
[11:05:50] [PASSED] pf_negotiate_latest_match
[11:05:50] [PASSED] pf_negotiate_latest_newer
[11:05:50] [PASSED] pf_negotiate_latest_next
[11:05:50] [SKIPPED] pf_negotiate_latest_older (no older minor)
[11:05:50] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[11:05:50] =================== [PASSED] pf_service ====================
[11:05:50] ================= xe_guc_g2g (2 subtests) ==================
[11:05:50] ============== xe_live_guc_g2g_kunit_default  ==============
[11:05:50] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[11:05:50] ============== xe_live_guc_g2g_kunit_allmem  ===============
[11:05:50] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[11:05:50] =================== [SKIPPED] xe_guc_g2g ===================
[11:05:50] =================== xe_mocs (2 subtests) ===================
[11:05:50] ================ xe_live_mocs_kernel_kunit  ================
[11:05:50] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[11:05:50] ================ xe_live_mocs_reset_kunit  =================
[11:05:50] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[11:05:50] ==================== [SKIPPED] xe_mocs =====================
[11:05:50] ================= xe_migrate (2 subtests) ==================
[11:05:50] ================= xe_migrate_sanity_kunit  =================
[11:05:50] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[11:05:50] ================== xe_validate_ccs_kunit  ==================
[11:05:50] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[11:05:50] =================== [SKIPPED] xe_migrate ===================
[11:05:50] ================== xe_dma_buf (1 subtest) ==================
[11:05:50] ==================== xe_dma_buf_kunit  =====================
[11:05:50] ================ [SKIPPED] xe_dma_buf_kunit ================
[11:05:50] =================== [SKIPPED] xe_dma_buf ===================
[11:05:50] ================= xe_bo_shrink (1 subtest) =================
[11:05:50] =================== xe_bo_shrink_kunit  ====================
[11:05:50] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[11:05:50] ================== [SKIPPED] xe_bo_shrink ==================
[11:05:50] ==================== xe_bo (2 subtests) ====================
[11:05:50] ================== xe_ccs_migrate_kunit  ===================
[11:05:50] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[11:05:50] ==================== xe_bo_evict_kunit  ====================
[11:05:50] =============== [SKIPPED] xe_bo_evict_kunit ================
[11:05:50] ===================== [SKIPPED] xe_bo ======================
[11:05:50] ==================== args (13 subtests) ====================
[11:05:50] [PASSED] count_args_test
[11:05:50] [PASSED] call_args_example
[11:05:50] [PASSED] call_args_test
[11:05:50] [PASSED] drop_first_arg_example
[11:05:50] [PASSED] drop_first_arg_test
[11:05:50] [PASSED] first_arg_example
[11:05:50] [PASSED] first_arg_test
[11:05:50] [PASSED] last_arg_example
[11:05:50] [PASSED] last_arg_test
[11:05:50] [PASSED] pick_arg_example
[11:05:50] [PASSED] if_args_example
[11:05:50] [PASSED] if_args_test
[11:05:50] [PASSED] sep_comma_example
[11:05:50] ====================== [PASSED] args =======================
[11:05:50] =================== xe_pci (3 subtests) ====================
[11:05:50] ==================== check_graphics_ip  ====================
[11:05:50] [PASSED] 12.00 Xe_LP
[11:05:50] [PASSED] 12.10 Xe_LP+
[11:05:50] [PASSED] 12.55 Xe_HPG
[11:05:50] [PASSED] 12.60 Xe_HPC
[11:05:50] [PASSED] 12.70 Xe_LPG
[11:05:50] [PASSED] 12.71 Xe_LPG
[11:05:50] [PASSED] 12.74 Xe_LPG+
[11:05:50] [PASSED] 20.01 Xe2_HPG
[11:05:50] [PASSED] 20.02 Xe2_HPG
[11:05:50] [PASSED] 20.04 Xe2_LPG
[11:05:50] [PASSED] 30.00 Xe3_LPG
[11:05:50] [PASSED] 30.01 Xe3_LPG
[11:05:50] [PASSED] 30.03 Xe3_LPG
[11:05:50] [PASSED] 30.04 Xe3_LPG
[11:05:50] [PASSED] 30.05 Xe3_LPG
[11:05:50] [PASSED] 35.10 Xe3p_LPG
[11:05:50] [PASSED] 35.11 Xe3p_XPC
[11:05:50] ================ [PASSED] check_graphics_ip ================
[11:05:50] ===================== check_media_ip  ======================
[11:05:50] [PASSED] 12.00 Xe_M
[11:05:50] [PASSED] 12.55 Xe_HPM
[11:05:50] [PASSED] 13.00 Xe_LPM+
[11:05:50] [PASSED] 13.01 Xe2_HPM
[11:05:50] [PASSED] 20.00 Xe2_LPM
[11:05:50] [PASSED] 30.00 Xe3_LPM
[11:05:50] [PASSED] 30.02 Xe3_LPM
[11:05:50] [PASSED] 35.00 Xe3p_LPM
[11:05:50] [PASSED] 35.03 Xe3p_HPM
[11:05:50] ================= [PASSED] check_media_ip ==================
[11:05:50] =================== check_platform_desc  ===================
[11:05:50] [PASSED] 0x9A60 (TIGERLAKE)
[11:05:50] [PASSED] 0x9A68 (TIGERLAKE)
[11:05:50] [PASSED] 0x9A70 (TIGERLAKE)
[11:05:50] [PASSED] 0x9A40 (TIGERLAKE)
[11:05:50] [PASSED] 0x9A49 (TIGERLAKE)
[11:05:50] [PASSED] 0x9A59 (TIGERLAKE)
[11:05:50] [PASSED] 0x9A78 (TIGERLAKE)
[11:05:50] [PASSED] 0x9AC0 (TIGERLAKE)
[11:05:50] [PASSED] 0x9AC9 (TIGERLAKE)
[11:05:50] [PASSED] 0x9AD9 (TIGERLAKE)
[11:05:50] [PASSED] 0x9AF8 (TIGERLAKE)
[11:05:50] [PASSED] 0x4C80 (ROCKETLAKE)
[11:05:50] [PASSED] 0x4C8A (ROCKETLAKE)
[11:05:50] [PASSED] 0x4C8B (ROCKETLAKE)
[11:05:50] [PASSED] 0x4C8C (ROCKETLAKE)
[11:05:50] [PASSED] 0x4C90 (ROCKETLAKE)
[11:05:50] [PASSED] 0x4C9A (ROCKETLAKE)
[11:05:50] [PASSED] 0x4680 (ALDERLAKE_S)
[11:05:50] [PASSED] 0x4682 (ALDERLAKE_S)
[11:05:50] [PASSED] 0x4688 (ALDERLAKE_S)
[11:05:50] [PASSED] 0x468A (ALDERLAKE_S)
[11:05:50] [PASSED] 0x468B (ALDERLAKE_S)
[11:05:50] [PASSED] 0x4690 (ALDERLAKE_S)
[11:05:50] [PASSED] 0x4692 (ALDERLAKE_S)
[11:05:50] [PASSED] 0x4693 (ALDERLAKE_S)
[11:05:50] [PASSED] 0x46A0 (ALDERLAKE_P)
[11:05:50] [PASSED] 0x46A1 (ALDERLAKE_P)
[11:05:50] [PASSED] 0x46A2 (ALDERLAKE_P)
[11:05:50] [PASSED] 0x46A3 (ALDERLAKE_P)
[11:05:50] [PASSED] 0x46A6 (ALDERLAKE_P)
[11:05:50] [PASSED] 0x46A8 (ALDERLAKE_P)
[11:05:50] [PASSED] 0x46AA (ALDERLAKE_P)
[11:05:50] [PASSED] 0x462A (ALDERLAKE_P)
[11:05:50] [PASSED] 0x4626 (ALDERLAKE_P)
[11:05:50] [PASSED] 0x4628 (ALDERLAKE_P)
[11:05:50] [PASSED] 0x46B0 (ALDERLAKE_P)
[11:05:50] [PASSED] 0x46B1 (ALDERLAKE_P)
[11:05:50] [PASSED] 0x46B2 (ALDERLAKE_P)
[11:05:50] [PASSED] 0x46B3 (ALDERLAKE_P)
[11:05:50] [PASSED] 0x46C0 (ALDERLAKE_P)
[11:05:50] [PASSED] 0x46C1 (ALDERLAKE_P)
[11:05:50] [PASSED] 0x46C2 (ALDERLAKE_P)
[11:05:50] [PASSED] 0x46C3 (ALDERLAKE_P)
[11:05:50] [PASSED] 0x46D0 (ALDERLAKE_N)
[11:05:50] [PASSED] 0x46D1 (ALDERLAKE_N)
[11:05:50] [PASSED] 0x46D2 (ALDERLAKE_N)
[11:05:50] [PASSED] 0x46D3 (ALDERLAKE_N)
[11:05:50] [PASSED] 0x46D4 (ALDERLAKE_N)
[11:05:50] [PASSED] 0xA721 (ALDERLAKE_P)
[11:05:50] [PASSED] 0xA7A1 (ALDERLAKE_P)
[11:05:50] [PASSED] 0xA7A9 (ALDERLAKE_P)
[11:05:50] [PASSED] 0xA7AC (ALDERLAKE_P)
[11:05:50] [PASSED] 0xA7AD (ALDERLAKE_P)
[11:05:50] [PASSED] 0xA720 (ALDERLAKE_P)
[11:05:50] [PASSED] 0xA7A0 (ALDERLAKE_P)
[11:05:50] [PASSED] 0xA7A8 (ALDERLAKE_P)
[11:05:50] [PASSED] 0xA7AA (ALDERLAKE_P)
[11:05:50] [PASSED] 0xA7AB (ALDERLAKE_P)
[11:05:50] [PASSED] 0xA780 (ALDERLAKE_S)
[11:05:50] [PASSED] 0xA781 (ALDERLAKE_S)
[11:05:50] [PASSED] 0xA782 (ALDERLAKE_S)
[11:05:50] [PASSED] 0xA783 (ALDERLAKE_S)
[11:05:50] [PASSED] 0xA788 (ALDERLAKE_S)
[11:05:50] [PASSED] 0xA789 (ALDERLAKE_S)
[11:05:50] [PASSED] 0xA78A (ALDERLAKE_S)
[11:05:50] [PASSED] 0xA78B (ALDERLAKE_S)
[11:05:50] [PASSED] 0x4905 (DG1)
[11:05:50] [PASSED] 0x4906 (DG1)
[11:05:50] [PASSED] 0x4907 (DG1)
[11:05:50] [PASSED] 0x4908 (DG1)
[11:05:50] [PASSED] 0x4909 (DG1)
[11:05:50] [PASSED] 0x56C0 (DG2)
[11:05:50] [PASSED] 0x56C2 (DG2)
[11:05:50] [PASSED] 0x56C1 (DG2)
[11:05:50] [PASSED] 0x7D51 (METEORLAKE)
[11:05:50] [PASSED] 0x7DD1 (METEORLAKE)
[11:05:50] [PASSED] 0x7D41 (METEORLAKE)
[11:05:50] [PASSED] 0x7D67 (METEORLAKE)
[11:05:50] [PASSED] 0xB640 (METEORLAKE)
[11:05:50] [PASSED] 0x56A0 (DG2)
[11:05:50] [PASSED] 0x56A1 (DG2)
[11:05:50] [PASSED] 0x56A2 (DG2)
[11:05:50] [PASSED] 0x56BE (DG2)
[11:05:50] [PASSED] 0x56BF (DG2)
[11:05:50] [PASSED] 0x5690 (DG2)
[11:05:50] [PASSED] 0x5691 (DG2)
[11:05:50] [PASSED] 0x5692 (DG2)
[11:05:50] [PASSED] 0x56A5 (DG2)
[11:05:50] [PASSED] 0x56A6 (DG2)
[11:05:50] [PASSED] 0x56B0 (DG2)
[11:05:50] [PASSED] 0x56B1 (DG2)
[11:05:50] [PASSED] 0x56BA (DG2)
[11:05:50] [PASSED] 0x56BB (DG2)
[11:05:50] [PASSED] 0x56BC (DG2)
[11:05:50] [PASSED] 0x56BD (DG2)
[11:05:50] [PASSED] 0x5693 (DG2)
[11:05:50] [PASSED] 0x5694 (DG2)
[11:05:50] [PASSED] 0x5695 (DG2)
[11:05:50] [PASSED] 0x56A3 (DG2)
[11:05:50] [PASSED] 0x56A4 (DG2)
[11:05:50] [PASSED] 0x56B2 (DG2)
[11:05:50] [PASSED] 0x56B3 (DG2)
[11:05:50] [PASSED] 0x5696 (DG2)
[11:05:50] [PASSED] 0x5697 (DG2)
[11:05:50] [PASSED] 0xB69 (PVC)
[11:05:50] [PASSED] 0xB6E (PVC)
[11:05:50] [PASSED] 0xBD4 (PVC)
[11:05:50] [PASSED] 0xBD5 (PVC)
[11:05:50] [PASSED] 0xBD6 (PVC)
[11:05:50] [PASSED] 0xBD7 (PVC)
[11:05:50] [PASSED] 0xBD8 (PVC)
[11:05:50] [PASSED] 0xBD9 (PVC)
[11:05:50] [PASSED] 0xBDA (PVC)
[11:05:50] [PASSED] 0xBDB (PVC)
[11:05:50] [PASSED] 0xBE0 (PVC)
[11:05:50] [PASSED] 0xBE1 (PVC)
[11:05:50] [PASSED] 0xBE5 (PVC)
[11:05:50] [PASSED] 0x7D40 (METEORLAKE)
[11:05:50] [PASSED] 0x7D45 (METEORLAKE)
[11:05:50] [PASSED] 0x7D55 (METEORLAKE)
[11:05:50] [PASSED] 0x7D60 (METEORLAKE)
[11:05:50] [PASSED] 0x7DD5 (METEORLAKE)
[11:05:50] [PASSED] 0x6420 (LUNARLAKE)
[11:05:50] [PASSED] 0x64A0 (LUNARLAKE)
[11:05:50] [PASSED] 0x64B0 (LUNARLAKE)
[11:05:50] [PASSED] 0xE202 (BATTLEMAGE)
[11:05:50] [PASSED] 0xE209 (BATTLEMAGE)
[11:05:50] [PASSED] 0xE20B (BATTLEMAGE)
[11:05:50] [PASSED] 0xE20C (BATTLEMAGE)
[11:05:50] [PASSED] 0xE20D (BATTLEMAGE)
[11:05:50] [PASSED] 0xE210 (BATTLEMAGE)
[11:05:50] [PASSED] 0xE211 (BATTLEMAGE)
[11:05:50] [PASSED] 0xE212 (BATTLEMAGE)
[11:05:50] [PASSED] 0xE216 (BATTLEMAGE)
[11:05:50] [PASSED] 0xE220 (BATTLEMAGE)
[11:05:50] [PASSED] 0xE221 (BATTLEMAGE)
[11:05:50] [PASSED] 0xE222 (BATTLEMAGE)
[11:05:50] [PASSED] 0xE223 (BATTLEMAGE)
[11:05:50] [PASSED] 0xB080 (PANTHERLAKE)
[11:05:50] [PASSED] 0xB081 (PANTHERLAKE)
[11:05:50] [PASSED] 0xB082 (PANTHERLAKE)
[11:05:50] [PASSED] 0xB083 (PANTHERLAKE)
[11:05:50] [PASSED] 0xB084 (PANTHERLAKE)
[11:05:50] [PASSED] 0xB085 (PANTHERLAKE)
[11:05:50] [PASSED] 0xB086 (PANTHERLAKE)
[11:05:50] [PASSED] 0xB087 (PANTHERLAKE)
[11:05:50] [PASSED] 0xB08F (PANTHERLAKE)
[11:05:50] [PASSED] 0xB090 (PANTHERLAKE)
[11:05:50] [PASSED] 0xB0A0 (PANTHERLAKE)
[11:05:50] [PASSED] 0xB0B0 (PANTHERLAKE)
[11:05:50] [PASSED] 0xFD80 (PANTHERLAKE)
[11:05:50] [PASSED] 0xFD81 (PANTHERLAKE)
[11:05:50] [PASSED] 0xD740 (NOVALAKE_S)
[11:05:50] [PASSED] 0xD741 (NOVALAKE_S)
[11:05:50] [PASSED] 0xD742 (NOVALAKE_S)
[11:05:50] [PASSED] 0xD743 (NOVALAKE_S)
[11:05:50] [PASSED] 0xD745 (NOVALAKE_S)
[11:05:50] [PASSED] 0xD74A (NOVALAKE_S)
[11:05:50] [PASSED] 0xD74B (NOVALAKE_S)
[11:05:50] [PASSED] 0x674C (CRESCENTISLAND)
[11:05:50] [PASSED] 0x674D (CRESCENTISLAND)
[11:05:50] [PASSED] 0x674E (CRESCENTISLAND)
[11:05:50] [PASSED] 0x674F (CRESCENTISLAND)
[11:05:50] [PASSED] 0x6750 (CRESCENTISLAND)
[11:05:50] [PASSED] 0xD750 (NOVALAKE_P)
[11:05:50] [PASSED] 0xD751 (NOVALAKE_P)
[11:05:50] [PASSED] 0xD752 (NOVALAKE_P)
[11:05:50] [PASSED] 0xD753 (NOVALAKE_P)
[11:05:50] [PASSED] 0xD754 (NOVALAKE_P)
[11:05:50] [PASSED] 0xD755 (NOVALAKE_P)
[11:05:50] [PASSED] 0xD756 (NOVALAKE_P)
[11:05:50] [PASSED] 0xD757 (NOVALAKE_P)
[11:05:50] [PASSED] 0xD75F (NOVALAKE_P)
[11:05:50] =============== [PASSED] check_platform_desc ===============
[11:05:50] ===================== [PASSED] xe_pci ======================
[11:05:50] ============= xe_rtp_tables_test (5 subtests) ==============
[11:05:50] ================== xe_rtp_table_gt_test  ===================
[11:05:50] [PASSED] gt_was/14011060649
[11:05:50] [PASSED] gt_was/14011059788
[11:05:50] [PASSED] gt_was/14015795083
[11:05:50] [PASSED] gt_was/16021867713
[11:05:50] [PASSED] gt_was/14019449301
[11:05:50] [PASSED] gt_was/16028005424
[11:05:50] [PASSED] gt_was/14026578760
[11:05:50] [PASSED] gt_was/1409420604
[11:05:50] [PASSED] gt_was/1408615072
[11:05:50] [PASSED] gt_was/22010523718
[11:05:50] [PASSED] gt_was/14011006942
[11:05:50] [PASSED] gt_was/14014830051
[11:05:50] [PASSED] gt_was/18018781329
[11:05:50] [PASSED] gt_was/1509235366
[11:05:50] [PASSED] gt_was/18018781329
[11:05:50] [PASSED] gt_was/16016694945
[11:05:50] [PASSED] gt_was/14018575942
[11:05:50] [PASSED] gt_was/22016670082
[11:05:50] [PASSED] gt_was/22016670082
[11:05:50] [PASSED] gt_was/14017421178
[11:05:50] [PASSED] gt_was/16025250150
[11:05:50] [PASSED] gt_was/14021871409
[11:05:50] [PASSED] gt_was/16021865536
[11:05:50] [PASSED] gt_was/14021486841
[11:05:50] [PASSED] gt_was/14025160223
[11:05:50] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[11:05:50] [PASSED] gt_was/14025635424
[11:05:50] [PASSED] gt_was/16028005424
[11:05:50] ============== [PASSED] xe_rtp_table_gt_test ===============
[11:05:50] ================== xe_rtp_table_gt_test  ===================
[11:05:50] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[11:05:50] [PASSED] gt_tunings/Tuning: 32B Access Enable
[11:05:50] [PASSED] gt_tunings/Tuning: L3 cache
[11:05:50] [PASSED] gt_tunings/Tuning: L3 cache - media
[11:05:50] [PASSED] gt_tunings/Tuning: Compression Overfetch
[11:05:50] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[11:05:50] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[11:05:50] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[11:05:50] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[11:05:50] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[11:05:50] [PASSED] gt_tunings/Tuning: Stateless compression control
[11:05:50] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[11:05:50] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[11:05:50] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[11:05:50] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[11:05:50] ============== [PASSED] xe_rtp_table_gt_test ===============
[11:05:50] ================== xe_rtp_table_oob_test  ==================
[11:05:50] [PASSED] oob_was/1607983814
[11:05:50] [PASSED] oob_was/16010904313
[11:05:50] [PASSED] oob_was/18022495364
[11:05:50] [PASSED] oob_was/22012773006
[11:05:50] [PASSED] oob_was/14014475959
[11:05:50] [PASSED] oob_was/22011391025
[11:05:50] [PASSED] oob_was/22012727170
[11:05:50] [PASSED] oob_was/22012727685
[11:05:50] [PASSED] oob_was/22016596838
[11:05:50] [PASSED] oob_was/18020744125
[11:05:50] [PASSED] oob_was/1409600907
[11:05:50] [PASSED] oob_was/22014953428
[11:05:50] [PASSED] oob_was/16017236439
[11:05:50] [PASSED] oob_was/14019821291
[11:05:50] [PASSED] oob_was/14015076503
[11:05:50] [PASSED] oob_was/14018913170
[11:05:50] [PASSED] oob_was/14018094691
[11:05:50] [PASSED] oob_was/18024947630
[11:05:50] [PASSED] oob_was/16022287689
[11:05:50] [PASSED] oob_was/13011645652
[11:05:50] [PASSED] oob_was/14022293748
[11:05:50] [PASSED] oob_was/22019794406
[11:05:50] [PASSED] oob_was/22019338487
[11:05:50] [PASSED] oob_was/16023588340
[11:05:50] [PASSED] oob_was/14019789679
[11:05:50] [PASSED] oob_was/14022866841
[11:05:50] [PASSED] oob_was/16021333562
[11:05:50] [PASSED] oob_was/14016712196
[11:05:50] [PASSED] oob_was/14015568240
[11:05:50] [PASSED] oob_was/18013179988
[11:05:50] [PASSED] oob_was/1508761755
[11:05:50] [PASSED] oob_was/16023105232
[11:05:50] [PASSED] oob_was/16026508708
[11:05:50] [PASSED] oob_was/14020001231
[11:05:50] [PASSED] oob_was/16023683509
[11:05:50] [PASSED] oob_was/14025515070
[11:05:50] [PASSED] oob_was/15015404425_disable
[11:05:50] [PASSED] oob_was/16026007364
[11:05:50] [PASSED] oob_was/14020316580
[11:05:50] [PASSED] oob_was/14025883347
[11:05:50] [PASSED] oob_was/16029380221
[11:05:50] [PASSED] oob_was/22022079272
[11:05:50] [PASSED] oob_was/16029897822
[11:05:50] ============== [PASSED] xe_rtp_table_oob_test ==============
[11:05:50] ================ xe_rtp_table_dev_oob_test  ================
[11:05:50] [PASSED] device_oob_was/22010954014
[11:05:50] [PASSED] device_oob_was/15015404425
[11:05:50] [PASSED] device_oob_was/22019338487_display
[11:05:50] [PASSED] device_oob_was/14022085890
[11:05:50] [PASSED] device_oob_was/14026539277
[11:05:50] [PASSED] device_oob_was/14026633728
[11:05:50] [PASSED] device_oob_was/14026746987
[11:05:50] [PASSED] device_oob_was/14026779378
[11:05:50] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[11:05:50] ========== xe_rtp_table_missing_upper_bound_test  ==========
[11:05:50] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[11:05:50] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[11:05:50] [PASSED] register_whitelist/1806527549
[11:05:50] [PASSED] register_whitelist/allow_read_ctx_timestamp
[11:05:50] [PASSED] register_whitelist/allow_read_queue_timestamp
[11:05:50] [PASSED] register_whitelist/16014440446
[11:05:50] [PASSED] register_whitelist/16017236439
[11:05:50] [PASSED] register_whitelist/16020183090
[11:05:50] [PASSED] register_whitelist/14024997852
[11:05:50] [PASSED] register_whitelist/14024997852
[11:05:50] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[11:05:50] =============== [PASSED] xe_rtp_tables_test ================
[11:05:50] =================== xe_rtp (3 subtests) ====================
[11:05:50] =================== xe_rtp_rules_tests  ====================
[11:05:50] [PASSED] no
[11:05:50] [PASSED] yes
[11:05:50] [PASSED] no-and-no
[11:05:50] [PASSED] no-and-yes
[11:05:50] [PASSED] yes-and-no
[11:05:50] [PASSED] yes-and-yes
[11:05:50] [PASSED] no-or-no
[11:05:50] [PASSED] no-or-yes
[11:05:50] [PASSED] yes-or-no
[11:05:50] [PASSED] yes-or-yes
[11:05:50] [PASSED] no-yes-or-yes-no
[11:05:50] [PASSED] no-yes-or-yes-yes
[11:05:50] [PASSED] yes-yes-or-no-yes
[11:05:50] [PASSED] yes-yes-or-yes-yes
[11:05:50] [PASSED] no-no-or-yes-or-no
[11:05:50] [PASSED] or
[11:05:50] [PASSED] or-yes
[11:05:50] [PASSED] or-no
[11:05:50] [PASSED] yes-or
[11:05:50] [PASSED] no-or
[11:05:50] [PASSED] no-or-or-yes
[11:05:50] [PASSED] yes-or-or-no
[11:05:50] [PASSED] no-or-or-no
[11:05:50] [PASSED] missing-context-engine-class
[11:05:50] [PASSED] missing-context-engine-class-or-yes
[11:05:50] [PASSED] missing-context-engine-class-or-or-yes
[11:05:50] =============== [PASSED] xe_rtp_rules_tests ================
[11:05:50] =============== xe_rtp_process_to_sr_tests  ================
[11:05:50] [PASSED] coalesce-same-reg
[11:05:50] [PASSED] coalesce-same-reg-literal-and-func
[11:05:50] [PASSED] no-match-no-add
[11:05:50] [PASSED] two-regs-two-entries
[11:05:50] [PASSED] clr-one-set-other
[11:05:50] [PASSED] set-field
[11:05:50] [PASSED] conflict-duplicate
[11:05:50] [PASSED] conflict-not-disjoint
[11:05:50] [PASSED] conflict-not-disjoint-literal-and-func
[11:05:50] [PASSED] conflict-reg-type
[11:05:50] [PASSED] bad-mcr-reg-forced-to-regular
[11:05:50] [PASSED] bad-regular-reg-forced-to-mcr
[11:05:50] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[11:05:50] ================== xe_rtp_process_tests  ===================
[11:05:50] [PASSED] active1
[11:05:50] [PASSED] active2
[11:05:50] [PASSED] active-inactive
[11:05:50] [PASSED] inactive-active
[11:05:50] [PASSED] inactive-active-inactive
[11:05:50] [PASSED] inactive-inactive-inactive
[11:05:50] ============== [PASSED] xe_rtp_process_tests ===============
[11:05:50] ===================== [PASSED] xe_rtp ======================
[11:05:50] ==================== xe_wa (1 subtest) =====================
[11:05:50] ======================== xe_wa_gt  =========================
[11:05:50] [PASSED] TIGERLAKE B0
[11:05:50] [PASSED] DG1 A0
[11:05:50] [PASSED] DG1 B0
[11:05:50] [PASSED] ALDERLAKE_S A0
[11:05:50] [PASSED] ALDERLAKE_S B0
[11:05:50] [PASSED] ALDERLAKE_S C0
[11:05:50] [PASSED] ALDERLAKE_S D0
[11:05:50] [PASSED] ALDERLAKE_P A0
[11:05:50] [PASSED] ALDERLAKE_P B0
[11:05:50] [PASSED] ALDERLAKE_P C0
[11:05:50] [PASSED] ALDERLAKE_S RPLS D0
[11:05:50] [PASSED] ALDERLAKE_P RPLU E0
[11:05:50] [PASSED] DG2 G10 C0
[11:05:50] [PASSED] DG2 G11 B1
[11:05:50] [PASSED] DG2 G12 A1
[11:05:50] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:05:50] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:05:50] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[11:05:50] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[11:05:50] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[11:05:50] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[11:05:50] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[11:05:50] ==================== [PASSED] xe_wa_gt =====================
[11:05:50] ====================== [PASSED] xe_wa ======================
[11:05:50] ============================================================
[11:05:50] Testing complete. Ran 741 tests: passed: 723, skipped: 18
[11:05:50] Elapsed time: 37.339s total, 4.401s configuring, 32.271s building, 0.654s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[11:05:50] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:05:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:06:17] Starting KUnit Kernel (1/1)...
[11:06:17] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:06:17] ============ drm_test_pick_cmdline (2 subtests) ============
[11:06:17] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[11:06:17] =============== drm_test_pick_cmdline_named  ===============
[11:06:17] [PASSED] NTSC
[11:06:17] [PASSED] NTSC-J
[11:06:17] [PASSED] PAL
[11:06:17] [PASSED] PAL-M
[11:06:17] =========== [PASSED] drm_test_pick_cmdline_named ===========
[11:06:17] ============== [PASSED] drm_test_pick_cmdline ==============
[11:06:17] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[11:06:17] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[11:06:17] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[11:06:17] =========== drm_validate_clone_mode (2 subtests) ===========
[11:06:17] ============== drm_test_check_in_clone_mode  ===============
[11:06:17] [PASSED] in_clone_mode
[11:06:17] [PASSED] not_in_clone_mode
[11:06:17] ========== [PASSED] drm_test_check_in_clone_mode ===========
[11:06:17] =============== drm_test_check_valid_clones  ===============
[11:06:17] [PASSED] not_in_clone_mode
[11:06:17] [PASSED] valid_clone
[11:06:17] [PASSED] invalid_clone
[11:06:17] =========== [PASSED] drm_test_check_valid_clones ===========
[11:06:17] ============= [PASSED] drm_validate_clone_mode =============
[11:06:17] ============= drm_validate_modeset (1 subtest) =============
[11:06:17] [PASSED] drm_test_check_connector_changed_modeset
[11:06:17] ============== [PASSED] drm_validate_modeset ===============
[11:06:17] ====== drm_test_bridge_get_current_state (1 subtest) =======
[11:06:17] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[11:06:17] ======== [PASSED] drm_test_bridge_get_current_state ========
[11:06:17] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[11:06:17] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[11:06:17] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[11:06:17] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[11:06:17] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[11:06:17] ============== drm_bridge_alloc (2 subtests) ===============
[11:06:17] [PASSED] drm_test_drm_bridge_alloc_basic
[11:06:17] [PASSED] drm_test_drm_bridge_alloc_get_put
[11:06:17] ================ [PASSED] drm_bridge_alloc =================
[11:06:17] ============= drm_bridge_bus_fmt (5 subtests) ==============
[11:06:17] [PASSED] drm_test_bridge_rgb_yuv_rgb
[11:06:17] [PASSED] drm_test_bridge_must_convert_to_yuv444
[11:06:17] [PASSED] drm_test_bridge_hdmi_auto_rgb
[11:06:17] [PASSED] drm_test_bridge_auto_first
[11:06:17] [PASSED] drm_test_bridge_rgb_yuv_no_path
[11:06:17] =============== [PASSED] drm_bridge_bus_fmt ================
[11:06:17] ============= drm_cmdline_parser (40 subtests) =============
[11:06:17] [PASSED] drm_test_cmdline_force_d_only
[11:06:17] [PASSED] drm_test_cmdline_force_D_only_dvi
[11:06:17] [PASSED] drm_test_cmdline_force_D_only_hdmi
[11:06:17] [PASSED] drm_test_cmdline_force_D_only_not_digital
[11:06:17] [PASSED] drm_test_cmdline_force_e_only
[11:06:17] [PASSED] drm_test_cmdline_res
[11:06:17] [PASSED] drm_test_cmdline_res_vesa
[11:06:17] [PASSED] drm_test_cmdline_res_vesa_rblank
[11:06:17] [PASSED] drm_test_cmdline_res_rblank
[11:06:17] [PASSED] drm_test_cmdline_res_bpp
[11:06:17] [PASSED] drm_test_cmdline_res_refresh
[11:06:17] [PASSED] drm_test_cmdline_res_bpp_refresh
[11:06:17] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[11:06:17] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[11:06:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[11:06:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[11:06:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[11:06:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[11:06:17] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[11:06:17] [PASSED] drm_test_cmdline_res_margins_force_on
[11:06:17] [PASSED] drm_test_cmdline_res_vesa_margins
[11:06:17] [PASSED] drm_test_cmdline_name
[11:06:17] [PASSED] drm_test_cmdline_name_bpp
[11:06:17] [PASSED] drm_test_cmdline_name_option
[11:06:17] [PASSED] drm_test_cmdline_name_bpp_option
[11:06:17] [PASSED] drm_test_cmdline_rotate_0
[11:06:17] [PASSED] drm_test_cmdline_rotate_90
[11:06:17] [PASSED] drm_test_cmdline_rotate_180
[11:06:17] [PASSED] drm_test_cmdline_rotate_270
[11:06:17] [PASSED] drm_test_cmdline_hmirror
[11:06:17] [PASSED] drm_test_cmdline_vmirror
[11:06:17] [PASSED] drm_test_cmdline_margin_options
[11:06:17] [PASSED] drm_test_cmdline_multiple_options
[11:06:17] [PASSED] drm_test_cmdline_bpp_extra_and_option
[11:06:17] [PASSED] drm_test_cmdline_extra_and_option
[11:06:17] [PASSED] drm_test_cmdline_freestanding_options
[11:06:17] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[11:06:17] [PASSED] drm_test_cmdline_panel_orientation
[11:06:17] ================ drm_test_cmdline_invalid  =================
[11:06:17] [PASSED] margin_only
[11:06:17] [PASSED] interlace_only
[11:06:17] [PASSED] res_missing_x
[11:06:17] [PASSED] res_missing_y
[11:06:17] [PASSED] res_bad_y
[11:06:17] [PASSED] res_missing_y_bpp
[11:06:17] [PASSED] res_bad_bpp
[11:06:17] [PASSED] res_bad_refresh
[11:06:17] [PASSED] res_bpp_refresh_force_on_off
[11:06:17] [PASSED] res_invalid_mode
[11:06:17] [PASSED] res_bpp_wrong_place_mode
[11:06:17] [PASSED] name_bpp_refresh
[11:06:17] [PASSED] name_refresh
[11:06:17] [PASSED] name_refresh_wrong_mode
[11:06:17] [PASSED] name_refresh_invalid_mode
[11:06:17] [PASSED] rotate_multiple
[11:06:17] [PASSED] rotate_invalid_val
[11:06:17] [PASSED] rotate_truncated
[11:06:17] [PASSED] invalid_option
[11:06:17] [PASSED] invalid_tv_option
[11:06:17] [PASSED] truncated_tv_option
[11:06:17] ============ [PASSED] drm_test_cmdline_invalid =============
[11:06:17] =============== drm_test_cmdline_tv_options  ===============
[11:06:17] [PASSED] NTSC
[11:06:17] [PASSED] NTSC_443
[11:06:17] [PASSED] NTSC_J
[11:06:17] [PASSED] PAL
[11:06:17] [PASSED] PAL_M
[11:06:17] [PASSED] PAL_N
[11:06:17] [PASSED] SECAM
[11:06:17] [PASSED] MONO_525
[11:06:17] [PASSED] MONO_625
[11:06:17] =========== [PASSED] drm_test_cmdline_tv_options ===========
[11:06:17] =============== [PASSED] drm_cmdline_parser ================
[11:06:17] ========== drmm_connector_hdmi_init (20 subtests) ==========
[11:06:17] [PASSED] drm_test_connector_hdmi_init_valid
[11:06:17] [PASSED] drm_test_connector_hdmi_init_bpc_8
[11:06:17] [PASSED] drm_test_connector_hdmi_init_bpc_10
[11:06:17] [PASSED] drm_test_connector_hdmi_init_bpc_12
[11:06:17] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[11:06:17] [PASSED] drm_test_connector_hdmi_init_bpc_null
[11:06:17] [PASSED] drm_test_connector_hdmi_init_formats_empty
[11:06:17] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[11:06:17] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[11:06:17] [PASSED] supported_formats=0x9 yuv420_allowed=1
[11:06:17] [PASSED] supported_formats=0x9 yuv420_allowed=0
[11:06:17] [PASSED] supported_formats=0x5 yuv420_allowed=1
[11:06:17] [PASSED] supported_formats=0x5 yuv420_allowed=0
[11:06:17] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:06:17] [PASSED] drm_test_connector_hdmi_init_null_ddc
[11:06:17] [PASSED] drm_test_connector_hdmi_init_null_product
[11:06:17] [PASSED] drm_test_connector_hdmi_init_null_vendor
[11:06:17] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[11:06:17] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[11:06:17] [PASSED] drm_test_connector_hdmi_init_product_valid
[11:06:17] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[11:06:17] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[11:06:17] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[11:06:17] ========= drm_test_connector_hdmi_init_type_valid  =========
[11:06:17] [PASSED] HDMI-A
[11:06:17] [PASSED] HDMI-B
[11:06:17] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[11:06:17] ======== drm_test_connector_hdmi_init_type_invalid  ========
[11:06:17] [PASSED] Unknown
[11:06:17] [PASSED] VGA
[11:06:17] [PASSED] DVI-I
[11:06:17] [PASSED] DVI-D
[11:06:17] [PASSED] DVI-A
[11:06:17] [PASSED] Composite
[11:06:17] [PASSED] SVIDEO
[11:06:17] [PASSED] LVDS
[11:06:17] [PASSED] Component
[11:06:17] [PASSED] DIN
[11:06:17] [PASSED] DP
[11:06:17] [PASSED] TV
[11:06:17] [PASSED] eDP
[11:06:17] [PASSED] Virtual
[11:06:17] [PASSED] DSI
[11:06:17] [PASSED] DPI
[11:06:17] [PASSED] Writeback
[11:06:17] [PASSED] SPI
[11:06:17] [PASSED] USB
[11:06:17] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[11:06:17] ============ [PASSED] drmm_connector_hdmi_init =============
[11:06:17] ============= drmm_connector_init (3 subtests) =============
[11:06:17] [PASSED] drm_test_drmm_connector_init
[11:06:17] [PASSED] drm_test_drmm_connector_init_null_ddc
[11:06:17] ========= drm_test_drmm_connector_init_type_valid  =========
[11:06:17] [PASSED] Unknown
[11:06:17] [PASSED] VGA
[11:06:17] [PASSED] DVI-I
[11:06:17] [PASSED] DVI-D
[11:06:17] [PASSED] DVI-A
[11:06:17] [PASSED] Composite
[11:06:17] [PASSED] SVIDEO
[11:06:17] [PASSED] LVDS
[11:06:17] [PASSED] Component
[11:06:17] [PASSED] DIN
[11:06:17] [PASSED] DP
[11:06:17] [PASSED] HDMI-A
[11:06:17] [PASSED] HDMI-B
[11:06:17] [PASSED] TV
[11:06:17] [PASSED] eDP
[11:06:17] [PASSED] Virtual
[11:06:17] [PASSED] DSI
[11:06:17] [PASSED] DPI
[11:06:17] [PASSED] Writeback
[11:06:17] [PASSED] SPI
[11:06:17] [PASSED] USB
[11:06:17] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[11:06:17] =============== [PASSED] drmm_connector_init ===============
[11:06:17] ========= drm_connector_dynamic_init (6 subtests) ==========
[11:06:17] [PASSED] drm_test_drm_connector_dynamic_init
[11:06:17] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[11:06:17] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[11:06:17] [PASSED] drm_test_drm_connector_dynamic_init_properties
[11:06:17] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[11:06:17] [PASSED] Unknown
[11:06:17] [PASSED] VGA
[11:06:17] [PASSED] DVI-I
[11:06:17] [PASSED] DVI-D
[11:06:17] [PASSED] DVI-A
[11:06:17] [PASSED] Composite
[11:06:17] [PASSED] SVIDEO
[11:06:17] [PASSED] LVDS
[11:06:17] [PASSED] Component
[11:06:17] [PASSED] DIN
[11:06:17] [PASSED] DP
[11:06:17] [PASSED] HDMI-A
[11:06:17] [PASSED] HDMI-B
[11:06:17] [PASSED] TV
[11:06:17] [PASSED] eDP
[11:06:17] [PASSED] Virtual
[11:06:17] [PASSED] DSI
[11:06:17] [PASSED] DPI
[11:06:17] [PASSED] Writeback
[11:06:17] [PASSED] SPI
[11:06:17] [PASSED] USB
[11:06:17] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[11:06:17] ======== drm_test_drm_connector_dynamic_init_name  =========
[11:06:17] [PASSED] Unknown
[11:06:17] [PASSED] VGA
[11:06:17] [PASSED] DVI-I
[11:06:17] [PASSED] DVI-D
[11:06:17] [PASSED] DVI-A
[11:06:17] [PASSED] Composite
[11:06:17] [PASSED] SVIDEO
[11:06:17] [PASSED] LVDS
[11:06:17] [PASSED] Component
[11:06:17] [PASSED] DIN
[11:06:17] [PASSED] DP
[11:06:17] [PASSED] HDMI-A
[11:06:17] [PASSED] HDMI-B
[11:06:17] [PASSED] TV
[11:06:17] [PASSED] eDP
[11:06:17] [PASSED] Virtual
[11:06:17] [PASSED] DSI
[11:06:17] [PASSED] DPI
[11:06:17] [PASSED] Writeback
[11:06:17] [PASSED] SPI
[11:06:17] [PASSED] USB
[11:06:17] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[11:06:17] =========== [PASSED] drm_connector_dynamic_init ============
[11:06:17] ==== drm_connector_dynamic_register_early (4 subtests) =====
[11:06:17] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[11:06:17] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[11:06:17] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[11:06:17] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[11:06:17] ====== [PASSED] drm_connector_dynamic_register_early =======
[11:06:17] ======= drm_connector_dynamic_register (7 subtests) ========
[11:06:17] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[11:06:17] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[11:06:17] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[11:06:17] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[11:06:17] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[11:06:17] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[11:06:17] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[11:06:17] ========= [PASSED] drm_connector_dynamic_register ==========
[11:06:17] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[11:06:17] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[11:06:17] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[11:06:17] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[11:06:17] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[11:06:17] ========== drm_test_get_tv_mode_from_name_valid  ===========
[11:06:17] [PASSED] NTSC
[11:06:17] [PASSED] NTSC-443
[11:06:17] [PASSED] NTSC-J
[11:06:17] [PASSED] PAL
[11:06:17] [PASSED] PAL-M
[11:06:17] [PASSED] PAL-N
[11:06:17] [PASSED] SECAM
[11:06:17] [PASSED] Mono
[11:06:17] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[11:06:17] [PASSED] drm_test_get_tv_mode_from_name_truncated
[11:06:17] ============ [PASSED] drm_get_tv_mode_from_name ============
[11:06:17] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[11:06:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[11:06:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[11:06:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[11:06:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[11:06:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[11:06:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[11:06:17] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[11:06:17] [PASSED] VIC 96
[11:06:17] [PASSED] VIC 97
[11:06:17] [PASSED] VIC 101
[11:06:17] [PASSED] VIC 102
[11:06:17] [PASSED] VIC 106
[11:06:17] [PASSED] VIC 107
[11:06:17] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[11:06:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[11:06:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[11:06:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[11:06:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[11:06:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[11:06:17] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[11:06:17] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[11:06:17] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[11:06:17] [PASSED] Automatic
[11:06:17] [PASSED] Full
[11:06:17] [PASSED] Limited 16:235
[11:06:17] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[11:06:17] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[11:06:17] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[11:06:17] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[11:06:17] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[11:06:17] [PASSED] RGB
[11:06:17] [PASSED] YUV 4:2:0
[11:06:17] [PASSED] YUV 4:2:2
[11:06:17] [PASSED] YUV 4:4:4
[11:06:17] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[11:06:17] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[11:06:17] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[11:06:17] ============= drm_damage_helper (21 subtests) ==============
[11:06:17] [PASSED] drm_test_damage_iter_no_damage
[11:06:17] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[11:06:17] [PASSED] drm_test_damage_iter_no_damage_src_moved
[11:06:17] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[11:06:17] [PASSED] drm_test_damage_iter_no_damage_not_visible
[11:06:17] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[11:06:17] [PASSED] drm_test_damage_iter_no_damage_no_fb
[11:06:17] [PASSED] drm_test_damage_iter_simple_damage
[11:06:17] [PASSED] drm_test_damage_iter_single_damage
[11:06:17] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[11:06:17] [PASSED] drm_test_damage_iter_single_damage_outside_src
[11:06:17] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[11:06:17] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[11:06:17] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[11:06:17] [PASSED] drm_test_damage_iter_single_damage_src_moved
[11:06:17] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[11:06:17] [PASSED] drm_test_damage_iter_damage
[11:06:17] [PASSED] drm_test_damage_iter_damage_one_intersect
[11:06:17] [PASSED] drm_test_damage_iter_damage_one_outside
[11:06:17] [PASSED] drm_test_damage_iter_damage_src_moved
[11:06:17] [PASSED] drm_test_damage_iter_damage_not_visible
[11:06:17] ================ [PASSED] drm_damage_helper ================
[11:06:17] ============== drm_dp_mst_helper (3 subtests) ==============
[11:06:17] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[11:06:17] [PASSED] Clock 154000 BPP 30 DSC disabled
[11:06:17] [PASSED] Clock 234000 BPP 30 DSC disabled
[11:06:17] [PASSED] Clock 297000 BPP 24 DSC disabled
[11:06:17] [PASSED] Clock 332880 BPP 24 DSC enabled
[11:06:17] [PASSED] Clock 324540 BPP 24 DSC enabled
[11:06:17] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[11:06:17] ============== drm_test_dp_mst_calc_pbn_div  ===============
[11:06:17] [PASSED] Link rate 2000000 lane count 4
[11:06:17] [PASSED] Link rate 2000000 lane count 2
[11:06:17] [PASSED] Link rate 2000000 lane count 1
[11:06:17] [PASSED] Link rate 1350000 lane count 4
[11:06:17] [PASSED] Link rate 1350000 lane count 2
[11:06:17] [PASSED] Link rate 1350000 lane count 1
[11:06:17] [PASSED] Link rate 1000000 lane count 4
[11:06:17] [PASSED] Link rate 1000000 lane count 2
[11:06:17] [PASSED] Link rate 1000000 lane count 1
[11:06:17] [PASSED] Link rate 810000 lane count 4
[11:06:17] [PASSED] Link rate 810000 lane count 2
[11:06:17] [PASSED] Link rate 810000 lane count 1
[11:06:17] [PASSED] Link rate 540000 lane count 4
[11:06:17] [PASSED] Link rate 540000 lane count 2
[11:06:17] [PASSED] Link rate 540000 lane count 1
[11:06:17] [PASSED] Link rate 270000 lane count 4
[11:06:17] [PASSED] Link rate 270000 lane count 2
[11:06:17] [PASSED] Link rate 270000 lane count 1
[11:06:17] [PASSED] Link rate 162000 lane count 4
[11:06:17] [PASSED] Link rate 162000 lane count 2
[11:06:17] [PASSED] Link rate 162000 lane count 1
[11:06:17] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[11:06:17] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[11:06:17] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[11:06:17] [PASSED] DP_POWER_UP_PHY with port number
[11:06:17] [PASSED] DP_POWER_DOWN_PHY with port number
[11:06:17] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[11:06:17] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[11:06:17] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[11:06:17] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[11:06:17] [PASSED] DP_QUERY_PAYLOAD with port number
[11:06:17] [PASSED] DP_QUERY_PAYLOAD with VCPI
[11:06:17] [PASSED] DP_REMOTE_DPCD_READ with port number
[11:06:17] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[11:06:17] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[11:06:17] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[11:06:17] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[11:06:17] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[11:06:17] [PASSED] DP_REMOTE_I2C_READ with port number
[11:06:17] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[11:06:17] [PASSED] DP_REMOTE_I2C_READ with transactions array
[11:06:17] [PASSED] DP_REMOTE_I2C_WRITE with port number
[11:06:17] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[11:06:17] [PASSED] DP_REMOTE_I2C_WRITE with data array
[11:06:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[11:06:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[11:06:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[11:06:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[11:06:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[11:06:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[11:06:17] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[11:06:17] ================ [PASSED] drm_dp_mst_helper ================
[11:06:17] ================== drm_exec (7 subtests) ===================
[11:06:17] [PASSED] sanitycheck
[11:06:17] [PASSED] test_lock
[11:06:17] [PASSED] test_lock_unlock
[11:06:17] [PASSED] test_duplicates
[11:06:17] [PASSED] test_prepare
[11:06:17] [PASSED] test_prepare_array
[11:06:17] [PASSED] test_multiple_loops
[11:06:17] ==================== [PASSED] drm_exec =====================
[11:06:17] =========== drm_format_helper_test (17 subtests) ===========
[11:06:17] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[11:06:17] [PASSED] single_pixel_source_buffer
[11:06:17] [PASSED] single_pixel_clip_rectangle
[11:06:17] [PASSED] well_known_colors
[11:06:17] [PASSED] destination_pitch
[11:06:17] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[11:06:17] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[11:06:17] [PASSED] single_pixel_source_buffer
[11:06:17] [PASSED] single_pixel_clip_rectangle
[11:06:17] [PASSED] well_known_colors
[11:06:17] [PASSED] destination_pitch
[11:06:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[11:06:17] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[11:06:17] [PASSED] single_pixel_source_buffer
[11:06:17] [PASSED] single_pixel_clip_rectangle
[11:06:17] [PASSED] well_known_colors
[11:06:17] [PASSED] destination_pitch
[11:06:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[11:06:17] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[11:06:17] [PASSED] single_pixel_source_buffer
[11:06:17] [PASSED] single_pixel_clip_rectangle
[11:06:17] [PASSED] well_known_colors
[11:06:17] [PASSED] destination_pitch
[11:06:17] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[11:06:17] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[11:06:17] [PASSED] single_pixel_source_buffer
[11:06:17] [PASSED] single_pixel_clip_rectangle
[11:06:17] [PASSED] well_known_colors
[11:06:17] [PASSED] destination_pitch
[11:06:17] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[11:06:17] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[11:06:17] [PASSED] single_pixel_source_buffer
[11:06:17] [PASSED] single_pixel_clip_rectangle
[11:06:17] [PASSED] well_known_colors
[11:06:17] [PASSED] destination_pitch
[11:06:17] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[11:06:17] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[11:06:17] [PASSED] single_pixel_source_buffer
[11:06:17] [PASSED] single_pixel_clip_rectangle
[11:06:17] [PASSED] well_known_colors
[11:06:17] [PASSED] destination_pitch
[11:06:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[11:06:17] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[11:06:17] [PASSED] single_pixel_source_buffer
[11:06:17] [PASSED] single_pixel_clip_rectangle
[11:06:17] [PASSED] well_known_colors
[11:06:17] [PASSED] destination_pitch
[11:06:17] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[11:06:17] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[11:06:17] [PASSED] single_pixel_source_buffer
[11:06:17] [PASSED] single_pixel_clip_rectangle
[11:06:17] [PASSED] well_known_colors
[11:06:17] [PASSED] destination_pitch
[11:06:17] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[11:06:17] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[11:06:17] [PASSED] single_pixel_source_buffer
[11:06:17] [PASSED] single_pixel_clip_rectangle
[11:06:17] [PASSED] well_known_colors
[11:06:17] [PASSED] destination_pitch
[11:06:17] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[11:06:17] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[11:06:17] [PASSED] single_pixel_source_buffer
[11:06:17] [PASSED] single_pixel_clip_rectangle
[11:06:17] [PASSED] well_known_colors
[11:06:17] [PASSED] destination_pitch
[11:06:17] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[11:06:17] ============== drm_test_fb_xrgb8888_to_mono  ===============
[11:06:17] [PASSED] single_pixel_source_buffer
[11:06:17] [PASSED] single_pixel_clip_rectangle
[11:06:17] [PASSED] well_known_colors
[11:06:17] [PASSED] destination_pitch
[11:06:17] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[11:06:17] ==================== drm_test_fb_swab  =====================
[11:06:17] [PASSED] single_pixel_source_buffer
[11:06:17] [PASSED] single_pixel_clip_rectangle
[11:06:17] [PASSED] well_known_colors
[11:06:17] [PASSED] destination_pitch
[11:06:17] ================ [PASSED] drm_test_fb_swab =================
[11:06:17] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[11:06:17] [PASSED] single_pixel_source_buffer
[11:06:17] [PASSED] single_pixel_clip_rectangle
[11:06:17] [PASSED] well_known_colors
[11:06:17] [PASSED] destination_pitch
[11:06:17] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[11:06:17] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[11:06:17] [PASSED] single_pixel_source_buffer
[11:06:17] [PASSED] single_pixel_clip_rectangle
[11:06:17] [PASSED] well_known_colors
[11:06:17] [PASSED] destination_pitch
[11:06:17] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[11:06:17] ================= drm_test_fb_clip_offset  =================
[11:06:17] [PASSED] pass through
[11:06:17] [PASSED] horizontal offset
[11:06:17] [PASSED] vertical offset
[11:06:17] [PASSED] horizontal and vertical offset
[11:06:17] [PASSED] horizontal offset (custom pitch)
[11:06:17] [PASSED] vertical offset (custom pitch)
[11:06:17] [PASSED] horizontal and vertical offset (custom pitch)
[11:06:17] ============= [PASSED] drm_test_fb_clip_offset =============
[11:06:17] =================== drm_test_fb_memcpy  ====================
[11:06:17] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[11:06:17] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[11:06:17] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[11:06:17] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[11:06:17] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[11:06:17] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[11:06:17] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[11:06:17] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[11:06:17] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[11:06:17] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[11:06:17] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[11:06:17] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[11:06:17] =============== [PASSED] drm_test_fb_memcpy ================
[11:06:17] ============= [PASSED] drm_format_helper_test ==============
[11:06:17] ================= drm_format (18 subtests) =================
[11:06:17] [PASSED] drm_test_format_block_width_invalid
[11:06:17] [PASSED] drm_test_format_block_width_one_plane
[11:06:17] [PASSED] drm_test_format_block_width_two_plane
[11:06:17] [PASSED] drm_test_format_block_width_three_plane
[11:06:17] [PASSED] drm_test_format_block_width_tiled
[11:06:17] [PASSED] drm_test_format_block_height_invalid
[11:06:17] [PASSED] drm_test_format_block_height_one_plane
[11:06:17] [PASSED] drm_test_format_block_height_two_plane
[11:06:17] [PASSED] drm_test_format_block_height_three_plane
[11:06:17] [PASSED] drm_test_format_block_height_tiled
[11:06:17] [PASSED] drm_test_format_min_pitch_invalid
[11:06:17] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[11:06:17] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[11:06:17] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[11:06:17] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[11:06:17] [PASSED] drm_test_format_min_pitch_two_plane
[11:06:17] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[11:06:17] [PASSED] drm_test_format_min_pitch_tiled
[11:06:17] =================== [PASSED] drm_format ====================
[11:06:17] ============== drm_framebuffer (10 subtests) ===============
[11:06:17] ========== drm_test_framebuffer_check_src_coords  ==========
[11:06:17] [PASSED] Success: source fits into fb
[11:06:17] [PASSED] Fail: overflowing fb with x-axis coordinate
[11:06:17] [PASSED] Fail: overflowing fb with y-axis coordinate
[11:06:17] [PASSED] Fail: overflowing fb with source width
[11:06:17] [PASSED] Fail: overflowing fb with source height
[11:06:17] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[11:06:17] [PASSED] drm_test_framebuffer_cleanup
[11:06:17] =============== drm_test_framebuffer_create  ===============
[11:06:17] [PASSED] ABGR8888 normal sizes
[11:06:17] [PASSED] ABGR8888 max sizes
[11:06:17] [PASSED] ABGR8888 pitch greater than min required
[11:06:17] [PASSED] ABGR8888 pitch less than min required
[11:06:17] [PASSED] ABGR8888 Invalid width
[11:06:17] [PASSED] ABGR8888 Invalid buffer handle
[11:06:17] [PASSED] No pixel format
[11:06:17] [PASSED] ABGR8888 Width 0
[11:06:17] [PASSED] ABGR8888 Height 0
[11:06:17] [PASSED] ABGR8888 Out of bound height * pitch combination
[11:06:17] [PASSED] ABGR8888 Large buffer offset
[11:06:17] [PASSED] ABGR8888 Buffer offset for inexistent plane
[11:06:17] [PASSED] ABGR8888 Invalid flag
[11:06:17] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[11:06:17] [PASSED] ABGR8888 Valid buffer modifier
[11:06:17] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[11:06:17] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[11:06:17] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[11:06:17] [PASSED] NV12 Normal sizes
[11:06:17] [PASSED] NV12 Max sizes
[11:06:17] [PASSED] NV12 Invalid pitch
[11:06:17] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[11:06:17] [PASSED] NV12 different  modifier per-plane
[11:06:17] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[11:06:17] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[11:06:17] [PASSED] NV12 Modifier for inexistent plane
[11:06:17] [PASSED] NV12 Handle for inexistent plane
[11:06:17] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[11:06:17] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[11:06:17] [PASSED] YVU420 Normal sizes
[11:06:17] [PASSED] YVU420 Max sizes
[11:06:17] [PASSED] YVU420 Invalid pitch
[11:06:17] [PASSED] YVU420 Different pitches
[11:06:17] [PASSED] YVU420 Different buffer offsets/pitches
[11:06:17] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[11:06:17] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[11:06:17] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[11:06:17] [PASSED] YVU420 Valid modifier
[11:06:17] [PASSED] YVU420 Different modifiers per plane
[11:06:17] [PASSED] YVU420 Modifier for inexistent plane
[11:06:17] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[11:06:17] [PASSED] X0L2 Normal sizes
[11:06:17] [PASSED] X0L2 Max sizes
[11:06:17] [PASSED] X0L2 Invalid pitch
[11:06:17] [PASSED] X0L2 Pitch greater than minimum required
[11:06:17] [PASSED] X0L2 Handle for inexistent plane
[11:06:17] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[11:06:17] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[11:06:17] [PASSED] X0L2 Valid modifier
[11:06:17] [PASSED] X0L2 Modifier for inexistent plane
[11:06:17] =========== [PASSED] drm_test_framebuffer_create ===========
[11:06:17] [PASSED] drm_test_framebuffer_free
[11:06:17] [PASSED] drm_test_framebuffer_init
[11:06:17] [PASSED] drm_test_framebuffer_init_bad_format
[11:06:17] [PASSED] drm_test_framebuffer_init_dev_mismatch
[11:06:17] [PASSED] drm_test_framebuffer_lookup
[11:06:17] [PASSED] drm_test_framebuffer_lookup_inexistent
[11:06:17] [PASSED] drm_test_framebuffer_modifiers_not_supported
[11:06:17] ================= [PASSED] drm_framebuffer =================
[11:06:17] ================ drm_gem_shmem (8 subtests) ================
[11:06:17] [PASSED] drm_gem_shmem_test_obj_create
[11:06:17] [PASSED] drm_gem_shmem_test_obj_create_private
[11:06:17] [PASSED] drm_gem_shmem_test_pin_pages
[11:06:17] [PASSED] drm_gem_shmem_test_vmap
[11:06:17] [PASSED] drm_gem_shmem_test_get_sg_table
[11:06:17] [PASSED] drm_gem_shmem_test_get_pages_sgt
[11:06:17] [PASSED] drm_gem_shmem_test_madvise
[11:06:17] [PASSED] drm_gem_shmem_test_purge
[11:06:17] ================== [PASSED] drm_gem_shmem ==================
[11:06:17] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[11:06:17] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[11:06:17] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[11:06:17] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[11:06:17] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[11:06:17] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[11:06:17] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[11:06:17] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[11:06:17] [PASSED] Automatic
[11:06:17] [PASSED] Full
[11:06:17] [PASSED] Limited 16:235
[11:06:17] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[11:06:17] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[11:06:17] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[11:06:17] [PASSED] drm_test_check_disable_connector
[11:06:17] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[11:06:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[11:06:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[11:06:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[11:06:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[11:06:17] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[11:06:17] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[11:06:17] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[11:06:17] [PASSED] drm_test_check_output_bpc_dvi
[11:06:17] [PASSED] drm_test_check_output_bpc_format_vic_1
[11:06:17] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[11:06:17] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[11:06:17] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[11:06:17] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[11:06:17] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[11:06:17] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[11:06:17] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[11:06:17] ============ drm_test_check_hdmi_color_format  =============
[11:06:17] [PASSED] AUTO -> RGB
[11:06:17] [PASSED] YCBCR422 -> YUV422
[11:06:17] [PASSED] YCBCR420 -> YUV420
[11:06:17] [PASSED] YCBCR444 -> YUV444
[11:06:17] [PASSED] RGB -> RGB
[11:06:17] ======== [PASSED] drm_test_check_hdmi_color_format =========
[11:06:17] ======== drm_test_check_hdmi_color_format_420_only  ========
[11:06:17] [PASSED] RGB should fail
[11:06:17] [PASSED] YUV444 should fail
[11:06:17] [PASSED] YUV422 should fail
[11:06:17] [PASSED] YUV420 should work
[11:06:17] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[11:06:17] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[11:06:17] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[11:06:17] [PASSED] drm_test_check_broadcast_rgb_value
[11:06:17] [PASSED] drm_test_check_bpc_8_value
[11:06:17] [PASSED] drm_test_check_bpc_10_value
[11:06:17] [PASSED] drm_test_check_bpc_12_value
[11:06:17] [PASSED] drm_test_check_format_value
[11:06:17] [PASSED] drm_test_check_tmds_char_value
[11:06:17] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[11:06:17] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[11:06:17] [PASSED] drm_test_check_mode_valid
[11:06:17] [PASSED] drm_test_check_mode_valid_reject
[11:06:17] [PASSED] drm_test_check_mode_valid_reject_rate
[11:06:17] [PASSED] drm_test_check_mode_valid_reject_max_clock
[11:06:17] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[11:06:17] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[11:06:17] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[11:06:17] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[11:06:17] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[11:06:17] [PASSED] drm_test_check_infoframes
[11:06:17] [PASSED] drm_test_check_reject_avi_infoframe
[11:06:17] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[11:06:17] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[11:06:17] [PASSED] drm_test_check_reject_audio_infoframe
[11:06:17] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[11:06:17] ================= drm_managed (2 subtests) =================
[11:06:17] [PASSED] drm_test_managed_release_action
[11:06:17] [PASSED] drm_test_managed_run_action
[11:06:17] =================== [PASSED] drm_managed ===================
[11:06:17] =================== drm_mm (6 subtests) ====================
[11:06:17] [PASSED] drm_test_mm_init
[11:06:17] [PASSED] drm_test_mm_debug
[11:06:17] [PASSED] drm_test_mm_align32
[11:06:17] [PASSED] drm_test_mm_align64
[11:06:17] [PASSED] drm_test_mm_lowest
[11:06:17] [PASSED] drm_test_mm_highest
[11:06:17] ===================== [PASSED] drm_mm ======================
[11:06:17] ============= drm_modes_analog_tv (5 subtests) =============
[11:06:17] [PASSED] drm_test_modes_analog_tv_mono_576i
[11:06:17] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[11:06:17] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[11:06:17] [PASSED] drm_test_modes_analog_tv_pal_576i
[11:06:17] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[11:06:17] =============== [PASSED] drm_modes_analog_tv ===============
[11:06:17] ============== drm_plane_helper (2 subtests) ===============
[11:06:17] =============== drm_test_check_plane_state  ================
[11:06:17] [PASSED] clipping_simple
[11:06:17] [PASSED] clipping_rotate_reflect
[11:06:17] [PASSED] positioning_simple
[11:06:17] [PASSED] upscaling
[11:06:17] [PASSED] downscaling
[11:06:17] [PASSED] rounding1
[11:06:17] [PASSED] rounding2
[11:06:17] [PASSED] rounding3
[11:06:17] [PASSED] rounding4
[11:06:17] =========== [PASSED] drm_test_check_plane_state ============
[11:06:17] =========== drm_test_check_invalid_plane_state  ============
[11:06:17] [PASSED] positioning_invalid
[11:06:17] [PASSED] upscaling_invalid
[11:06:17] [PASSED] downscaling_invalid
[11:06:17] ======= [PASSED] drm_test_check_invalid_plane_state ========
[11:06:17] ================ [PASSED] drm_plane_helper =================
[11:06:17] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[11:06:17] ====== drm_test_connector_helper_tv_get_modes_check  =======
[11:06:17] [PASSED] None
[11:06:17] [PASSED] PAL
[11:06:17] [PASSED] NTSC
[11:06:17] [PASSED] Both, NTSC Default
[11:06:17] [PASSED] Both, PAL Default
[11:06:17] [PASSED] Both, NTSC Default, with PAL on command-line
[11:06:17] [PASSED] Both, PAL Default, with NTSC on command-line
[11:06:17] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[11:06:17] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[11:06:17] ================== drm_rect (9 subtests) ===================
[11:06:17] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[11:06:17] [PASSED] drm_test_rect_clip_scaled_not_clipped
[11:06:17] [PASSED] drm_test_rect_clip_scaled_clipped
[11:06:17] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[11:06:17] ================= drm_test_rect_intersect  =================
[11:06:17] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[11:06:17] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[11:06:17] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[11:06:17] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[11:06:17] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[11:06:17] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[11:06:17] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[11:06:17] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[11:06:17] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[11:06:17] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[11:06:17] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[11:06:17] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[11:06:17] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[11:06:17] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[11:06:17] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[11:06:17] ============= [PASSED] drm_test_rect_intersect =============
[11:06:17] ================ drm_test_rect_calc_hscale  ================
[11:06:17] [PASSED] normal use
[11:06:17] [PASSED] out of max range
[11:06:17] [PASSED] out of min range
[11:06:17] [PASSED] zero dst
[11:06:17] [PASSED] negative src
[11:06:17] [PASSED] negative dst
[11:06:17] ============ [PASSED] drm_test_rect_calc_hscale ============
[11:06:17] ================ drm_test_rect_calc_vscale  ================
[11:06:17] [PASSED] normal use
[11:06:17] [PASSED] out of max range
[11:06:17] [PASSED] out of min range
[11:06:17] [PASSED] zero dst
[11:06:17] [PASSED] negative src
[11:06:17] [PASSED] negative dst
[11:06:17] ============ [PASSED] drm_test_rect_calc_vscale ============
[11:06:17] ================== drm_test_rect_rotate  ===================
[11:06:17] [PASSED] reflect-x
[11:06:17] [PASSED] reflect-y
[11:06:17] [PASSED] rotate-0
[11:06:17] [PASSED] rotate-90
[11:06:17] [PASSED] rotate-180
[11:06:17] [PASSED] rotate-270
[11:06:17] ============== [PASSED] drm_test_rect_rotate ===============
[11:06:17] ================ drm_test_rect_rotate_inv  =================
[11:06:17] [PASSED] reflect-x
[11:06:17] [PASSED] reflect-y
[11:06:17] [PASSED] rotate-0
[11:06:17] [PASSED] rotate-90
[11:06:17] [PASSED] rotate-180
[11:06:17] [PASSED] rotate-270
[11:06:17] ============ [PASSED] drm_test_rect_rotate_inv =============
[11:06:17] ==================== [PASSED] drm_rect =====================
[11:06:17] ============ drm_sysfb_modeset_test (1 subtest) ============
[11:06:17] ============ drm_test_sysfb_build_fourcc_list  =============
[11:06:17] [PASSED] no native formats
[11:06:17] [PASSED] XRGB8888 as native format
[11:06:17] [PASSED] remove duplicates
[11:06:17] [PASSED] convert alpha formats
[11:06:17] [PASSED] random formats
[11:06:17] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[11:06:17] ============= [PASSED] drm_sysfb_modeset_test ==============
[11:06:17] ================== drm_fixp (2 subtests) ===================
[11:06:17] [PASSED] drm_test_int2fixp
[11:06:17] [PASSED] drm_test_sm2fixp
[11:06:17] ==================== [PASSED] drm_fixp =====================
[11:06:17] ============================================================
[11:06:17] Testing complete. Ran 637 tests: passed: 637
[11:06:17] Elapsed time: 27.085s total, 1.832s configuring, 25.087s building, 0.147s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[11:06:17] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:06:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:06:29] Starting KUnit Kernel (1/1)...
[11:06:29] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:06:29] ================= ttm_device (5 subtests) ==================
[11:06:29] [PASSED] ttm_device_init_basic
[11:06:29] [PASSED] ttm_device_init_multiple
[11:06:29] [PASSED] ttm_device_fini_basic
[11:06:29] [PASSED] ttm_device_init_no_vma_man
[11:06:29] ================== ttm_device_init_pools  ==================
[11:06:29] [PASSED] No DMA allocations, no DMA32 required
[11:06:29] [PASSED] DMA allocations, DMA32 required
[11:06:29] [PASSED] No DMA allocations, DMA32 required
[11:06:29] [PASSED] DMA allocations, no DMA32 required
[11:06:29] ============== [PASSED] ttm_device_init_pools ==============
[11:06:29] =================== [PASSED] ttm_device ====================
[11:06:29] ================== ttm_pool (8 subtests) ===================
[11:06:29] ================== ttm_pool_alloc_basic  ===================
[11:06:29] [PASSED] One page
[11:06:29] [PASSED] More than one page
[11:06:29] [PASSED] Above the allocation limit
[11:06:29] [PASSED] One page, with coherent DMA mappings enabled
[11:06:29] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:06:29] ============== [PASSED] ttm_pool_alloc_basic ===============
[11:06:29] ============== ttm_pool_alloc_basic_dma_addr  ==============
[11:06:29] [PASSED] One page
[11:06:29] [PASSED] More than one page
[11:06:29] [PASSED] Above the allocation limit
[11:06:29] [PASSED] One page, with coherent DMA mappings enabled
[11:06:29] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:06:29] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[11:06:29] [PASSED] ttm_pool_alloc_order_caching_match
[11:06:29] [PASSED] ttm_pool_alloc_caching_mismatch
[11:06:29] [PASSED] ttm_pool_alloc_order_mismatch
[11:06:29] [PASSED] ttm_pool_free_dma_alloc
[11:06:29] [PASSED] ttm_pool_free_no_dma_alloc
[11:06:29] [PASSED] ttm_pool_fini_basic
[11:06:29] ==================== [PASSED] ttm_pool =====================
[11:06:29] ================ ttm_resource (8 subtests) =================
[11:06:29] ================= ttm_resource_init_basic  =================
[11:06:29] [PASSED] Init resource in TTM_PL_SYSTEM
[11:06:29] [PASSED] Init resource in TTM_PL_VRAM
[11:06:29] [PASSED] Init resource in a private placement
[11:06:29] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[11:06:29] ============= [PASSED] ttm_resource_init_basic =============
[11:06:29] [PASSED] ttm_resource_init_pinned
[11:06:29] [PASSED] ttm_resource_fini_basic
[11:06:29] [PASSED] ttm_resource_manager_init_basic
[11:06:29] [PASSED] ttm_resource_manager_usage_basic
[11:06:29] [PASSED] ttm_resource_manager_set_used_basic
[11:06:29] [PASSED] ttm_sys_man_alloc_basic
[11:06:29] [PASSED] ttm_sys_man_free_basic
[11:06:29] ================== [PASSED] ttm_resource ===================
[11:06:29] =================== ttm_tt (15 subtests) ===================
[11:06:29] ==================== ttm_tt_init_basic  ====================
[11:06:29] [PASSED] Page-aligned size
[11:06:29] [PASSED] Extra pages requested
[11:06:29] ================ [PASSED] ttm_tt_init_basic ================
[11:06:29] [PASSED] ttm_tt_init_misaligned
[11:06:29] [PASSED] ttm_tt_fini_basic
[11:06:29] [PASSED] ttm_tt_fini_sg
[11:06:29] [PASSED] ttm_tt_fini_shmem
[11:06:29] [PASSED] ttm_tt_create_basic
[11:06:29] [PASSED] ttm_tt_create_invalid_bo_type
[11:06:29] [PASSED] ttm_tt_create_ttm_exists
[11:06:29] [PASSED] ttm_tt_create_failed
[11:06:29] [PASSED] ttm_tt_destroy_basic
[11:06:29] [PASSED] ttm_tt_populate_null_ttm
[11:06:29] [PASSED] ttm_tt_populate_populated_ttm
[11:06:29] [PASSED] ttm_tt_unpopulate_basic
[11:06:29] [PASSED] ttm_tt_unpopulate_empty_ttm
[11:06:29] [PASSED] ttm_tt_swapin_basic
[11:06:29] ===================== [PASSED] ttm_tt ======================
[11:06:29] =================== ttm_bo (14 subtests) ===================
[11:06:29] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[11:06:29] [PASSED] Cannot be interrupted and sleeps
[11:06:29] [PASSED] Cannot be interrupted, locks straight away
[11:06:29] [PASSED] Can be interrupted, sleeps
[11:06:29] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[11:06:29] [PASSED] ttm_bo_reserve_locked_no_sleep
[11:06:29] [PASSED] ttm_bo_reserve_no_wait_ticket
[11:06:29] [PASSED] ttm_bo_reserve_double_resv
[11:06:29] [PASSED] ttm_bo_reserve_interrupted
[11:06:29] [PASSED] ttm_bo_reserve_deadlock
[11:06:29] [PASSED] ttm_bo_unreserve_basic
[11:06:29] [PASSED] ttm_bo_unreserve_pinned
[11:06:29] [PASSED] ttm_bo_unreserve_bulk
[11:06:29] [PASSED] ttm_bo_fini_basic
[11:06:29] [PASSED] ttm_bo_fini_shared_resv
[11:06:29] [PASSED] ttm_bo_pin_basic
[11:06:29] [PASSED] ttm_bo_pin_unpin_resource
[11:06:29] [PASSED] ttm_bo_multiple_pin_one_unpin
[11:06:29] ===================== [PASSED] ttm_bo ======================
[11:06:29] ============== ttm_bo_validate (22 subtests) ===============
[11:06:29] ============== ttm_bo_init_reserved_sys_man  ===============
[11:06:29] [PASSED] Buffer object for userspace
[11:06:29] [PASSED] Kernel buffer object
[11:06:29] [PASSED] Shared buffer object
[11:06:29] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[11:06:29] ============== ttm_bo_init_reserved_mock_man  ==============
[11:06:29] [PASSED] Buffer object for userspace
[11:06:29] [PASSED] Kernel buffer object
[11:06:29] [PASSED] Shared buffer object
[11:06:29] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[11:06:29] [PASSED] ttm_bo_init_reserved_resv
[11:06:29] ================== ttm_bo_validate_basic  ==================
[11:06:29] [PASSED] Buffer object for userspace
[11:06:29] [PASSED] Kernel buffer object
[11:06:29] [PASSED] Shared buffer object
[11:06:29] ============== [PASSED] ttm_bo_validate_basic ==============
[11:06:29] [PASSED] ttm_bo_validate_invalid_placement
[11:06:29] ============= ttm_bo_validate_same_placement  ==============
[11:06:29] [PASSED] System manager
[11:06:29] [PASSED] VRAM manager
[11:06:29] ========= [PASSED] ttm_bo_validate_same_placement ==========
[11:06:29] [PASSED] ttm_bo_validate_failed_alloc
[11:06:29] [PASSED] ttm_bo_validate_pinned
[11:06:29] [PASSED] ttm_bo_validate_busy_placement
[11:06:29] ================ ttm_bo_validate_multihop  =================
[11:06:29] [PASSED] Buffer object for userspace
[11:06:29] [PASSED] Kernel buffer object
[11:06:29] [PASSED] Shared buffer object
[11:06:29] ============ [PASSED] ttm_bo_validate_multihop =============
[11:06:29] ========== ttm_bo_validate_no_placement_signaled  ==========
[11:06:29] [PASSED] Buffer object in system domain, no page vector
[11:06:29] [PASSED] Buffer object in system domain with an existing page vector
[11:06:29] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[11:06:29] ======== ttm_bo_validate_no_placement_not_signaled  ========
[11:06:29] [PASSED] Buffer object for userspace
[11:06:29] [PASSED] Kernel buffer object
[11:06:29] [PASSED] Shared buffer object
[11:06:29] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[11:06:29] [PASSED] ttm_bo_validate_move_fence_signaled
[11:06:29] ========= ttm_bo_validate_move_fence_not_signaled  =========
[11:06:29] [PASSED] Waits for GPU
[11:06:29] [PASSED] Tries to lock straight away
[11:06:29] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[11:06:29] [PASSED] ttm_bo_validate_swapout
[11:06:29] [PASSED] ttm_bo_validate_happy_evict
[11:06:29] [PASSED] ttm_bo_validate_all_pinned_evict
[11:06:29] [PASSED] ttm_bo_validate_allowed_only_evict
[11:06:29] [PASSED] ttm_bo_validate_deleted_evict
[11:06:29] [PASSED] ttm_bo_validate_busy_domain_evict
[11:06:29] [PASSED] ttm_bo_validate_evict_gutting
[11:06:29] [PASSED] ttm_bo_validate_recrusive_evict
[11:06:29] ================= [PASSED] ttm_bo_validate =================
[11:06:29] ============================================================
[11:06:29] Testing complete. Ran 102 tests: passed: 102
[11:06:29] Elapsed time: 12.021s total, 1.777s configuring, 10.029s building, 0.184s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/xe: make CTX_TIMESTAMP TOCTOU-safe and handle sentinels (rev6)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 889 bytes --]

== Series Details ==

Series: drm/xe: make CTX_TIMESTAMP TOCTOU-safe and handle sentinels (rev6)
URL   : https://patchwork.freedesktop.org/series/168394/
State : success

== Summary ==

CI Bug Log - changes from xe-5467-2c64192f1ad194a53800f6dd8c779d5b4bbc1831_BAT -> xe-pw-168394v6_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 12)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5467-2c64192f1ad194a53800f6dd8c779d5b4bbc1831 -> xe-pw-168394v6

  IGT_9020: 9020
  xe-5467-2c64192f1ad194a53800f6dd8c779d5b4bbc1831: 2c64192f1ad194a53800f6dd8c779d5b4bbc1831
  xe-pw-168394v6: 168394v6

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168394v6/index.html

[-- Attachment #2: Type: text/html, Size: 1437 bytes --]

Re: [PATCH v6 3/3] drm/xe/lrc: Fix ABA race on engine migration in context timestamp read

[Rodrigo Vivi]

On Thu, Jul 23, 2026 at 09:27:55AM +0000, Gajendra Uttamchand wrote:
> xe_lrc_context_timestamp() reads the engine id once via
> xe_lrc_engine_id(lrc) and uses it to fetch the live CTX_TIMESTAMP MMIO
> register, then re-checks the LRC-stored value to detect whether the
> context switched out while the MMIO read was in flight. That check
> only confirms the context is (still/again) active - it does not
> confirm it is active on the *same* engine the MMIO read targeted.
> 
> If the context is saved and restored onto a different engine between
> the initial engine id read and the final activity check, the
> CONTEXT_ACTIVE sentinel will be observed again (now for the new
> engine), and the stale MMIO value read from the old, now-unrelated
> engine is returned as if it were valid.
> 
> Pin the engine id used for the MMIO read and re-validate it against
> the current engine id after the final activity check. If the engine
> changed, retry the whole read (bounded by a small retry count) instead
> of trusting a timestamp sampled from an unrelated context, falling
> back to the last cached value if the context keeps migrating.
> 
> Signed-off-by: Gajendra Uttamchand <gajendra.uttamchand@intel.com>

The excess of comments in your patches is a good indication that you
were helped by AI. There is nothing wrong with that. Just be sure
to respect the rules and be transparent on its usage:

Documentation/process/coding-assistants.rst

And please, remove the excess of the comments as well. The code should
be obvious and self explained.

> ---
>  drivers/gpu/drm/xe/xe_lrc.c | 66 ++++++++++++++++++++++++++-----------
>  1 file changed, 46 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
> index 1e910669e8d1..314de730ace6 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c
> @@ -2736,39 +2736,65 @@ static u64 xe_lrc_update_multi_queue_timestamp(struct xe_lrc *lrc, u64 *old_ts)
>  	return lrc->queue_timestamp;
>  }
> 
> +/*
> + * Between reading the engine id and re-checking that the context is
> + * still active below, the context may have been saved and restored
> + * onto a *different* engine, in which case the MMIO read in between
> + * targeted an unrelated context on the old engine.
> + * Bound the number of times we retry the full read sequence when a
> + * context migration between engines is detected. A small bound (3)
> + * prevents long loops; if we exhaust retries we fall back to the
> + * last cached `lrc->ctx_timestamp`.
> + */
> +#define CTX_TIMESTAMP_MAX_RETRIES 3
> +
>  static u64 xe_lrc_context_timestamp(struct xe_lrc *lrc)
>  {
>  	u64 reg_ts, new_ts = lrc->ctx_timestamp;
>  	u64 stored;
> +	u32 engine_id;
> +	int retries = CTX_TIMESTAMP_MAX_RETRIES;
> 
>  	/* CTX_TIMESTAMP mmio read is invalid on VF, so return the LRC value */
>  	if (IS_SRIOV_VF(lrc_to_xe(lrc)))
>  		return xe_lrc_ctx_timestamp(lrc);
> 
> -	/*
> -	 * Safely read CTX_TIMESTAMP: check the LRC-stored value before and
> -	 * after the MMIO read to avoid a TOCTOU where a context switch makes the
> -	 * MMIO value stale. If the LRC value is not `CONTEXT_ACTIVE` return it;
> -	 * otherwise accept the MMIO value only if the context remained active.
> -	 */
> +	do {
> +		/*
> +		 * Safely read CTX_TIMESTAMP: check the LRC-stored value before and
> +		 * after the MMIO read to avoid a TOCTOU where a context switch makes the
> +		 * MMIO value stale. If the LRC value is not `CONTEXT_ACTIVE` return it;
> +		 * otherwise accept the MMIO value only if the context remained active.
> +		 */
> 
> -	stored = xe_lrc_ctx_timestamp(lrc);
> -	if (stored != CONTEXT_ACTIVE)
> -		return stored;
> +		stored = xe_lrc_ctx_timestamp(lrc);
> +		if (stored != CONTEXT_ACTIVE)
> +			return stored;
> 
> -	/* Context is active: read the live timestamp from the engine's MMIO register. */
> -	if (!get_ctx_timestamp(lrc, xe_lrc_engine_id(lrc), &reg_ts))
> -		new_ts = reg_ts;
> +		/* Context is active: read the live timestamp from the engine's MMIO register. */
> +		engine_id = xe_lrc_engine_id(lrc);
> +		if (!get_ctx_timestamp(lrc, engine_id, &reg_ts))
> +			new_ts = reg_ts;
> 
> -	/* Re-check the LRC-stored timestamp: if the context switched out while
> -	 * reading MMIO the hardware saved the canonical timestamp into the LRC
> -	 * during context-save, so return that value instead of the MMIO read.
> -	 */
> -	stored = xe_lrc_ctx_timestamp(lrc);
> -	if (stored != CONTEXT_ACTIVE)
> -		return stored;
> +		/* Re-check the LRC-stored timestamp: if the context switched out while
> +		 * reading MMIO the hardware saved the canonical timestamp into the LRC
> +		 * during context-save, so return that value instead of the MMIO read.
> +		 */
> +		stored = xe_lrc_ctx_timestamp(lrc);
> +		if (stored != CONTEXT_ACTIVE)
> +			return stored;
> +
> +		/*
> +		 * Still active, but possibly on a different engine than the one
> +		 * we just read MMIO from (context switched out and back in
> +		 * elsewhere). Only trust new_ts if the engine id hasn't changed;
> +		 * otherwise retry the whole sequence against the current engine.
> +		 */
> +		if (xe_lrc_engine_id(lrc) == engine_id)
> +			return new_ts;
> +	} while (--retries);
> 
> -	return new_ts;
> +	return lrc->ctx_timestamp;
>  }
> 
>  static u64 xe_lrc_update_context_timestamp(struct xe_lrc *lrc, u64 *old_ts)
> --
> 2.43.0
>