[PATCH] ARM: set MAX_PHYSMEM_BITS to 32 for !LPAE

[PATCH] ARM: set MAX_PHYSMEM_BITS to 32 for !LPAE

[Karl Mehltretter]

The default MAX_PHYSMEM_BITS of 36 was introduced for LPAE platforms,
but also applies to non-LPAE ARM, which has 32-bit physical addresses.
With GET_FREE_REGION and CONFIG_WERROR, this causes:

  error: conversion from 'long long unsigned int' to 'resource_size_t'
  changes value from '68719476735' to '4294967295'

Use a 36-bit default only for LPAE builds.

Fixes: db57f88e4ccb ("ARM: 8411/1: Add default SPARSEMEM settings")
Assisted-by: Claude:claude-fable-5
---
 arch/arm/include/asm/sparsemem.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/include/asm/sparsemem.h b/arch/arm/include/asm/sparsemem.h
index 421e3415338a..6b512be3a34a 100644
--- a/arch/arm/include/asm/sparsemem.h
+++ b/arch/arm/include/asm/sparsemem.h
@@ -19,7 +19,11 @@
  * These can be overridden in your mach/memory.h.
  */
 #if !defined(MAX_PHYSMEM_BITS) || !defined(SECTION_SIZE_BITS)
+#ifdef CONFIG_ARM_LPAE
 #define MAX_PHYSMEM_BITS	36
+#else
+#define MAX_PHYSMEM_BITS	32
+#endif
 #define SECTION_SIZE_BITS	28
 #endif
 
-- 
2.53.0

Re: [PATCH] ARM: set MAX_PHYSMEM_BITS to 32 for !LPAE

[Arnd Bergmann]

On Fri, Jul 24, 2026, at 08:30, Karl Mehltretter wrote:
> The default MAX_PHYSMEM_BITS of 36 was introduced for LPAE platforms,
> but also applies to non-LPAE ARM, which has 32-bit physical addresses.
> With GET_FREE_REGION and CONFIG_WERROR, this causes:
>
>   error: conversion from 'long long unsigned int' to 'resource_size_t'
>   changes value from '68719476735' to '4294967295'
>
> Use a 36-bit default only for LPAE builds.
>
> Fixes: db57f88e4ccb ("ARM: 8411/1: Add default SPARSEMEM settings")
> Assisted-by: Claude:claude-fable-5

When we added the 36 bit limit, that was specifically to account
for CONFIG_IO_36 on XSC3 cores, see commit 23bdf86aa06e ("[ARM]
3377/2: add support for intel xsc3 core") and the thread around

https://lore.kernel.org/all/CAK8P3a2MCdUbN0QSb+M3g5_6HjPsaQwtKxFjADMZWomdry4-Ww@mail.gmail.com/

It's probably safe to assume that none of this is used in
practice, as only PXA3xx has this CPU core now that IXP23xx and IOP
are gone, and PXA does not use the high addressing. Similarly, we
never had any platform attempt to use IO_36 on ARMv6 or ARMv7-A.

Can you update the patch to also remove CONFIG_IO_36 and explain
the dependency?

     Arnd

Re: [PATCH] ARM: set MAX_PHYSMEM_BITS to 32 for !LPAE

[Karl Mehltretter]

On Fri, Jul 24, 2026 at 09:23:45AM +0100, Arnd Bergmann wrote:
> When we added the 36 bit limit, that was specifically to account
> for CONFIG_IO_36 on XSC3 cores, see commit 23bdf86aa06e ("[ARM]
> 3377/2: add support for intel xsc3 core") and the thread around
> 
> https://lore.kernel.org/all/CAK8P3a2MCdUbN0QSb+M3g5_6HjPsaQwtKxFjADMZWomdry4-Ww@mail.gmail.com/
> 
> It's probably safe to assume that none of this is used in
> practice, as only PXA3xx has this CPU core now that IXP23xx and IOP
> are gone, and PXA does not use the high addressing. Similarly, we
> never had any platform attempt to use IO_36 on ARMv6 or ARMv7-A.
> 
> Can you update the patch to also remove CONFIG_IO_36 and explain
> the dependency?

Hi Arnd,

Good catch, I wasn't aware of that history. I'll do that.

Thanks,
Karl