From: Yao Zi <me@ziyao.cc>
To: codykang.hk@gmail.com, David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Yixun Lan <dlan@kernel.org>,
Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Haylen Chu <heylenay@4d2.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>
Cc: dri-devel@lists.freedesktop.org, linux-riscv@lists.infradead.org,
devicetree@vger.kernel.org, spacemit@lists.linux.dev,
linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
linux-clk@vger.kernel.org, Yao Zi <me@ziyao.cc>
Subject: Re: [PATCH RESEND 12/17] drm/spacemit: add Innosilicon DP/eDP controller bridge driver
Date: Mon, 27 Jul 2026 12:29:48 +0000 [thread overview]
Message-ID: <amdPPBOH-Dk4oU7y@pie> (raw)
In-Reply-To: <20260725-k3-display-v1-12-6de34d80e86c@gmail.com>
On Sat, Jul 25, 2026 at 12:51:21AM -0400, Cody Kang via B4 Relay wrote:
> From: Cody Kang <codykang.hk@gmail.com>
>
> Add the DP/eDP controller that sits downstream of the Saturn DPU. Two
> identical instances share one compatible; the eDP-vs-DP role is board
> wiring, so it is taken from the devicetree: an eDP panel always sits
> under an aux-bus child node, an external DP connector never does.
>
> The link is driven through the generic PHY framework, so the controller
> never touches a PLL register. The controller's HPD interrupt is gated by
> the DP pixel clock, which can be off exactly when a plug has to be
> caught, so the connector is also polled and the interrupt path re-reads
> the live level when it does fire.
>
> Signed-off-by: Cody Kang <codykang.hk@gmail.com>
> ---
> drivers/gpu/drm/spacemit/Kconfig | 19 +
> drivers/gpu/drm/spacemit/Makefile | 3 +
> drivers/gpu/drm/spacemit/spacemit_inno_dp.c | 2443 +++++++++++++++++++++++++++
> drivers/gpu/drm/spacemit/spacemit_inno_dp.h | 328 ++++
> 4 files changed, 2793 insertions(+)
...
> +static int inno_dp_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *aux_bus_np;
> + struct spacemit_dp_dev *dp;
> + struct resource *res;
> + int ret;
...
> + dp->pxclk = devm_clk_get(dev, "pxclk");
> + if (IS_ERR(dp->pxclk)) {
> + ret = dev_err_probe(dev, PTR_ERR(dp->pxclk),
> + "failed to get pxclk\n");
> + return ret;
> + }
It seems pxclk is only enabled in probe() and disabled in remove(),
please consider using devm_clk_get_optional_enabled().
...
> + if (dp->pxclk) {
> + ret = clk_prepare_enable(dp->pxclk);
> + if (ret) {
> + dev_err(dev, "failed to enable pxclk: %d\n", ret);
> + goto err_reset;
> + }
> + }
So this check could be dropped.
...
> + /*
> + * The PHY exposes its PLL as the APMU pixel-clock mux's external
> + * parent.
> + */
> + dp->pll_clk = devm_clk_get(dev, "pll");
> + if (IS_ERR(dp->pll_clk)) {
> + ret = dev_err_probe(dev, PTR_ERR(dp->pll_clk),
> + "failed to get PHY pixel clock\n");
> + goto err_clk;
> + }
Same for the "pll" clock.
> + if (dp->pxclk) {
> + ret = clk_set_parent(dp->pxclk, dp->pll_clk);
> + if (ret) {
> + dev_err(dev, "failed to route eDP pixel mux to PHY PLL: %d\n", ret);
> + goto err_clk;
> + }
> + }
> + */
> + ret = devm_request_threaded_irq(dev, dp->irq, spacemit_dp_irq_handler,
> + spacemit_dp_hotplug_event_handler,
> + IRQF_NO_AUTOEN, dev_name(dev), dp);
> + if (ret) {
> + dev_err(dev, "failed to request irq %d: %d\n", dp->irq, ret);
> + goto err_clk;
> + }
Since 55b48e23f5c4 ("genirq/devres: Add error handling in
devm_request_*_irq()") devm_request_threaded_irq() automatically throws
an error message when it fails, so this error message is redundant.
...
> +err_clk:
> + clk_disable_unprepare(dp->pxclk);
With devm_clk_get_optional_enabled(), you could remove this and
simplify some error handling paths.
Regards,
Yao Zi
WARNING: multiple messages have this Message-ID (diff)
From: Yao Zi <me@ziyao.cc>
To: codykang.hk@gmail.com, David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Yixun Lan <dlan@kernel.org>,
Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Haylen Chu <heylenay@4d2.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>
Cc: dri-devel@lists.freedesktop.org, linux-riscv@lists.infradead.org,
devicetree@vger.kernel.org, spacemit@lists.linux.dev,
linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
linux-clk@vger.kernel.org, Yao Zi <me@ziyao.cc>
Subject: Re: [PATCH RESEND 12/17] drm/spacemit: add Innosilicon DP/eDP controller bridge driver
Date: Mon, 27 Jul 2026 12:29:48 +0000 [thread overview]
Message-ID: <amdPPBOH-Dk4oU7y@pie> (raw)
In-Reply-To: <20260725-k3-display-v1-12-6de34d80e86c@gmail.com>
On Sat, Jul 25, 2026 at 12:51:21AM -0400, Cody Kang via B4 Relay wrote:
> From: Cody Kang <codykang.hk@gmail.com>
>
> Add the DP/eDP controller that sits downstream of the Saturn DPU. Two
> identical instances share one compatible; the eDP-vs-DP role is board
> wiring, so it is taken from the devicetree: an eDP panel always sits
> under an aux-bus child node, an external DP connector never does.
>
> The link is driven through the generic PHY framework, so the controller
> never touches a PLL register. The controller's HPD interrupt is gated by
> the DP pixel clock, which can be off exactly when a plug has to be
> caught, so the connector is also polled and the interrupt path re-reads
> the live level when it does fire.
>
> Signed-off-by: Cody Kang <codykang.hk@gmail.com>
> ---
> drivers/gpu/drm/spacemit/Kconfig | 19 +
> drivers/gpu/drm/spacemit/Makefile | 3 +
> drivers/gpu/drm/spacemit/spacemit_inno_dp.c | 2443 +++++++++++++++++++++++++++
> drivers/gpu/drm/spacemit/spacemit_inno_dp.h | 328 ++++
> 4 files changed, 2793 insertions(+)
...
> +static int inno_dp_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *aux_bus_np;
> + struct spacemit_dp_dev *dp;
> + struct resource *res;
> + int ret;
...
> + dp->pxclk = devm_clk_get(dev, "pxclk");
> + if (IS_ERR(dp->pxclk)) {
> + ret = dev_err_probe(dev, PTR_ERR(dp->pxclk),
> + "failed to get pxclk\n");
> + return ret;
> + }
It seems pxclk is only enabled in probe() and disabled in remove(),
please consider using devm_clk_get_optional_enabled().
...
> + if (dp->pxclk) {
> + ret = clk_prepare_enable(dp->pxclk);
> + if (ret) {
> + dev_err(dev, "failed to enable pxclk: %d\n", ret);
> + goto err_reset;
> + }
> + }
So this check could be dropped.
...
> + /*
> + * The PHY exposes its PLL as the APMU pixel-clock mux's external
> + * parent.
> + */
> + dp->pll_clk = devm_clk_get(dev, "pll");
> + if (IS_ERR(dp->pll_clk)) {
> + ret = dev_err_probe(dev, PTR_ERR(dp->pll_clk),
> + "failed to get PHY pixel clock\n");
> + goto err_clk;
> + }
Same for the "pll" clock.
> + if (dp->pxclk) {
> + ret = clk_set_parent(dp->pxclk, dp->pll_clk);
> + if (ret) {
> + dev_err(dev, "failed to route eDP pixel mux to PHY PLL: %d\n", ret);
> + goto err_clk;
> + }
> + }
> + */
> + ret = devm_request_threaded_irq(dev, dp->irq, spacemit_dp_irq_handler,
> + spacemit_dp_hotplug_event_handler,
> + IRQF_NO_AUTOEN, dev_name(dev), dp);
> + if (ret) {
> + dev_err(dev, "failed to request irq %d: %d\n", dp->irq, ret);
> + goto err_clk;
> + }
Since 55b48e23f5c4 ("genirq/devres: Add error handling in
devm_request_*_irq()") devm_request_threaded_irq() automatically throws
an error message when it fails, so this error message is redundant.
...
> +err_clk:
> + clk_disable_unprepare(dp->pxclk);
With devm_clk_get_optional_enabled(), you could remove this and
simplify some error handling paths.
Regards,
Yao Zi
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Yao Zi <me@ziyao.cc>
To: codykang.hk@gmail.com, David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Yixun Lan <dlan@kernel.org>,
Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Haylen Chu <heylenay@4d2.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>
Cc: dri-devel@lists.freedesktop.org, linux-riscv@lists.infradead.org,
devicetree@vger.kernel.org, spacemit@lists.linux.dev,
linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
linux-clk@vger.kernel.org, Yao Zi <me@ziyao.cc>
Subject: Re: [PATCH RESEND 12/17] drm/spacemit: add Innosilicon DP/eDP controller bridge driver
Date: Mon, 27 Jul 2026 12:29:48 +0000 [thread overview]
Message-ID: <amdPPBOH-Dk4oU7y@pie> (raw)
In-Reply-To: <20260725-k3-display-v1-12-6de34d80e86c@gmail.com>
On Sat, Jul 25, 2026 at 12:51:21AM -0400, Cody Kang via B4 Relay wrote:
> From: Cody Kang <codykang.hk@gmail.com>
>
> Add the DP/eDP controller that sits downstream of the Saturn DPU. Two
> identical instances share one compatible; the eDP-vs-DP role is board
> wiring, so it is taken from the devicetree: an eDP panel always sits
> under an aux-bus child node, an external DP connector never does.
>
> The link is driven through the generic PHY framework, so the controller
> never touches a PLL register. The controller's HPD interrupt is gated by
> the DP pixel clock, which can be off exactly when a plug has to be
> caught, so the connector is also polled and the interrupt path re-reads
> the live level when it does fire.
>
> Signed-off-by: Cody Kang <codykang.hk@gmail.com>
> ---
> drivers/gpu/drm/spacemit/Kconfig | 19 +
> drivers/gpu/drm/spacemit/Makefile | 3 +
> drivers/gpu/drm/spacemit/spacemit_inno_dp.c | 2443 +++++++++++++++++++++++++++
> drivers/gpu/drm/spacemit/spacemit_inno_dp.h | 328 ++++
> 4 files changed, 2793 insertions(+)
...
> +static int inno_dp_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *aux_bus_np;
> + struct spacemit_dp_dev *dp;
> + struct resource *res;
> + int ret;
...
> + dp->pxclk = devm_clk_get(dev, "pxclk");
> + if (IS_ERR(dp->pxclk)) {
> + ret = dev_err_probe(dev, PTR_ERR(dp->pxclk),
> + "failed to get pxclk\n");
> + return ret;
> + }
It seems pxclk is only enabled in probe() and disabled in remove(),
please consider using devm_clk_get_optional_enabled().
...
> + if (dp->pxclk) {
> + ret = clk_prepare_enable(dp->pxclk);
> + if (ret) {
> + dev_err(dev, "failed to enable pxclk: %d\n", ret);
> + goto err_reset;
> + }
> + }
So this check could be dropped.
...
> + /*
> + * The PHY exposes its PLL as the APMU pixel-clock mux's external
> + * parent.
> + */
> + dp->pll_clk = devm_clk_get(dev, "pll");
> + if (IS_ERR(dp->pll_clk)) {
> + ret = dev_err_probe(dev, PTR_ERR(dp->pll_clk),
> + "failed to get PHY pixel clock\n");
> + goto err_clk;
> + }
Same for the "pll" clock.
> + if (dp->pxclk) {
> + ret = clk_set_parent(dp->pxclk, dp->pll_clk);
> + if (ret) {
> + dev_err(dev, "failed to route eDP pixel mux to PHY PLL: %d\n", ret);
> + goto err_clk;
> + }
> + }
> + */
> + ret = devm_request_threaded_irq(dev, dp->irq, spacemit_dp_irq_handler,
> + spacemit_dp_hotplug_event_handler,
> + IRQF_NO_AUTOEN, dev_name(dev), dp);
> + if (ret) {
> + dev_err(dev, "failed to request irq %d: %d\n", dp->irq, ret);
> + goto err_clk;
> + }
Since 55b48e23f5c4 ("genirq/devres: Add error handling in
devm_request_*_irq()") devm_request_threaded_irq() automatically throws
an error message when it fails, so this error message is redundant.
...
> +err_clk:
> + clk_disable_unprepare(dp->pxclk);
With devm_clk_get_optional_enabled(), you could remove this and
simplify some error handling paths.
Regards,
Yao Zi
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2026-07-27 12:31 UTC|newest]
Thread overview: 150+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-25 4:51 [PATCH RESEND 00/17] drm/spacemit: add SpacemiT K3 display support Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` [PATCH RESEND 01/17] dt-bindings: display: spacemit: add K3 Saturn DPU controller Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-08-07 22:58 ` Rob Herring (Arm)
2026-08-07 22:58 ` Rob Herring (Arm)
2026-08-07 22:58 ` Rob Herring (Arm)
2026-07-25 4:51 ` [PATCH RESEND 02/17] dt-bindings: phy: add SpacemiT K3 Innosilicon DP PHY Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-08-07 23:00 ` Rob Herring (Arm)
2026-08-07 23:00 ` Rob Herring (Arm)
2026-08-07 23:00 ` Rob Herring (Arm)
2026-07-25 4:51 ` [PATCH RESEND 03/17] dt-bindings: display: spacemit: add K3 Innosilicon DP/eDP controller Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-08-07 23:04 ` Rob Herring
2026-08-07 23:04 ` Rob Herring
2026-08-07 23:04 ` Rob Herring
2026-08-08 14:39 ` Cody Kang
2026-08-08 14:39 ` Cody Kang
2026-08-08 14:39 ` Cody Kang
2026-07-25 4:51 ` [PATCH RESEND 04/17] dt-bindings: soc: spacemit: allow eDP/DP PHY PLL pixel clocks on K3 APMU Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-08-07 23:08 ` Rob Herring
2026-08-07 23:08 ` Rob Herring
2026-08-07 23:08 ` Rob Herring
2026-08-08 14:29 ` Cody Kang
2026-08-08 14:29 ` Cody Kang
2026-08-08 14:29 ` Cody Kang
2026-07-25 4:51 ` [PATCH RESEND 05/17] phy: spacemit: add Innosilicon DP TX PHY driver Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 5:02 ` sashiko-bot
2026-07-25 5:02 ` sashiko-bot
2026-08-08 9:48 ` Cody Kang
2026-08-08 9:48 ` Cody Kang
2026-07-29 12:36 ` Uwe Kleine-König
2026-07-29 12:36 ` Uwe Kleine-König
2026-07-29 12:36 ` Uwe Kleine-König
2026-08-08 14:14 ` Cody Kang
2026-08-08 14:14 ` Cody Kang
2026-08-08 14:14 ` Cody Kang
2026-07-25 4:51 ` [PATCH RESEND 06/17] clk: spacemit: k3: parent eDP/DP pixel clock to the PHY PLL Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` [PATCH RESEND 07/17] drm/spacemit: add Saturn DPU register model Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` [PATCH RESEND 08/17] drm/spacemit: add Saturn DPU core types, cmdlist and display MMU Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 5:04 ` sashiko-bot
2026-07-25 5:04 ` sashiko-bot
2026-08-09 0:39 ` Cody Kang
2026-08-09 0:39 ` Cody Kang
2026-07-27 7:35 ` Philipp Zabel
2026-07-27 7:35 ` Philipp Zabel
2026-07-27 7:35 ` Philipp Zabel
2026-08-08 13:07 ` Cody Kang
2026-08-08 13:07 ` Cody Kang
2026-08-08 13:07 ` Cody Kang
2026-07-25 4:51 ` [PATCH RESEND 09/17] drm/spacemit: add Saturn DPU hardware backend Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 5:12 ` sashiko-bot
2026-07-25 5:12 ` sashiko-bot
2026-07-25 4:51 ` [PATCH RESEND 10/17] drm/spacemit: add Saturn DPU KMS pipeline Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 5:04 ` sashiko-bot
2026-07-25 5:04 ` sashiko-bot
2026-08-09 0:59 ` Cody Kang
2026-08-09 0:59 ` Cody Kang
2026-07-27 7:35 ` Philipp Zabel
2026-07-27 7:35 ` Philipp Zabel
2026-07-27 7:35 ` Philipp Zabel
2026-08-08 5:03 ` Guodong Xu
2026-08-08 5:03 ` Guodong Xu
2026-08-08 5:03 ` Guodong Xu
2026-08-09 3:26 ` Cody Kang
2026-08-09 3:26 ` Cody Kang
2026-08-09 3:26 ` Cody Kang
2026-08-08 13:21 ` Cody Kang
2026-08-08 13:21 ` Cody Kang
2026-08-08 13:21 ` Cody Kang
2026-07-25 4:51 ` [PATCH RESEND 11/17] drm/spacemit: add Saturn DPU DRM device driver Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 5:05 ` sashiko-bot
2026-07-25 5:05 ` sashiko-bot
2026-07-25 4:51 ` [PATCH RESEND 12/17] drm/spacemit: add Innosilicon DP/eDP controller bridge driver Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 5:04 ` sashiko-bot
2026-07-25 5:04 ` sashiko-bot
2026-08-08 12:51 ` Cody Kang
2026-08-08 12:51 ` Cody Kang
2026-07-27 7:49 ` Philipp Zabel
2026-07-27 7:49 ` Philipp Zabel
2026-07-27 7:49 ` Philipp Zabel
2026-08-08 13:30 ` Cody Kang
2026-08-08 13:30 ` Cody Kang
2026-08-08 13:30 ` Cody Kang
2026-07-27 12:29 ` Yao Zi [this message]
2026-07-27 12:29 ` Yao Zi
2026-07-27 12:29 ` Yao Zi
2026-08-08 14:07 ` Cody Kang
2026-08-08 14:07 ` Cody Kang
2026-08-08 14:07 ` Cody Kang
2026-07-25 4:51 ` [PATCH RESEND 13/17] MAINTAINERS: add SpacemiT K3 display driver entry Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` [PATCH RESEND 14/17] riscv: dts: spacemit: k3: add display nodes Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 5:08 ` sashiko-bot
2026-07-25 5:08 ` sashiko-bot
2026-07-25 4:51 ` [PATCH RESEND 15/17] riscv: dts: spacemit: k3-pico-itx: enable the DisplayPort output Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 5:12 ` sashiko-bot
2026-07-25 5:12 ` sashiko-bot
2026-07-25 4:51 ` [PATCH RESEND 16/17] riscv: dts: spacemit: k3-com260-ifx: " Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` [PATCH RESEND 17/17] riscv: defconfig: spacemit: k3: enable display driver Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang
2026-07-25 4:51 ` Cody Kang via B4 Relay
2026-07-25 4:51 ` Cody Kang via B4 Relay
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