Re: [PATCH v11 5/6] arm64: dts: qcom: monaco: Add OPP-table for ICE UFS and ICE eMMC nodes

[Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>]

On Fri, Jun 26, 2026 at 04:28:54PM +0200, Konrad Dybcio wrote:
> On 6/22/26 9:38 AM, Abhinaba Rakshit wrote:
> > On Thu, Jun 18, 2026 at 03:04:57PM +0200, Konrad Dybcio wrote:
> >> On 6/8/26 11:47 PM, Abhinaba Rakshit wrote:
> >>> Qualcomm Inline Crypto Engine (ICE) platform driver now, supports
> >>> an optional OPP-table.
> >>>
> >>> Add OPP-table for ICE UFS and ICE eMMC device nodes for Monaco
> >>> platform.
> >>>
> >>> Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
> >>> ---
> >>>  arch/arm64/boot/dts/qcom/monaco.dtsi | 37 ++++++++++++++++++++++++++++++++++++
> >>>  1 file changed, 37 insertions(+)
> >>>
> >>> diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
> >>> index a1b6e6211b84d0d5008231c55613a0ccd61b9450..d9298d8b7874b8669b2cded2a28a99dce6eadbda 100644
> >>> --- a/arch/arm64/boot/dts/qcom/monaco.dtsi
> >>> +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
> >>> @@ -2742,6 +2742,27 @@ ice: crypto@1d88000 {
> >>>  			clock-names = "core",
> >>>  				      "iface";
> >>>  			power-domains = <&gcc GCC_UFS_PHY_GDSC>;
> >>> +
> >>> +			operating-points-v2 = <&ice_opp_table>;
> >>> +
> >>> +			ice_opp_table: opp-table {
> >>> +				compatible = "operating-points-v2";
> >>> +
> >>> +				opp-75000000 {
> >>> +					opp-hz = /bits/ 64 <75000000>;
> >>> +					required-opps = <&rpmhpd_opp_svs_l1>;
> >>> +				};
> >>> +
> >>> +				opp-201600000 {
> >>> +					opp-hz = /bits/ 64 <201600000>;
> >>> +					required-opps = <&rpmhpd_opp_svs_l1>;
> >>> +				};
> >>
> >> Since 75 MHz and 201.6 Mhz require the same power level, is the former
> >> OPP any useful?
> > 
> > Yes, both use the same power requirements. However recommended by the ICE team,
> > the DT should include all opp/freq supported by the hardware.
> 
> Is there any reason at all where the OS would prefer the lower OPP?
> 
> I think you at one point mentioned some dependency vs the storage
> controller's clock frequency
> 

Monaco UFS controller supports a 75 MHz clock rate at the same power level, as
specified in the hardware description.

Although both frequencies (75 and 201.6MHz) use the same power domain (OPP),
retaining the 75 MHz ICE OPP allows the ICE clock to align with the UFS
controller’s clock frequency. This synchronization is required for the
controller’s supported operating modes and can help avoid unnecessary
frequency mismatches.

Abhinaba Rakshit