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From: Zhao Liu <zhao1.liu@intel.com>
To: Tina Zhang <zhang_wei@open-hieco.net>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org,
	"Michael S . Tsirkin" <mst@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Marcelo Tosatti <mtosatti@redhat.com>,
	Yanjing Zhou <zhouyanjing@hygon.cn>
Subject: Re: [PATCH v2 6/9] target/i386: Do not broadcast injected MCEs for Hygon
Date: Sun, 23 Aug 2026 16:55:01 +0800	[thread overview]
Message-ID: <aoq1ZT66amRjhuNa@intel.com> (raw)
In-Reply-To: <20260810082956.1768042-7-zhang_wei@open-hieco.net>

On Mon, Aug 10, 2026 at 04:29:53PM +0800, Tina Zhang wrote:
> Date: Mon, 10 Aug 2026 16:29:53 +0800
> From: Tina Zhang <zhang_wei@open-hieco.net>
> Subject: [PATCH v2 6/9] target/i386: Do not broadcast injected MCEs for
>  Hygon
> X-Mailer: git-send-email 2.43.7
> 
> cpu_x86_support_mca_broadcast() excludes AMD CPUs because QEMU handles
> AMD injected MCEs as local machine checks, not as Intel-style broadcast
> MCEs.  Hygon Dhyana missed that exclusion: it is not an AMD vendor CPU
> and its family is greater than 6, so QEMU reported MCA broadcast
> support.
> 
> This affects QEMU's synthetic MCE injection paths.  KVM memory-failure
> injection uses this helper to decide whether to set MCE_INJECT_BROADCAST.
> HMP 'mce -b' uses it to decide whether a broadcast request is valid.
> With a multi-vCPU Dhyana guest, QEMU could fan out an injected MCE to
> secondary vCPUs and populate extra bank records.
> 
> Linux routes Hygon through the AMD MCE feature initialization path and
> does not use Intel/Zhaoxin LMCE broadcast handling for Hygon.  Do not
> advertise Intel-style MCA broadcast support for Hygon in QEMU's injected
> MCE paths.
> 
> This is limited to the MCE broadcast-support decision.  It does not claim
> that all Hygon MCE/MCA behavior is identical to AMD.
> 
> Signed-off-by: Tina Zhang <zhang_wei@open-hieco.net>
> ---
>  target/i386/helper.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>


  reply	other threads:[~2026-08-23  8:55 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-10  8:29 [PATCH v2 0/9] target/i386: Fix Hygon vendor-specific CPU behavior Tina Zhang
2026-08-10  8:29 ` [PATCH v2 1/9] target/i386: Sync AMD CPUID aliases for Hygon Tina Zhang
2026-08-23  8:47   ` Zhao Liu
2026-08-24  5:05     ` Tina Zhang
2026-08-10  8:29 ` [PATCH v2 2/9] target/i386: Hide Intel cache CPUID leaves " Tina Zhang
2026-08-23  8:49   ` Zhao Liu
2026-08-10  8:29 ` [PATCH v2 3/9] target/i386: Hide ARCH_CAPABILITIES " Tina Zhang
2026-08-23  8:50   ` Zhao Liu
2026-08-10  8:29 ` [PATCH v2 4/9] target/i386/kvm: Use AMD MCE status encoding " Tina Zhang
2026-08-23  8:51   ` Zhao Liu
2026-08-10  8:29 ` [PATCH v2 5/9] target/i386/kvm: Use AMD PMU MSR paths " Tina Zhang
2026-08-23  9:32   ` Zhao Liu
2026-08-10  8:29 ` [PATCH v2 6/9] target/i386: Do not broadcast injected MCEs " Tina Zhang
2026-08-23  8:55   ` Zhao Liu [this message]
2026-08-10  8:29 ` [PATCH v2 7/9] hw/i386: Reserve AMD IOMMU HT GPA range " Tina Zhang
2026-08-23  9:17   ` Zhao Liu
2026-08-10  8:29 ` [PATCH v2 8/9] target/i386: Use AMD legacy cache fallback " Tina Zhang
2026-08-23  9:18   ` Zhao Liu
2026-08-10  8:29 ` [PATCH v2 9/9] target/i386: Use AMD ucode-rev default " Tina Zhang
2026-08-23  9:24   ` Zhao Liu

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