Re: [PATCH v2 8/9] target/i386: Use AMD legacy cache fallback for Hygon

[Zhao Liu <zhao1.liu@intel.com>]

On Mon, Aug 10, 2026 at 04:29:55PM +0800, Tina Zhang wrote:
> Date: Mon, 10 Aug 2026 16:29:55 +0800
> From: Tina Zhang <zhang_wei@open-hieco.net>
> Subject: [PATCH v2 8/9] target/i386: Use AMD legacy cache fallback for Hygon
> X-Mailer: git-send-email 2.43.7
> 
> When legacy-cache=on, x86_cpu_realizefn() builds a hardcoded cache
> model.  It selected the AMD legacy cache table only for CPUs with the
> AuthenticAMD vendor ID.  Dhyana uses the HygonGenuine vendor ID, so this
> explicit compatibility path fell back to QEMU's old Intel legacy cache
> table.
> 
> The wrong table is visible through AMD extended cache leaves.  With the
> Intel legacy table, Dhyana reports 32 KiB, 8-way L1 caches in CPUID
> 0x80000005 and a 4 MiB, 16-way L2 cache in CPUID 0x80000006.  Linux
> uses the AMD/Hygon cache enumeration path for Hygon and reads these AMD
> extended cache leaves.
> 
> Use the AMD legacy cache table for Hygon in this fallback path when the
> new vendor CPU ABI is enabled.  Keep the old fallback for pc-11.0 and

nit: pc-11.1.

> older machine types through x-hygon-vendor-abi-fixes=false.

Thanks,
Zhao